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1. 发明授权

US08861749B2 Audio output driver for reducing electromagnetic interference and improving audio channel performance 有权
标题翻译：音频输出驱动器，用于减少电磁干扰，提高音频通道性能
公开(公告)号：US08861749B2
公开(公告)日：2014-10-14
申请号：US13114655
申请日：2011-05-24
申请人： Matthew D. Felder
发明人： Matthew D. Felder
IPC分类号： H03F21/00 , H04H60/04 , G06F3/16 , G10L21/0208 , H04B1/10
CPC分类号： H04H60/04 , G06F3/162 , G10L21/0208 , H04B1/1036
摘要： An audio output circuit includes an on-chip left channel amplifier module, an on-chip center channel amplifier module, and an on-chip right channel amplifier module. A left channel IC pin is operably coupled to an output of the on-chip left channel amplifier module. A right channel IC pin is operably coupled to an output of the on-chip right channel amplifier module. A center channel IC pin is operably coupled to an output of the on-chip center channel amplifier module. A center channel feedback IC pin is operably coupled to an input of the on-chip center channel amplifier module to provide a feedback loop. A left jack connection is operably coupled to the left channel IC pin. A right jack connection is operably coupled to the right channel IC pin. A jack return connection coupled to the center feedback IC pin. An inductor has a first node coupled to the jack return connection and a second node coupled to the center channel IC pin.
摘要翻译：音频输出电路包括片上左声道放大器模块，片上中心声道放大器模块和片上右声道放大器模块。左通道IC引脚可操作地耦合到片上左声道放大器模块的输出。右通道IC引脚可操作地耦合到片上右声道放大器模块的输出。中心通道IC引脚可操作地耦合到片上中心通道放大器模块的输出端。中心通道反馈IC引脚可操作地耦合到片上中心通道放大器模块的输入端以提供反馈回路。左插孔连接可操作地耦合到左通道IC引脚。右插孔连接可操作地耦合到右通道IC引脚。耦合到中心反馈IC引脚的插座返回连接。电感器具有耦合到插座返回连接的第一节点和耦合到中心通道IC引脚的第二节点。

2. 发明申请

US20140109074A1 AUDIO SOURCE SYSTEM AND METHOD 审中-公开
标题翻译：音频源系统和方法
公开(公告)号：US20140109074A1
公开(公告)日：2014-04-17
申请号：US14137346
申请日：2013-12-20
申请人： SIGMATEL, INC.
发明人： Antoniio Torrini , Konstantin Shkolnyy
IPC分类号： G06F9/445
CPC分类号： G06F3/162 , G06F11/261 , G06F13/105 , G06F17/5022
摘要： A method includes receiving hardware update information during a first time period. The method further includes using the hardware update information to synchronize a first audio data stream with a device driver. The method further includes receiving hardware emulation information during a second time period and using the hardware emulation information to simulate synchronization between the device driver and the first audio data stream.
摘要翻译：一种方法包括在第一时间段期间接收硬件更新信息。该方法还包括使用硬件更新信息来使第一音频数据流与设备驱动器同步。该方法还包括在第二时间段期间接收硬件仿真信息，并且使用硬件仿真信息来模拟设备驱动器和第一音频数据流之间的同步。

3. 发明授权

US08055982B2 Error correction system and method 有权
标题翻译：纠错系统和方法
公开(公告)号：US08055982B2
公开(公告)日：2011-11-08
申请号：US12016577
申请日：2008-01-18
申请人： Daniel Mulligan
发明人： Daniel Mulligan
IPC分类号： H03M13/00
CPC分类号： G06F11/1068 , H04L1/0043 , H04L1/0057
摘要： A method includes receiving payload data from a data source at error correction code (ECC) logic, where the ECC logic is adapted to process a block of data of a particular size via a plurality of stages. The ECC logic is initialized to a selected stage of the plurality of stages. The selected stage includes an initial value and an initial number of cycles. The initial value and the initial number of cycles are related to a number of symbols of padding data corresponding to a difference in size between the payload data and the block of data. The selected stage is related to a state of the ECC logic as if the number of symbols of padding data had already been processed by the ECC logic. The payload data is processed via the ECC logic beginning with the selected stage to produce parity data related to the payload data.
摘要翻译：一种方法包括以纠错码（ECC）逻辑从数据源接收有效载荷数据，其中ECC逻辑适于经由多个级处理特定大小的数据块。 ECC逻辑被初始化为多个级的选定阶段。所选择的阶段包括初始值和初始循环次数。初始值和初始循环次数与对应于有效负载数据和数据块之间的大小差异的填充数据的符号的数量相关。所选择的阶段与ECC逻辑的状态相关，就像填充数据的符号数已经被ECC逻辑处理一样。有效载荷数据通过从所选阶段开始的ECC逻辑处理，以产生与有效载荷数据相关的奇偶校验数据。

4. 发明授权

US07953196B2 Digital audio processing system and method 有权
标题翻译：数字音频处理系统及方法
公开(公告)号：US07953196B2
公开(公告)日：2011-05-31
申请号：US12895170
申请日：2010-09-30
申请人： Jeffrey Donald Alderson , Darrell Tinker , K. Gozie Ifesinachukwu
发明人： Jeffrey Donald Alderson , Darrell Tinker , K. Gozie Ifesinachukwu
IPC分类号： H04L7/00
CPC分类号： G10L19/02
摘要： A method includes receiving first data corresponding to a first signal sampled at a first sample rate, decimating the first data to provide a second signal sampled at a second sample rate, and recovering a pilot signal from the second signal. The method also includes evaluating the pilot signal to determine an error value, where the error value is based on a comparison of a sample of the pilot signal to zero. The method also includes adjusting the second sample rate based on the error value.
摘要翻译：一种方法包括接收对应于以第一采样率采样的第一信号的第一数据，抽取第一数据以提供以第二采样率采样的第二信号，以及从第二信号恢复导频信号。该方法还包括评估导频信号以确定误差值，其中误差值基于导频信号的采样与零的比较。该方法还包括基于误差值调整第二采样率。

5. 发明授权

US07949131B2 Digital security system 有权
标题翻译：数字安全系统
公开(公告)号：US07949131B2
公开(公告)日：2011-05-24
申请号：US11312672
申请日：2005-12-19
申请人： Antonio Torrini , Konstantin Shkolnyy
发明人： Antonio Torrini , Konstantin Shkolnyy
IPC分类号： H04L9/00
CPC分类号： G11B20/00086 , G11B20/00731 , G11B20/00818 , G11B20/10037 , G11B20/10527 , G11B2020/00057 , G11B2020/10546
摘要： A system and method for processing a digital audio signal is disclosed. The system includes an input to receive a digital audio signal and a first output to provide a first digital output signal. The digital audio signal has a first fidelity characteristic and the first digital output signal has a second fidelity characteristic. The second fidelity characteristic is determined in response to security information extracted from the digital audio signal. The first digital output signal is provided to a digital to analog converter.
摘要翻译：公开了一种用于处理数字音频信号的系统和方法。该系统包括用于接收数字音频信号的输入和用于提供第一数字输出信号的第一输出。数字音频信号具有第一保真特性，第一数字输出信号具有第二保真特性。响应于从数字音频信号提取的安全信息来确定第二保真特性。第一数字输出信号被提供给数模转换器。

6. 发明授权

US07907664B2 Digital adaptive feedforward harmonic distortion compensation for digitally controlled power stage 有权
标题翻译：数字自适应前馈谐波失真补偿数字控制功率级
公开(公告)号：US07907664B2
公开(公告)日：2011-03-15
申请号：US12632323
申请日：2009-12-07
申请人： Zukui Song , Michael Determan
发明人： Zukui Song , Michael Determan
IPC分类号： H03K7/08
CPC分类号： H03F3/217 , H03F1/3223 , H03F1/3241 , H03F2200/03 , H03F2200/351
摘要： Systems and method to compress digital video based on human factors expressed as a desirability score are provided. A particular method includes passing a digital input signal through a pulse-width modulator and passing an output of the pulse-width modulator through a power switching device. An output of the power switching device has a plurality of pulses. The method includes receiving the output of the power switching device at a first input of a comparator and receiving a reference voltage at a second input of the comparator. The method includes determining a net signal based on an output of the comparator and determining a timing error signal based on the net signal and the digital input signal. The method also includes adjusting the digital input signal to compensate for harmonic distortion based at least in part on the timing error signal.
摘要翻译：提供了基于表示为可取性评分的人为因素来压缩数字视频的系统和方法。特定的方法包括通过脉冲宽度调制器传送数字输入信号，并通过功率开关器件使脉冲宽度调制器的输出通过。功率开关器件的输出具有多个脉冲。该方法包括在比较器的第一输入处接收功率开关器件的输出，并在比较器的第二输入端接收参考电压。该方法包括基于比较器的输出确定净信号，并基于净信号和数字输入信号确定定时误差信号。该方法还包括至少部分地基于定时误差信号调整数字输入信号以补偿谐波失真。

7. 发明授权

US07856464B2 Decimation filter 有权
标题翻译：抽取滤波器
公开(公告)号：US07856464B2
公开(公告)日：2010-12-21
申请号：US11356338
申请日：2006-02-16
申请人： Darrell Eugene Tinker
发明人： Darrell Eugene Tinker
IPC分类号： G06F17/10 , G06F17/17 , G06F7/38 , H03M7/00
CPC分类号： H03H17/0248 , H03H17/0628 , H03H17/0671 , H03H17/0685
摘要： A system and method for decimating a digital signal is disclosed. The system includes an input to receive digital data, a control input to receive a desired decimation rate, and an integrator stage responsive to the input. The system also includes a variable rate down sampling module responsive to the integrator stage and a differentiator stage responsive to the variable rate down sampling module. The down sampling module has a decimation rate that is dynamically adjustable based on the desired decimation rate.
摘要翻译：公开了一种用于抽取数字信号的系统和方法。该系统包括用于接收数字数据的输入，用于接收期望的抽取率的控制输入和响应于该输入的积分器级。该系统还包括响应于积分器级的可变降速采样模块和响应于可变速率下降采样模块的微分器级。下采样模块具有基于所需抽取速率动态调节的抽取率。

8. 发明授权

US07856283B2 Digital microphone interface, audio codec and methods for use therewith 有权
标题翻译：数字麦克风接口，音频编解码器和与其一起使用的方法
公开(公告)号：US07856283B2
公开(公告)日：2010-12-21
申请号：US11344274
申请日：2006-01-31
申请人： Theodore Burk , Daniel T. Bogard
发明人： Theodore Burk , Daniel T. Bogard
IPC分类号： G06F17/00 , H04R3/00 , H04R1/40 , H04J3/00
CPC分类号： H04R3/005
摘要： A digital microphone interface includes a phase generator for generating a phase signal. A clock generator produces a digital microphone clock at a selected frequency based on the frequency select signal, and supplying the digital microphone clock to a digital microphone. A first data latch, operably coupled to the phase generator, produces a stream of first data from a first channel of the digital microphone, based on a phase select signal and the phase signal.
摘要翻译：数字麦克风接口包括用于产生相位信号的相位发生器。时钟发生器基于频率选择信号产生选定频率的数字麦克风时钟，并将数字麦克风时钟提供给数字麦克风。可操作地耦合到相位发生器的第一数据锁存器基于相位选择信号和相位信号从数字麦克风的第一通道产生第一数据流。

9. 发明授权

US07792220B2 Demodulator system and method 有权
标题翻译：解调器系统和方法
公开(公告)号：US07792220B2
公开(公告)日：2010-09-07
申请号：US11641995
申请日：2006-12-19
申请人： Jeffrey Donald Alderson , Darrell Tinker , K. Gozie Ifesinachukwu
发明人： Jeffrey Donald Alderson , Darrell Tinker , K. Gozie Ifesinachukwu
IPC分类号： H04L27/00 , H04L27/06 , H04L27/22
CPC分类号： H04L27/3845 , H04L27/2331
摘要： A demodulator system and method is disclosed. In an embodiment, the demodulator system can include a Coordinate Rotation Digital Computer (CORDIC) mixer to mix a first signal substantially to baseband using a first input frequency and to mix a second signal substantially to baseband using a second input frequency. In another embodiment, the demodulator system can include a phase detector to receive a pilot signal and to generate a control signal to adjust a decimation rate based on the pilot signal. In another embodiment, the demodulator system can include a symbol decoder to determine a symbol from a phase signal.
摘要翻译：公开了一种解调器系统和方法。在一个实施例中，解调器系统可以包括坐标旋转数字计算机（CORDIC）混频器，以使用第一输入频率将第一信号基本上与基带混频，并且使用第二输入频率将基本上与基带的第二信号混合。在另一个实施例中，解调器系统可以包括相位检测器，用于接收导频信号并产生控制信号以根据导频信号来调节抽取率。在另一个实施例中，解调器系统可以包括符号解码器，以从相位信号确定符号。

10. 发明授权

US07761773B2 Semiconductor device including a unique identifier and error correction code 有权
标题翻译：包括唯一标识符和纠错码的半导体器件
公开(公告)号：US07761773B2
公开(公告)日：2010-07-20
申请号：US11171917
申请日：2005-06-30
申请人： David Cureton Baker
发明人： David Cureton Baker
IPC分类号： G11C29/00
CPC分类号： G11C17/18
摘要： A semiconductor device includes a plurality of laser fuses and each laser fuse represents a bit of data. A first set of the plurality of laser fuses represents a unique identifier that corresponds to the semiconductor device. Also, a second set of the plurality of laser fuses represents error correction coding data that corresponds to the unique identifier. The unique identifier can be a digital rights management identification. Also, the error correction coding data is configured for use by a Reed-Solomon error correcting method to correct the unique identifier. Alternatively, the error correction coding data is configured for use by a cyclic redundancy check method.
摘要翻译：半导体器件包括多个激光熔丝，并且每个激光熔丝代表一位数据。多个激光熔丝的第一组表示对应于半导体器件的唯一标识符。此外，多个激光熔丝的第二组表示对应于唯一标识符的纠错编码数据。唯一标识符可以是数字版权管理标识。此外，纠错编码数据被配置为由Reed-Solomon错误校正方法使用以校正唯一标识符。或者，纠错编码数据被配置为通过循环冗余校验方法使用。

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