专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07913069B2 Processor and method for executing a program loop within an instruction word 有权
标题翻译：用于在指令字内执行程序循环的处理器和方法
公开(公告)号：US07913069B2
公开(公告)日：2011-03-22
申请号：US11441812
申请日：2006-05-26
申请人： Charles H. Moore , Jeffrey Arthur Fox , John W. Rible
发明人： Charles H. Moore , Jeffrey Arthur Fox , John W. Rible
IPC分类号： G06F9/44 , G06F9/00 , G06F9/30 , G06F9/40 , G06F15/76
CPC分类号： G06F9/30134 , G06F9/30043 , G06F9/30054 , G06F9/30065 , G06F9/30079 , G06F9/32 , G06F9/325 , G06F9/3885 , G06F9/4486 , G06F15/8023
摘要： A computer array (10) has a plurality of computers (12). The computers (12) communicate with each other asynchronously, and the computers (12) themselves operate in a generally asynchronous manner internally. Instruction words (48) can include a micro-loop (100) which is capable of performing a series of operations repeatedly. In a particular example, the series of operations are included in a single instruction word (48). The micro-loop (100) in combination with the ability of the computers (12) to send instruction words (48) to a neighboring computer (12) provides a powerful tool for allowing a computer (12) to utilize the resources of a neighboring computer (12).
摘要翻译：计算机阵列（10）具有多个计算机（12）。计算机（12）以异步方式彼此通信，并且计算机（12）本身以内部的大致异步方式进行操作。指令字（48）可以包括能够重复执行一系列操作的微循环（100）。在特定示例中，一系列操作被包括在单个指令字（48）中。微循环（100）与计算机（12）向相邻计算机（12）发送指令字（48）的能力相结合，提供了一种强大的工具，用于允许计算机（12）利用相邻的电脑（12）。

2. 发明申请

US20100158076A1 Direct Sequence Spread Spectrum Correlation Method for a Multiprocessor Array 审中-公开
标题翻译：用于多处理器阵列的直接序列扩频相关方法
公开(公告)号：US20100158076A1
公开(公告)日：2010-06-24
申请号：US12340486
申请日：2008-12-19
申请人： Les O. Snlyely , Paul Michael Ebert
发明人： Les O. Snlyely , Paul Michael Ebert
IPC分类号： H04B1/00 , G06F15/76 , G06F9/06
CPC分类号： H04B1/7075
摘要： A method and apparatus for correlation of a received DSSS signal with a PN sequence, thus significantly reducing the processing time and operating power needed to acquire phase information for DSSS de-spreading and demodulation. The apparatus utilizes a multiprocessor array 10. In one embodiment, multiple processors 15 are located on a single-die 25, connected by single drop busses 20 to form low-operating-power apparatus. The method provides for fast sequential correlation of a received digital signal. In an alternate embodiment, the present invention is a single-die, low-operating-power apparatus and method for fast parallel correlation of a received digital signal. In yet another alternate embodiment, the present invention is a single-die, low-operating-power apparatus and method for fast correlation of a received digital signal using a hybrid of parallel and sequential methods.
摘要翻译：一种用于将接收到的DSSS信号与PN序列进行相关的方法和装置，从而显着地减少了获取用于DSSS解扩和解调的相位信息所需的处理时间和操作功率。该设备利用多处理器阵列10.在一个实施例中，多个处理器15位于单个管芯25上，通过单滴总线20连接以形成低功率设备。该方法提供了接收的数字信号的快速顺序相关。在替代实施例中，本发明是用于对接收的数字信号进行快速并行相关的单管芯，低功耗设备和方法。在另一替代实施例中，本发明是一种单芯片，低功耗设备和方法，用于使用并行和顺序方法的混合来快速地相关接收的数字信号。

3. 发明申请

US20100138207A1 Method and Apparatus for Circuit Simulation 审中-公开
标题翻译：电路仿真方法与装置
公开(公告)号：US20100138207A1
公开(公告)日：2010-06-03
申请号：US12326239
申请日：2008-12-02
申请人： Charles H. Moore
发明人： Charles H. Moore
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： An integrated circuit simulator and method of integrated circuit simulation comprising providing a voltage lookup table having predetermined drain voltage data for a given transistor type, providing a voltage lookup table having predetermined gate voltage data for a given transistor type and providing a temperature lookup table having predetermined temperature data. Then simulating operation for each transistor in the integrated circuit by determining a current value through the transistor in dependence upon one of the predetermined voltage data values and one of the predetermined temperature data values; and simulating operation for each transistor in the integrated circuit by determining a transistor temperature value and incrementing a simulation time step and repeating the last two steps until simulations complete.
摘要翻译：一种集成电路模拟器和集成电路模拟方法，包括提供具有给定晶体管类型的预定漏极电压数据的电压查找表，提供具有用于给定晶体管类型的预定栅极电压数据的电压查找表，并提供具有预定温度数据。然后通过根据预定电压数据值之一和预定温度数据值中的一个确定通过晶体管的电流值来模拟集成电路中的每个晶体管的操作; 以及通过确定晶体管温度值并增加模拟时间步长来模拟集成电路中每个晶体管的操作，并重复最后两个步骤，直到模拟完成。

4. 发明申请

US20100125440A1 Method and Apparatus for Circuit Simulation 审中-公开
标题翻译：电路仿真方法与装置
公开(公告)号：US20100125440A1
公开(公告)日：2010-05-20
申请号：US12272141
申请日：2008-11-17
申请人： Charles H. Moore
发明人： Charles H. Moore
IPC分类号： G06F17/50 , G06F7/38
CPC分类号： G06F17/5022
摘要： A method of preparing a circuit simulator, said method comprising initializing a normalized adjusted gate voltage value. Then performing the steps of determining a normalized adjusted gate voltage datum in dependence upon the initial normalized adjusted gate voltage value. Storing the normalized adjusted gate voltage datum at a memory address in a one-dimensional array based on the normalized adjusted gate voltage. Decrementing the normalized adjusted gate voltage value by a predetermined decrement amount. And verifying the decremented gate voltage value. Then repeating until a stop gate voltage value is reached.
摘要翻译：一种制备电路模拟器的方法，所述方法包括初始化归一化的调节栅极电压值。然后根据初始归一化调整后的栅极电压值执行确定归一化的调整栅极电压数据的步骤。基于归一化的调整后的栅极电压将归一化的调整后的栅极电压基准存储在一维阵列中的存储器地址处。将归一化的调整后的栅极电压值递减预定的减量量。并验证减小的栅极电压值。然后重复，直到达到停止栅极电压值。

5. 发明授权

US07710505B2 Method and apparatus for remote control of audio visual systems 失效
标题翻译：用于遥控视听系统的方法和装置
公开(公告)号：US07710505B2
公开(公告)日：2010-05-04
申请号：US12148130
申请日：2008-04-16
申请人： Charles H. Moore
发明人： Charles H. Moore
IPC分类号： H04N5/44
CPC分类号： G08C17/00 , G08C2201/30 , H04N5/4403 , H04N21/4221 , H04N21/44222 , H04N2005/4416
摘要： The invention provides a method for improving the functionality of the jump button associated with television, cable/satellite receiver, or any other multi-channel device controlling remote control. The apparatus provides a jump button with the ability to access a wide variety of channels in an intelligent manner. At present, the jump button has the functionality such that the jump to location associated with selecting the jump button is the previously viewed channel, regardless of how the current channel being viewed is selected. The invention disclosed herein is a method of performing jumps on a device like a remote control in a more useful manner.
摘要翻译：本发明提供了一种用于改善与电视，有线/卫星接收机或控制远程控制的任何其他多声道设备相关联的跳跃按钮的功能性的方法。该设备提供了具有以智能方式访问各种频道的能力的跳跃按钮。目前，跳跃按钮具有这样的功能，使得与选择跳转按钮相关联的位置的跳转是先前观看的频道，而不管当前正在观看的频道如何被选择。本文公开的发明是一种以更有用的方式在远程控制装置上执行跳跃的方法。

6. 发明申请

US20100085078A1 Digital Logic Voltage Level Shifter 审中-公开
标题翻译：数字逻辑电压电平变换器
公开(公告)号：US20100085078A1
公开(公告)日：2010-04-08
申请号：US12247000
申请日：2008-10-07
申请人： Rob Chapman
发明人： Rob Chapman
IPC分类号： H03K19/0185
CPC分类号： H03K19/018507
摘要： A digital logic level shifter having three stages. An initial stage includes a conventional 4-terminal bridge-type inverter circuit. A middle stage includes a 5-terminal first logic reversing circuit that has two middle stage inputs that are not connected in common. And a final stage includes a 5-terminal second logic reversing circuit that has two final stage inputs that are not connected in common.
摘要翻译：具有三个阶段的数字逻辑电平转换器。初始阶段包括常规的4端桥式逆变电路。中间阶段包括一个5端第一逻辑反向电路，它具有两个不连接的中间阶段输入。最后一个阶段包括一个5端子的第二个逻辑反向电路，它具有两个未连接的最终级输入端。

7. 发明申请

US20090319755A1 Method and Apparatus for High Speed Data Stream Splitter on an Array of Processors 审中-公开
标题翻译：用于处理器阵列上的高速数据流分离器的方法和装置
公开(公告)号：US20090319755A1
公开(公告)日：2009-12-24
申请号：US12417409
申请日：2009-04-02
申请人： Michael B. Montvelishsky
发明人： Michael B. Montvelishsky
IPC分类号： G06F15/80 , G06F9/06
CPC分类号： G06F15/8015
摘要： A method and apparatus for processing a stream of data. The apparatus includes an array of processors connected to one another by single drop busses. The data stream is inputed to one of the processors 305(da), which splits off a substream and passes the data stream onto a second processor 305(db), which repeats the process; this continues until all of the data stream has been split into substreams. Each substream is processed in parallel by a second grouping 315 of processors. This second group of processors may have multiple steps and processors 315, 320. The processed substreams are assembled into a single data stream 330 by a third group of processors 325 reversing the splitting process and outputted from the array by a last processor 305(ae).
摘要翻译：一种用于处理数据流的方法和装置。该装置包括通过单滴总线彼此连接的处理器阵列。将数据流输入到处理器305（da）中的一个，其分解子流并将数据流传递到第二处理器305（db），其重复该过程; 这一直延续到所有的数据流已经被分成子流。每个子流由处理器的第二组315并行处理。该第二组处理器可以具有多个步骤和处理器315,320。处理后的子流由第三组处理器325组合成单个数据流330，其中反转分离处理并由最后处理器305（ae）从阵列输出，。

8. 发明申请

US20090257263A1 Method and Apparatus for Computer Memory 审中-公开
标题翻译：计算机存储器的方法和装置
公开(公告)号：US20090257263A1
公开(公告)日：2009-10-15
申请号：US12243764
申请日：2008-10-01
申请人： Charles H. Moore
发明人： Charles H. Moore
IPC分类号： G11C5/06 , H01S4/00
CPC分类号： G11C5/025 , G11C5/02 , G11C8/14 , Y10T29/49002
摘要： A method and apparatus for forming computer memory 10 including RAM, ROM, Stacks and other registers. The memory array 10 includes a number of individual memory cells 40, 42, 44, 46 connected to each other by word lines 18, 20 and bit lines 30, 32. Memory cells 40, 42, 44, 46 word lines 18, 20 and bit lines 30, 32 are oriented in a manner to provide minimum line length and a substantialy square geometry. The method includes arranging the memory cells in an interleaved formation.
摘要翻译：一种用于形成包括RAM，ROM，堆叠和其他寄存器的计算机存储器10的方法和装置。存储器阵列10包括通过字线18,20和位线30,32彼此连接的多个单独存储单元40,42,44,46。存储单元40,42,44,46字线18,20和位线30,32以提供最小线长度和实质方形几何形状的方式定向。该方法包括将存储器单元布置成交错地层。

9. 发明申请

US20220210152A1 Method And Apparatus For Authentication Of A User To A Server Using Relative Movement 有权
公开(公告)号：US20220210152A1
公开(公告)日：2022-06-30
申请号：US17571358
申请日：2022-01-07
申请人： VNS Portfolio LLC
发明人： Beau Robertson Parry , Yasodekshna Boddeti
IPC分类号： H04L9/40 , H04L9/08 , H04W12/06 , G06V40/70 , G06F21/36 , G06F21/31 , H04N7/18
摘要： Method and apparatus for authentication of a user to a server that involves the user performing a requested act and that further involves relative movement between the user and a camera wherein fiducial marks are captured.

10. 发明授权

US08098157B2 Intruder deterrent lighting 失效
标题翻译：入侵者威慑照明
公开(公告)号：US08098157B2
公开(公告)日：2012-01-17
申请号：US12402891
申请日：2009-03-12
申请人： F. Eric Saunders , Gregory V. Bailey , Nicholas A. Antonopoulos
发明人： F. Eric Saunders , Gregory V. Bailey , Nicholas A. Antonopoulos
IPC分类号： G08B13/00
CPC分类号： G08B5/38 , G08B15/00
摘要： A zoned interactive control area (10) wherein an architectural space is divided in to a plurality of zones (16), each having its own sensor (22) and zone lights (18). In a normal operating mode (50) the sensors (22) are used to detect the presence of a person such that the zone lights (18) can be turned on and/or adjusted for light level. Each zone light (18) also has a light sensor (24) used, at least in part, for communication with the other zone lights (18), such that the light level can be adjusted not just in response to a presence in the respective zone (16) but also in response to presence in other zones (16). According to a security method (70) when the zone lights (18) are not in use for normal lighting (as when they are turned off) then if the sensors (22) detect the presence of an intruder the zone lights (18) flash to deter the intruder and also communicate the fact of the presence of the intruder to the other zone lights (18) via the light sensors (22).
摘要翻译：一种划分的交互式控制区域（10），其中建筑空间被划分成多个区域（16），每个区域具有其自己的传感器（22）和区域光（18）。在正常操作模式（50）中，传感器（22）用于检测人的存在，使得区域光（18）能够被打开和/或调整以用于光级。每个区域光（18）还具有至少部分地用于与其他区域光（18）通信的光传感器（24），使得可以不仅响应于相应的区域光的存在而调节光水平区域（16），而且还响应于在其他区域（16）中的存在。根据安全方法（70），当区域光（18）不用于正常照明时（如当它们被关闭时），则如果传感器（22）检测入侵者的存在，则区域光（18）闪烁以阻止入侵者，并且还经由光传感器（22）将入侵者的存在事实传达给其他区域光（18）。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式