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1. 发明授权

US11909420B2 Signal generation apparatus and linearity correction method thereof 有权
公开(公告)号：US11909420B2
公开(公告)日：2024-02-20
申请号：US17808165
申请日：2022-06-22
申请人： ANRITSU CORPORATION
发明人： Ittetsu Kaji , Kayoko Horiuchi
IPC分类号： H03M1/00 , H03M3/00 , G01R35/00 , G01R31/319
CPC分类号： H03M3/502 , H03M3/386 , G01R31/319 , G01R35/00
摘要： There are provided a signal generation unit that generates a predetermined digital signal, a level conversion unit that converts a level of the digital signal generated by the signal generation unit, a DA converter that converts the digital signal of which the level is converted by the level conversion unit into an analog signal in a predetermined intermediate frequency bandwidth, and a control unit that creates correction data for correcting a linearity of a level of an output signal of the DA converter for all frequencies to be used, based on actual data which is data of a level of an actual output signal when a setting of the level of the output signal of the DA converter is changed at a predetermined level interval, at a predetermined frequency, and converts a level of an input signal of the DA converter with the correction data.

2. 发明授权

US09989593B2 Modular test environment for a plurality of test objects 有权
公开(公告)号：US09989593B2
公开(公告)日：2018-06-05
申请号：US14783419
申请日：2014-04-04
申请人： Airbus Defence and Space GmbH
发明人： Philipp Wager , Bernd Schumacher
IPC分类号： G01R31/319 , G01R31/28 , G06F11/36
CPC分类号： G01R31/319 , G01R31/2834 , G01R31/31907 , G06F11/3664
摘要： The present invention relates to an arrangement for providing a testing environment for the testing of test objects. The testing environment includes a first test object receiving apparatus and a second test object receiving apparatus, each of which are configured to receive a test object. The testing environment also includes a connection interface configured to connect the first test object receiving apparatus and the second test object receiving apparatus to the testing environment. In one embodiment, the first test object receiving apparatus has a first external connection interface, and the second test object receiving apparatus has a second external connection interface, wherein said first and second external connection interfaces are configured to be selectively coupled with the connection interface of the testing environment.

3. 发明申请

US20160084907A1 TEST DEVICE AND METHOD 有权
标题翻译：测试装置和方法
公开(公告)号：US20160084907A1
公开(公告)日：2016-03-24
申请号：US14960184
申请日：2015-12-04
申请人： VIAVI SOLUTIONS DEUTSCHLAND GMBH
发明人： Reiner SCHNIZLER , Paul BROOKS
IPC分类号： G01R31/317 , G01R31/3177
CPC分类号： G01R31/31718 , G01R31/3177 , G01R31/319 , G01R31/31908 , G06F11/2733 , H04B10/0779 , H04L1/243 , H04L43/50
摘要： A test device for testing a device under test (DUT) includes an integrated control interface adaptable for a plurality of different communication standards. The integrated control interface can be adapted to be compliant with the communication standard used by a DUT connected to the test device.
摘要翻译：用于测试被测设备（DUT）的测试设备包括可适用于多个不同通信标准的综合控制接口。集成控制接口可以适应于连接到测试设备的DUT使用的通信标准。

4. 发明申请

US20150051863A1 TEST SYSTEM 审中-公开
标题翻译：测试系统
公开(公告)号：US20150051863A1
公开(公告)日：2015-02-19
申请号：US14529008
申请日：2014-10-30
申请人： ADVANTEST CORPORATION
发明人： Noritaka TSUCHIDA , Tsunetaka Akutagawa , Junta Nakamura
IPC分类号： G01R31/319
CPC分类号： G01R31/319 , G01R31/31908 , G06F11/2294 , G11C29/56
摘要： A server stores multiple configuration data. A tester hardware is configured to be capable of changing at least a part of its functions according to configuration data stored in rewritable memory, to supply a power supply voltage to a DUT, to transmit a signal to the DUT, and to receive a signal from the DUT. An information technology equipment is configured such that, (i) when the test system is set up, the information technology equipment acquires the configuration data from the server according to the user's input, and writes the configuration data to the memory. Furthermore, the information technology equipment is configured such that, (ii) when the DUT is tested, the information technology equipment executes a test program so as to control the tester hardware, and to process data acquired by the tester hardware.
摘要翻译：服务器存储多个配置数据。测试器硬件被配置为能够根据存储在可重写存储器中的配置数据来改变其功能的至少一部分，以向DUT提供电源电压，以向DUT发送信号，并且接收来自被测件。信息技术设备被配置为：（i）当测试系统建立时，信息技术设备根据用户的输入从服务器获取配置数据，并将配置数据写入存储器。此外，信息技术设备被配置为使得（ii）当DUT被测试时，信息技术设备执行测试程序，以便控制测试仪硬件，并处理由测试仪硬件获取的数据。

5. 发明申请

US20150048855A1 METHOD FOR TESTING A MULTI-CHIP SYSTEM OR A SINGLE CHIP AND SYSTEM THEREOF 有权
标题翻译：用于测试多芯片系统或单芯片及其系统的方法
公开(公告)号：US20150048855A1
公开(公告)日：2015-02-19
申请号：US14384172
申请日：2012-05-10
申请人： Gan Wen
发明人： Gan Wen
IPC分类号： G01R31/319 , G01R31/28
CPC分类号： G01R31/319 , G01R31/2851 , G01R31/31723 , G01R31/318513
摘要： A method for testing a multi-chip system including multiple ports is provided. The method comprises determining a test path formed by connecting the multiple ports, in which the test path is determined in such a way that the internal logic circuit of each chip in the multi-chip system is bypassed, injecting a test traffic to the test path, and receiving the test traffic from the test path.
摘要翻译：提供了一种用于测试包括多个端口的多芯片系统的方法。该方法包括确定通过连接多个端口形成的测试路径，其中测试路径被确定为使得多芯片系统中的每个芯片的内部逻辑电路被旁路，将测试业务注入到测试路径，并从测试路径接收测试流量。

6. 发明授权

US08952712B2 Tagging of functional blocks of a semiconductor component on a wafer 有权
标题翻译：标记晶片上半导体元件的功能块
公开(公告)号：US08952712B2
公开(公告)日：2015-02-10
申请号：US13025665
申请日：2011-02-11
申请人： Arya Reza Behzad , Ahmadreza Rofougaran , Sam Ziqun Zhao , Jesus Alfonso Castaneda , Michael Boers
发明人： Arya Reza Behzad , Ahmadreza Rofougaran , Sam Ziqun Zhao , Jesus Alfonso Castaneda , Michael Boers
IPC分类号： G01R31/36 , G01R31/319 , G01R31/302 , G01R31/311 , H01L23/544 , G01R31/28
CPC分类号： G01R31/319 , G01R31/2834 , G01R31/3025 , G01R31/311 , H01L23/544 , H01L2223/54433 , H01L2924/0002 , Y10T29/49121 , H01L2924/00
摘要： Methods and apparatus are disclosed to simultaneously, wirelessly test semiconductor components formed on a semiconductor wafer. The semiconductor components transmit respective outcomes of a self-contained testing operation to wireless automatic test equipment via a common communication channel. Multiple receiving antennas observe the outcomes from multiple directions in three dimensional space. The wireless automatic test equipment determines whether one or more of the semiconductor components operate as expected and, optionally, may use properties of the three dimensional space to determine a location of one or more of the semiconductor components. The wireless testing equipment may additionally determine performance of the semiconductor components by detecting infrared energy emitted, transmitted, and/or reflected by the semiconductor wafer before, during, and/or after a self-contained testing operation.
摘要翻译：公开了同时无线地测试形成在半导体晶片上的半导体元件的方法和装置。半导体部件通过公共通信信道将各自的测试结果传送到无线自动测试设备。多个接收天线在三维空间中观察多个方向的结果。无线自动测试设备确定一个或多个半导体组件是否按预期运行，并且可选地，可以使用三维空间的属性来确定一个或多个半导体组件的位置。无线测试设备还可以通过检测在独立测试操作之前，期间和/或之后由半导体晶片发射，传输和/或反射的红外能量来确定半导体组件的性能。

7. 发明申请

US20140372066A1 VARYING POWER LOAD CONDITIONS ON SYSTEMS UNDER TEST 有权
标题翻译：在测试系统上的变化的电源负载条件
公开(公告)号：US20140372066A1
公开(公告)日：2014-12-18
申请号：US13919247
申请日：2013-06-17
申请人： International Business Machines Corporation
发明人： Marc H. Coq , Anthony G. Gorey , Jason T. Hirst , Rohan A. Jones , Michel H. Joseph , Gerald G. Stanquist , Brian W. Stocker
IPC分类号： G01R31/40
CPC分类号： G06F1/26 , G01R31/2834 , G01R31/319
摘要： An apparatus includes a system test module that initiates a system power test for a computer system. The computer system includes one or more power supplies that provide power to system components. The system power test includes determining power system characteristics under various loading conditions. The apparatus includes a configure module that configures a system component during the system power test. The system component uses a higher amount of power after being configured than in a previous un-configured condition. The apparatus includes a de-configure module that de-configures the system component during the system power test. The system component uses a lower amount of power after being de-configured than in a previous configured condition. The apparatus includes a diagnostic module that measures power system performance of the computer system during varying loading conditions caused by configuring and de-configuring one or more system components by the configure module and the de-configure module.
摘要翻译：一种装置包括系统测试模块，其启动计算机系统的系统功率测试。计算机系统包括向系统组件提供电力的一个或多个电源。系统功率测试包括在各种负载条件下确定电力系统特性。该装置包括在系统功率测试期间配置系统组件的配置模块。在配置之后，系统组件使用的功率大于先前未配置的状态。该装置包括在系统功率测试期间解除配置系统组件的解除配置模块。系统组件在取消配置后使用的功率要小于先前配置的状态。该装置包括诊断模块，其在由配置模块和解除配置模块配置和解除配置一个或多个系统组件而导致的变化加载条件期间测量计算机系统的电力系统性能。

8. 发明授权

US08525509B2 Low cost simplified spectrum analyzer for magnetic head/media tester 有权
公开(公告)号：US08525509B2
公开(公告)日：2013-09-03
申请号：US11999169
申请日：2007-12-04
申请人： Lou Shrinkle , Peter Crill , Matthew Yee , David Hu
发明人： Lou Shrinkle , Peter Crill , Matthew Yee , David Hu
IPC分类号： G01R23/00
CPC分类号： G01R29/26 , G01R23/16 , G01R31/319 , G01R33/0029 , G01R33/1207
摘要： An electronic component tester characterizes electronic components such as magnetic head/media components measure performance parameters such as signal-to-noise ratio and overwrite evaluation. The electronic component tester has a tester process controller and a spectrum analyzer. The tester process controller generates calibration and control signals for the electronic component tester. The spectrum analyzer is in communication with electronic components such as magnetic head or media components to receive a response characterization signal resulting from a stimulus signal applied to the electronic components. The spectrum analyzer then determines a frequency spectrum of the response characterization signal. The spectrum analyzer is also in communication with the tester process controller for transferring the frequency spectrum to the tester process controller. The spectrum analyzer receives the calibration and control signals from the tester process controller for removing effects of an image frequency of the frequency spectrum and determining noise bandwidth of the frequency spectrum.

9. 发明申请

US20130218781A1 Alternator and Starter Tester with Warranty Code Functionality and Method 审中-公开
标题翻译：具有保修代码功能和方法的交流发电机和起动机测试仪
公开(公告)号：US20130218781A1
公开(公告)日：2013-08-22
申请号：US13402027
申请日：2012-02-22
申请人： Michael Simon , Garret Miller
发明人： Michael Simon , Garret Miller
IPC分类号： G06Q10/00 , G06F19/00
CPC分类号： G06Q10/20 , G01R31/319 , G01R31/343 , G06Q30/012
摘要： An alternator and starter tester system capable of generating a warranty claim code. The warranty claim code can contain information regarding a diagnostic test and the tested components. The alternator and starter tester system can also encode and transmit the warranty claim code to a supplier or a manufacturer to verify warranty credit.
摘要翻译：交流发电机和起动器测试仪系统，能够产生保修索赔代码。保修索赔代码可以包含关于诊断测试和测试组件的信息。交流发电机和起动器测试仪系统还可以将保修索赔代码编码并传送给供应商或制造商以验证保修信用。

10. 发明授权

US08386867B2 Computer memory test structure 有权
标题翻译：计算机内存测试结构
公开(公告)号：US08386867B2
公开(公告)日：2013-02-26
申请号：US12497391
申请日：2009-07-02
申请人： Chinsong Sul , Sungjoon Kim
发明人： Chinsong Sul , Sungjoon Kim
IPC分类号： G11C29/00
CPC分类号： G01R31/319 , G11C29/003 , G11C29/02 , G11C29/022 , G11C29/12 , G11C2029/5602
摘要： A method and apparatus for a computer memory test structure. An embodiment of a method for testing of a memory board includes testing a memory of the memory board, where testing the memory including use of a built-in self-test structure to provide a first test pattern for the memory. The method further includes testing an IO (input output) interface of the memory with a host, where testing of the IO interface includes use of the built-in self-test structure to provide a second test pattern for the IO interface.
摘要翻译：一种用于计算机存储器测试结构的方法和装置。用于测试存储器板的方法的实施例包括测试存储器板的存储器，其中测试存储器，包括使用内置的自检结构来为存储器提供第一测试图案。该方法还包括使用主机测试存储器的IO（输入输出）接口，其中IO接口的测试包括使用内置的自检结构为IO接口提供第二测试模式。

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