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1. 发明申请

US20160118124A1 Direct-Transfer Marching Memory And A Computer System Using The Same 审中-公开
标题翻译：直接传输内存和使用它的计算机系统
公开(公告)号：US20160118124A1
公开(公告)日：2016-04-28
申请号：US14877557
申请日：2015-10-07
申请人： Tadao Nakamura , Michael J. Flynn
发明人： Tadao Nakamura , Michael J. Flynn
IPC分类号： G11C16/10 , G11C16/32
CPC分类号： G11C16/10 , G11C16/32 , G11C19/184 , G11C19/28 , G11C19/282
摘要： A direct-transfer marching memory includes an array of memory units, each of the memory units having a sequence of bit-level cells so as to store information of byte size or word size, the information of byte size or word size is transferred synchronously, step by step, along a direction orthogonal to a direction of the sequence of bit-level cells, each of the bit-level cells encompassing an electron-storage region configured to accumulate cell-electrons. The cell-electrons accumulated in an electron-storage region in a subject memory unit is directly transferred to an adjacent electron-storage region, which is assigned in the next memory unit adjacent to the subject memory unit, the transfer of the cell-electrons is directly controlled by control signals, without using a combinational function of a logic gate circuit.
摘要翻译：直接传送行进存储器包括存储器单元阵列，每个存储器单元具有位级单元的序列，以便存储字节大小或字大小的信息，字节大小或字大小的信息被同步传送，沿着与位电平单元序列的方向正交的方向，每个位层单元包含构成为积累电池电子的电子存储区域。积存在被摄体存储单元的电子存储区域中的电池 - 电子被直接转移到与被摄体存储单元相邻的下一个存储单元中分配的相邻的电子存储区域，电池 - 电子的转移由控制信号直接控制，不使用逻辑门电路的组合功能。

2. 发明申请

US20150357044A1 SYSTEMS AND METHODS FOR ACOUSTIC WAVE ENABLED DATA STORAGE 有权
公开(公告)号：US20150357044A1
公开(公告)日：2015-12-10
申请号：US14296080
申请日：2014-06-04
申请人： Elwha LLC
发明人： Philip Lionel Barnes , Hon Wah Chin , Howard Lee Davidson , Kimberly D.A. Hallman , Roderick A. Hyde , Muriel Y. Ishikawa , Jordin T. Kare , Brian Lee , Richard T. Lord , Robert W. Lord , Craig J. Mundie , Nathan P. Myhrvold , Nicholas F. Pasch , Eric D. Rudder , Clarence T. Tegreene , Marc Tremblay , David B. Tuckerman , Charles Whitmer , Lowell L. Wood, JR.
IPC分类号： G11C19/28
CPC分类号： G11C19/282 , G11C11/56 , G11C19/28 , G11C19/287
摘要： The present disclosure provides systems and methods for storing, reading, and writing data using particle-based acoustic wave driven shift registers. The shift registers may physically shift particles along rows and/or columns of wells through the interactions of two parallel surfaces. A transducer may generate an acoustic wave to displace one or more of the two parallel surfaces. The particles may be transferred to and/or otherwise constrained by a buffer surface during at least a portion of the acoustic wave, such that the particles may be shifted during one or more cycles of the acoustic wave. In various embodiments, the amplitude of the acoustic wave may correspond to the spacing distance between each of the wells. The wells may be physical and/or potential wells.

3. 发明申请

US20130075918A1 SHIFT REGISTER MEMORY 失效
标题翻译：移位寄存器
公开(公告)号：US20130075918A1
公开(公告)日：2013-03-28
申请号：US13405692
申请日：2012-02-27
申请人： Yoshiaki FUKUZUMI , Hideaki AOCHI , Tomoko FUJIWARA
发明人： Yoshiaki FUKUZUMI , Hideaki AOCHI , Tomoko FUJIWARA
IPC分类号： H01L23/48
CPC分类号： B82Y10/00 , G11C19/00 , G11C19/282 , G11C19/38 , H01L27/1052 , H01L27/1057 , H01L27/115 , H01L27/11517 , H01L29/0676 , H01L29/068 , H01L29/788
摘要： In one embodiment, a shift register memory includes a substrate, and a channel layer provided on the substrate, and having a helical shape rotating around an axis which is perpendicular to a surface of the substrate. The memory further includes at least three control electrodes provided on the substrate, extending in a direction parallel to the axis, and to be used to transfer charges in the channel layer.
摘要翻译：在一个实施例中，移位寄存器存储器包括衬底和设置在衬底上的沟道层，并且具有围绕垂直于衬底表面的轴线旋转的螺旋形状。存储器还包括设置在基板上的至少三个控制电极，其在平行于该轴线的方向上延伸，并用于在沟道层中传送电荷。

4. 发明授权

US07846760B2 Doped plug for CCD gaps 有权
标题翻译：用于CCD间隙的掺杂插头
公开(公告)号：US07846760B2
公开(公告)日：2010-12-07
申请号：US11807911
申请日：2007-05-30
申请人： William D. Washkurak , Michael P. Anthony , Gerhard Sollner
发明人： William D. Washkurak , Michael P. Anthony , Gerhard Sollner
IPC分类号： H01L21/00
CPC分类号： H01L29/768 , G11C19/282 , G11C19/285 , H01L29/66954
摘要： A method and structure of providing a doped plug to improve the performance of CCD gaps is discussed. A highly-doped region is implemented in a semiconductor, aligned beneath a gap. The plug provides a highly-conductive region at the semiconductor surface, therefore preventing the development of a region where potential is significantly influenced by surface charges.
摘要翻译：讨论了提供掺杂插塞以提高CCD间隙性能的方法和结构。在半导体中实现高掺杂区域，在间隙下对齐。插头在半导体表面提供了高导电性区域，因此防止了电位受到表面电荷的显着影响的区域的发展。

5. 发明申请

US20090195297A1 CCD DEVICE AND METHOD OF DRIVING SAME 失效
标题翻译： CCD装置及其驱动方法
公开(公告)号：US20090195297A1
公开(公告)日：2009-08-06
申请号：US12360131
申请日：2009-01-27
申请人： Takao TSUZUKI
发明人： Takao TSUZUKI
IPC分类号： H03K3/01 , H01L31/02
CPC分类号： H01L29/76816 , G11C19/282 , H04N5/363 , H04N5/37213
摘要： Disclosed is a CCD device in which a charge transfer register of a CCD structure is connected to a charge detector via an output gate and has a reset gate between the charge detector and a reset drain, and an output gate pulse opposite in phase from a reset pulse applied to the reset gate is applied to the output gate. A dummy charge detector and an amplitude adjusting circuit are provided. On the basis of detection of the potential of a diffusion layer in the dummy charge detector, the amplitude adjusting circuit controls the amplitude of the output gate pulse applied to the output gate.
摘要翻译：公开了一种CCD器件，其中CCD结构的电荷转移寄存器经由输出栅极连接到电荷检测器，并且在电荷检测器和复位漏极之间具有复位栅极，以及与复位相反的输出栅极脉冲施加到复位门的脉冲被施加到输出门。提供虚拟电荷检测器和振幅调节电路。基于在虚拟电荷检测器中检测扩散层的电位的基础，幅度调整电路控制施加到输出栅极的输出门脉冲的幅度。

6. 发明授权

US07358474B2 System and method for time-delay integration imaging 有权
标题翻译：延时整合成像系统和方法
公开(公告)号：US07358474B2
公开(公告)日：2008-04-15
申请号：US11266564
申请日：2005-11-03
申请人： David John Flynn
发明人： David John Flynn
IPC分类号： G01C21/02 , G01C21/00 , G01B11/26 , H04B7/185
CPC分类号： H04N5/262 , G11C19/282
摘要： A system is provided that includes an optical arrangement, an assembly of a plurality of detectors, and a signal processor. The optical arrangement is capable of viewing a scene that includes an object, where the scene is capable of moving through a field of view of the optical arrangement during each of a plurality of transit periods. The detectors of the assembly are arranged in a vertical scanning direction corresponding to a direction of movement of the scene, and are separately capable of producing an image of the object for each transit period in accordance with a time-delay integration technique. The signal processor, then, is capable of determining the angular position of the object for each transit period based upon the images produced by the detectors.
摘要翻译：提供了一种包括光学装置，多个检测器的组件和信号处理器的系统。光学布置能够观看包括物体的场景，其中场景能够在多个传送期间的每一个期间移动通过光学布置的视场。组件的检测器被布置在与场景的移动方向相对应的垂直扫描方向上，并且能够根据时间延迟积分技术单独地产生每个传送周期的对象的图像。然后，信号处理器能够基于由检测器产生的图像来确定每个传送周期的对象的角位置。

7. 发明授权

US07355579B2 Display 有权
标题翻译：显示
公开(公告)号：US07355579B2
公开(公告)日：2008-04-08
申请号：US10838341
申请日：2004-05-05
申请人： Michiru Senda , Ryoichi Yokoyama
发明人： Michiru Senda , Ryoichi Yokoyama
IPC分类号： G09G3/36
CPC分类号： G11C19/282 , G09G3/20 , G09G3/3208 , G09G3/3674 , G09G3/3685 , G09G2310/0267 , G09G2310/0275 , G09G2330/021
摘要： There is provided a display having a shift register circuit which can prevent an increase in power consumption. The display is provide with a shift register circuit including a first circuit part comprising a fourth transistor turned on in response to a first signal to supply a clock signal to a first transistor, and a second circuit part comprising an eighth transistor turned on in response to a second signal by which a period of on state which does not overlap with a period of on state of the fourth transistor can be obtained, to supply the clock signal to a fifth transistor.
摘要翻译：提供了具有能够防止功耗增加的移位寄存器电路的显示器。该显示器提供一种移位寄存器电路，该移位寄存器电路包括第一电路部分，该第一电路部分包括响应于第一信号而导通的第四晶体管，以将时钟信号提供给第一晶体管;以及第二电路部分，包括响应于可以获得与第四晶体管的导通状态的周期不重叠的导通状态的周期的第二信号，以将时钟信号提供给第五晶体管。

8. 发明申请

US20070096772A1 System and method for time-delay integration imaging 有权
标题翻译：延时整合成像系统和方法
公开(公告)号：US20070096772A1
公开(公告)日：2007-05-03
申请号：US11266564
申请日：2005-11-03
申请人： David Flynn
发明人： David Flynn
IPC分类号： G11C27/02 , H03K5/00 , H03K17/00
CPC分类号： H04N5/262 , G11C19/282
摘要： A system is provided that includes an optical arrangement, an assembly of a plurality of detectors, and a signal processor. The optical arrangement is capable of viewing a scene that includes an object, where the scene is capable of moving through a field of view of the optical arrangement during each of a plurality of transit periods. The detectors of the assembly are arranged in a vertical scanning direction corresponding to a direction of movement of the scene, and are separately capable of producing an image of the object for each transit period in accordance with a time-delay integration technique. The signal processor, then, is capable of determining the angular position of the object for each transit period based upon the images produced by the detectors.
摘要翻译：提供了一种包括光学装置，多个检测器的组件和信号处理器的系统。光学布置能够观看包括物体的场景，其中场景能够在多个传送期间的每一个期间移动通过光学布置的视场。组件的检测器被布置在与场景的移动方向相对应的垂直扫描方向上，并且能够根据时间延迟积分技术单独地产生每个传送周期的对象的图像。然后，信号处理器能够基于由检测器产生的图像来确定每个传送周期的对象的角位置。

9. 发明授权

US07105371B2 Method of acquiring an image from an optical structure having pixels with dedicated readout circuits 有权
标题翻译：从具有专用读出电路的像素的光学结构获取图像的方法
公开(公告)号：US07105371B2
公开(公告)日：2006-09-12
申请号：US10712844
申请日：2003-11-12
申请人： Eric R. Fossum , Sunetra Mendis , Sabrina E. Kemeny
发明人： Eric R. Fossum , Sunetra Mendis , Sabrina E. Kemeny
IPC分类号： H01L29/04
CPC分类号： H01L27/1485 , G11C19/282 , G11C19/285 , H01L27/14601 , H01L27/14621 , H01L27/14627 , H01L27/14645 , H01L27/14656 , H01L27/14843 , H01L27/14887 , H01L31/02162 , H01L31/0232 , H04N5/3575 , H04N5/361 , H04N5/363 , H04N5/3658 , H04N5/374 , H04N5/3745 , H04N5/37452 , H04N5/378 , H04N9/045
摘要： An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.
摘要翻译：一种在工业标准互补金属氧化物半导体工艺中形成为单片互补金属氧化物半导体集成电路的成像装置，该集成电路包括像素单元的焦平面阵列，每个单元包括覆盖基板的光栅，在衬底的底层部分产生的电荷，至少包括形成在衬底中的输出场效应晶体管的读出电路和形成在邻近光栅的衬底上的电荷耦合器件部分，其具有连接到输出晶体管的感测节点，至少一个电荷耦合器件级，用于将电荷从衬底的下面部分转移到感测节点。

10. 发明授权

US07003068B2 Device for subtracting or adding a constant amount of charge in a charge-coupled device at high operating frequencies 失效
标题翻译：用于在高工作频率下在电荷耦合器件中减去或增加恒定量的电荷的装置
公开(公告)号：US07003068B2
公开(公告)日：2006-02-21
申请号：US10872820
申请日：2004-06-21
申请人： Lawrence J. Kushner , Michael P. Anthony , Edward Kohler
发明人： Lawrence J. Kushner , Michael P. Anthony , Edward Kohler
IPC分类号： G11C19/28 , H03K23/46
CPC分类号： G11C19/282 , G11C19/287 , H01L27/14806
摘要： A circuit for adding or subtracting an amount of charge from a charge sample, such as in a Charge Coupled Device (CCD), by portioning and pipelining the processing stages, to avoid introducing a memory effect. The operation, such as subtraction, is split into multiple stages, with each stage responsible for removing only a portion of the total amount of charge that is desired to be removed. The subtraction pipeline stages operate together to remove the total desired charge amount. In one embodiment each successive subtraction stage removes a corresponding lesser amount of charge. As a result, greater accuracy in the amount of charge removed is achieved as well operation at higher frequencies than previous charge subtraction approaches.
摘要翻译：用于通过对处理级进行分段和流水线从电荷样本（例如电荷耦合器件（CCD））中增加或减少电荷量的电路，以避免引入记忆效应。诸如减法的操作被分成多个阶段，每个阶段负责仅去除期望被移除的总电荷量的一部分。减法流水线级共同操作以去除总计的所需电荷量。在一个实施例中，每个连续的减法阶段去除相应较少量的电荷。结果，实现了去除电荷量的更高精度以及在比先前的电荷减法方法更高的频率下的操作。

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