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1. 发明授权

US09640396B2 Spin-on spacer materials for double- and triple-patterning lithography 有权
公开(公告)号：US09640396B2
公开(公告)日：2017-05-02
申请号：US12652464
申请日：2010-01-05
申请人： Qin Lin , Rama Puligadda , James Claypool , Douglas J. Guerrero , Brian Smith
发明人： Qin Lin , Rama Puligadda , James Claypool , Douglas J. Guerrero , Brian Smith
IPC分类号： H01L21/308 , B31D3/00 , H01L21/311 , H01L21/033 , C08G77/20 , G03F7/40 , H01L21/312
CPC分类号： H01L21/0337 , C08G77/20 , G03F7/40 , H01L21/0338 , H01L21/3121
摘要： Novel double- and triple-patterning methods are provided. The methods involve applying a shrinkable composition to a patterned template structure (e.g., a structure having lines) and heating the composition. The shrinkable composition is selected to possess properties that will cause it to shrink during heating, thus forming a conformal layer over the patterned template structure. The layer is then etched to leave behind pre-spacer structures, which comprise the features from the pattern with remnants of the shrinkable composition adjacent the feature sidewalls. The features are removed, leaving behind a doubled pattern. In an alternative embodiment, an extra etch step can be carried out prior to formation of the features on the template structure, thus allowing the pattern to be tripled rather than doubled.

2. 发明授权

US09484248B2 Patternable dielectric film structure with improved lithography and method of fabricating same 有权
标题翻译：具有改进光刻技术的可雕刻电介质膜结构及其制造方法
公开(公告)号：US09484248B2
公开(公告)日：2016-11-01
申请号：US13219144
申请日：2011-08-26
申请人： Qinghuang Lin , Deborah A. Neumayer
发明人： Qinghuang Lin , Deborah A. Neumayer
IPC分类号： H01L21/31 , H01L21/469 , H01L21/768 , H01L21/02 , H01L21/027 , H01L21/312 , H01L21/314 , H01L23/532
CPC分类号： H01L21/76808 , H01L21/02118 , H01L21/02167 , H01L21/02274 , H01L21/02282 , H01L21/0276 , H01L21/31 , H01L21/3121 , H01L21/3122 , H01L21/3148 , H01L21/76832 , H01L21/76835 , H01L21/76843 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2221/1031 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： A method of fabricating an interconnect structure in which a patternable low-k material replaces the need for utilizing a separate photoresist and a dielectric material. Specifically, a method is provided that includes providing at least one patternable low-k material on a surface of an inorganic antireflective coating. The inorganic antireflective coating is vapor deposited and contains atoms of M, C and H wherein M is at least one of Si, Ge, B, Sn, Fe, Ta, Ti, Ni, Hf and La. At least one interconnect pattern is then formed within the at least one patternable low-k material. Next, the at least one patternable low-k material containing the at least one interconnect pattern is cured.
摘要翻译：制造互连结构的方法，其中可图案化的低k材料替代了使用单独的光致抗蚀剂和电介质材料的需要。具体地，提供了一种方法，其包括在无机抗反射涂层的表面上提供至少一种可图案化的低k材料。无机抗反射涂层是气相沉积的并含有M，C和H的原子，其中M是Si，Ge，B，Sn，Fe，Ta，Ti，Ni，Hf和La中的至少一种，然后至少一个互连图案形成在至少一个可图案化的低k材料内。接下来，固化包含至少一个互连图案的至少一个可图案化的低k材料。

3. 发明申请

US20140017904A1 FLOWABLE FILM DIELECTRIC GAP FILL PROCESS 有权
标题翻译：流动膜电介质膜填充工艺
公开(公告)号：US20140017904A1
公开(公告)日：2014-01-16
申请号：US13935398
申请日：2013-07-03
申请人： Novellus Systems, Inc.
发明人： Vishal GAURI , Raashina HUMAYUN , Chi-I LANG , Judy H. HUANG , Michael BARNES , Sunil SHANKER
IPC分类号： H01L21/31
CPC分类号： H01L21/31 , C23C16/045 , C23C16/401 , C23C16/56 , H01L21/02164 , H01L21/02271 , H01L21/0234 , H01L21/3121 , H01L21/3122 , H01L21/31608 , H01L21/76224
摘要： Methods of this invention relate to filling gaps on substrates with a solid dielectric material by forming a flowable film in the gap. The flowable film provides consistent, void-free gap fill. The film is then converted to a solid dielectric material. In this manner gaps on the substrate are filled with a solid dielectric material. According to various embodiments, the methods involve reacting a dielectric precursor with an oxidant to form the dielectric material. In certain embodiments, the dielectric precursor condenses and subsequently reacts with the oxidant to form dielectric material. In certain embodiments, vapor phase reactants react to form a condensed flowable film.
摘要翻译：本发明的方法涉及通过在间隙中形成可流动的膜来填充具有固体电介质材料的衬底上的间隙。可流动膜提供一致的，无空隙的间隙填充。然后将膜转化成固体电介质材料。以这种方式，用固体电介质材料填充衬底上的间隙。根据各种实施方案，所述方法包括使电介质前体与氧化剂反应以形成电介质材料。在某些实施方案中，电介质前体冷凝并随后与氧化剂反应以形成电介质材料。在某些实施方案中，气相反应物反应形成冷凝的可流动的膜。

4. 发明授权

US08389589B2 Nanoporous media with lamellar structures 失效
公开(公告)号：US08389589B2
公开(公告)日：2013-03-05
申请号：US12338692
申请日：2008-12-18
申请人： Jennifer Nam Cha , Geraud Jean-Michel Dubois , James Lupton Hedrick , Ho-Cheol Kim , Victor Yee-Way Lee , Teddie Peregrino Magbitang , Robert Dennis Miller , Willi Volksen
发明人： Jennifer Nam Cha , Geraud Jean-Michel Dubois , James Lupton Hedrick , Ho-Cheol Kim , Victor Yee-Way Lee , Teddie Peregrino Magbitang , Robert Dennis Miller , Willi Volksen
IPC分类号： B05D3/02 , B05D3/10
CPC分类号： H01L21/3121 , G03F7/0002 , H01L21/02118 , H01L21/02126 , H01L21/02203 , H01L21/02216 , H01L21/02282 , H01L21/312 , H01L21/31695 , Y10T428/249953 , Y10T428/31663
摘要： A nanoporous material exhibiting a lamellar structure is disclosed. The material comprises three or more substantially parallel sheets of an organosilicate material, separated by highly porous spacer regions. The distance between the centers of the sheets lies between 1 nm and 50 nm. The highly porous spacer regions may be substantially free of condensed material. For the manufacture of such materials, a process is disclosed in which matrix non-amphiphilic polymeric material and templating polymeric material are dispersed in a solvent, where the templating polymeric material includes a polymeric amphiphilic material. The solvent with the polymeric materials is distributed onto a substrate. Organization is induced in the templating polymeric material. The solvent is removed, leaving the polymeric materials in place. The matrix polymeric material is cured, forming a lamellar structure.

5. 发明授权

US08378489B2 Semiconductor device and manufacturing method therefor 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08378489B2
公开(公告)日：2013-02-19
申请号：US12544371
申请日：2009-08-20
申请人： Shiro Ozaki , Yoshihiro Nakata , Yasushi Kobayashi , Ei Yano
发明人： Shiro Ozaki , Yoshihiro Nakata , Yasushi Kobayashi , Ei Yano
IPC分类号： H01L29/40
CPC分类号： H01L21/76834 , C09D183/16 , H01L21/02123 , H01L21/02304 , H01L21/02343 , H01L21/312 , H01L21/3121 , H01L21/3125
摘要： A semiconductor device of this invention has a copper wiring layer, of which a layer, to which a composition including at least one substance selected from the group consisting of ammonia and organic bases is applied, and a silicon-containing insulating film are sequentially superimposed on the copper wiring layer. Accordingly, semiconductor devices having insulating layers which adheres well to the copper serving as the wiring material can be obtained.
摘要翻译：本发明的半导体器件具有铜布线层，其中施加了包含选自氨和有机碱的至少一种物质的组合物的层，并且将含硅绝缘膜依次叠加在铜布线层。因此，可以获得具有与用作布线材料的铜附着良好的绝缘层的半导体器件。

6. 发明授权

US08372760B2 Method and system for using ion implantation for treating a low-k dielectric film 有权
标题翻译：用于处理低k电介质膜的离子注入的方法和系统
公开(公告)号：US08372760B2
公开(公告)日：2013-02-12
申请号：US10857935
申请日：2004-06-02
申请人： Kenneth Duerksen , David A. Vidusek
发明人： Kenneth Duerksen , David A. Vidusek
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/3105 , H01L21/02126 , H01L21/02134 , H01L21/02137 , H01L21/02203 , H01L21/02271 , H01L21/02282 , H01L21/02351 , H01L21/31058 , H01L21/31155 , H01L21/312 , H01L21/3121 , H01L21/67005
摘要： A system and method for forming a mechanically strengthened low-k dielectric film on a substrate includes using either spin-on-dielectric (SOD) techniques, or chemical vapor deposition (CVD) techniques to form a low-k dielectric film on the substrate. An upper surface of the low-k dielectric film is then treated in order to increase the film's mechanical strength, or reduce its dielectric constant.
摘要翻译：用于在衬底上形成机械强化的低k电介质膜的系统和方法包括使用旋涂电介质（SOD）技术或化学气相沉积（CVD）技术在衬底上形成低k电介质膜。然后处理低k电介质膜的上表面以增加膜的机械强度或降低其介电常数。

7. 发明申请

US20120100298A1 PRODUCT OF POLYSILOXANE CONDENSATION 有权
标题翻译：多异氰酸酯缩合产物
公开(公告)号：US20120100298A1
公开(公告)日：2012-04-26
申请号：US13380630
申请日：2010-06-24
申请人： Reiko Moriyama , Hideo Saito , Syouzou Takada , Ichirou Doi
发明人： Reiko Moriyama , Hideo Saito , Syouzou Takada , Ichirou Doi
IPC分类号： B05D5/00 , C08K5/05 , B05D3/00 , C08K5/07 , C08K5/10 , C08L83/04 , C08K5/06
CPC分类号： C08L83/04 , C08G77/02 , C08G77/04 , C08K3/36 , C08K2201/016 , H01L21/02123 , H01L21/02208 , H01L21/02282 , H01L21/3121 , H01L51/448 , Y10T428/31663 , C08L83/00
摘要： Provided is a condensation reaction product solution which is particularly suitable for filling a trench formed on a substrate having a narrow width and a high aspect ratio. The condensation reaction product solution has a long pot life, superior trench-filling when used for trench-filling, and a low cure shrinkage, an excellent crack resistance and a HF resistance when cured and converted into silicon oxide. The condensation reaction product solution comprises (I) a condensation reaction product obtained by condensation reaction from a condensation component comprising (i) 40% by mass or more and 99% by mass or less in equivalent of condensate of polysiloxane compound derived from silane compounds represented by the general formula (1): R1nSiX14-n (wherein n is an integer of 0 to 3, R1 is hydrogen atom or a C1-10 hydrocarbon group, and X1 is a halogen atom, a C1-6 alkoxy group or acetoxy group) and (ii) 1% by mass or more and 60% by mass or less of silica particles, and (II) a solvent, wherein the silane compounds represented by the general formula (1) are two or more types of silane compounds comprising a tetrafunctional silane compound which corresponds to the case of n=0 in the general formula (1) and a trifunctional silane compound which corresponds to the case of n=1 in the general formula (1).
摘要翻译：提供了一种缩合反应产物溶液，其特别适用于填充形成在具有窄宽度和高纵横比的基底上的沟槽。缩合反应产物溶液具有长的适用期，用于沟槽填充时具有优异的沟槽填充性，并且固化和转化为氧化硅时具有低固化收缩率，优异的抗裂性和耐HF性。缩合反应产物溶液包含（I）通过缩合反应得到的缩合反应产物，该缩合反应产物包含（i）40质量％以上且99质量％以下，相当于衍生自表示的硅烷化合物的聚硅氧烷化合物的缩合物通式（1）表示：R1nSiX14-n（其中n为0〜3的整数，R1为氢原子或C1-10烃基，X1为卤素原子，C1-6烷氧基或乙酰氧基））和（ii）1质量％以上且60质量％以下的二氧化硅颗粒，和（II）溶剂，其中由通式（1）表示的硅烷化合物是两种或更多种类型的硅烷化合物，其包含对应于通式（1）中n = 0的情况的四官能硅烷化合物和通式（1）中n = 1的情况下的三官能性硅烷化合物。

8. 发明申请

US20110316117A1 DIE PACKAGE AND A METHOD FOR MANUFACTURING THE DIE PACKAGE 审中-公开
标题翻译： DIE包装和制造DIE包装的方法
公开(公告)号：US20110316117A1
公开(公告)日：2011-12-29
申请号：US12673503
申请日：2008-08-12
申请人： Vaidyanathan Kripesh , Navas Khan Oratti Kalandar , Srinivasa Rao Vempati , Aditya Kumar , Soon Wee Ho , Yak Long Samuel Lim , Gaurav Sharma , Wen Sheng Vincent Lee
发明人： Vaidyanathan Kripesh , Navas Khan Oratti Kalandar , Srinivasa Rao Vempati , Aditya Kumar , Soon Wee Ho , Yak Long Samuel Lim , Gaurav Sharma , Wen Sheng Vincent Lee
IPC分类号： H01L29/02 , H01L23/498 , H01L23/552 , H01L21/50 , H01L23/48
CPC分类号： H01L21/02255 , H01L21/02118 , H01L21/02126 , H01L21/02164 , H01L21/02167 , H01L21/0217 , H01L21/022 , H01L21/02271 , H01L21/02282 , H01L21/3121 , H01L21/316 , H01L21/76807 , H01L21/76828 , H01L21/76835 , H01L21/76897 , H01L21/823425 , H01L21/823475 , H01L21/823481 , H01L21/823871 , H01L21/823878 , H01L23/53295 , H01L24/19 , H01L24/96 , H01L2224/32145 , H01L2924/13091 , H01L2924/14 , H01L2924/1461 , H01L2924/181 , H01L2924/19105 , H01L2924/3511 , H01L2924/00
摘要： A die package and a method for manufacturing the die package are provided. The die package includes a second die arranged above a first die, the first die comprising an interconnect region on a surface facing the second die, wherein the second die is arranged laterally next to the interconnect region of the first die; a first package-internal free-standing interconnect structure disposed above the interconnect region of the first die; a second package-internal free-standing interconnect structure disposed above an interconnect region of the second die, the interconnect region of the second die being on a surface of the second die facing away from the first die; and package material formed partially around the first package-internal free-standing interconnect structure and the second package-internal free-standing interconnect structure such that a connecting portion of the first package-internal free-standing interconnect structure and a connecting portion of the second package-internal free-standing interconnect structure remains uncovered to be electrically connected to a package-external interconnect structure.
摘要翻译：提供了一种管芯封装和用于制造管芯封装的方法。所述管芯封装包括布置在第一管芯上方的第二管芯，所述第一管芯包括在面向所述第二管芯的表面上的互连区域，其中所述第二管芯横向布置在所述第一管芯的互连区域旁边; 设置在所述第一管芯的所述互连区域上方的第一封装 - 内部独立互连结构; 设置在所述第二管芯的互连区域上方的第二封装内部独立互连结构，所述第二管芯的互连区域位于所述第二管芯的远离所述第一管芯的表面上; 以及部分地围绕第一包装内部独立互连结构形成的包装材料和第二包装内部独立互连结构，使得第一包装内部独立互连结构的连接部分和第二包装内部独立互连结构的连接部分封装内部独立的互连结构保持未覆盖以电连接到封装 - 外部互连结构。

9. 发明申请

US20110237085A1 METHODS OF MODIFYING INTERLAYER ADHESION 有权
标题翻译：修改层间粘合的方法
公开(公告)号：US20110237085A1
公开(公告)日：2011-09-29
申请号：US13152865
申请日：2011-06-03
申请人： FRANCIMAR CAMPANA SCHMITT , Li-Qun Xia , Son Van Nguyen , Shankar Venkataraman
发明人： FRANCIMAR CAMPANA SCHMITT , Li-Qun Xia , Son Van Nguyen , Shankar Venkataraman
IPC分类号： H01L21/31
CPC分类号： H01L21/76835 , C23C16/0272 , C23C16/30 , C23C16/325 , C23C16/505 , C23C16/56 , H01L21/02126 , H01L21/02167 , H01L21/022 , H01L21/02203 , H01L21/02211 , H01L21/02274 , H01L21/0228 , H01L21/02304 , H01L21/0234 , H01L21/02351 , H01L21/3105 , H01L21/31058 , H01L21/3121 , H01L21/3148 , H01L21/31633 , H01L21/76801 , H01L21/7681 , H01L21/76825 , H01L21/76826 , H01L21/76829 , H01L21/76832
摘要： Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including depositing a barrier layer on the substrate, wherein the barrier layer comprises silicon and carbon and has a dielectric constant less than 4, depositing a dielectric initiation layer adjacent the barrier layer, and depositing a first dielectric layer adjacent the dielectric initiation layer, wherein the dielectric layer comprises silicon, oxygen, and carbon and has a dielectric constant of about 3 or less.
摘要翻译：提供了用于处理用于沉积在两个低k电介质层之间具有低介电常数的粘合层的衬底的方法。一方面，本发明提供了一种处理衬底的方法，包括在衬底上沉积阻挡层，其中阻挡层包括硅和碳并具有小于4的介电常数，沉积与阻挡层相邻的电介质起始层，以及沉积与电介质起始层相邻的第一电介质层，其中介电层包括硅，氧和碳并且具有约3或更小的介电常数。

10. 发明授权

US08026164B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08026164B2
公开(公告)日：2011-09-27
申请号：US12603207
申请日：2009-10-21
申请人： Satoshi Takesako , Shinichi Akiyama , Tamotsu Owada
发明人： Satoshi Takesako , Shinichi Akiyama , Tamotsu Owada
IPC分类号： H01L21/4763
CPC分类号： H01L21/76825 , H01L21/02123 , H01L21/02211 , H01L21/02216 , H01L21/02282 , H01L21/02351 , H01L21/3105 , H01L21/31053 , H01L21/3121 , H01L21/3212 , H01L21/76819 , H01L21/76835 , H01L21/7684 , H01L23/53295 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： A method of manufacturing a semiconductor device, includes steps of forming an organic insulating film over a semiconductor substrate, irradiating an electron beam to a surface of the organic insulating film, forming recesses in the organic insulating film, forming a conductive material over the organic insulating film and in the recesses, and removing the conductive material on the organic insulating film by a polishing to expose the surface of the organic insulating film and to leave the conductive material buried in recesses of the organic insulating film.
摘要翻译：一种制造半导体器件的方法，包括以下步骤：在半导体衬底上形成有机绝缘膜，将电子束照射到有机绝缘膜的表面，在有机绝缘膜中形成凹部，在有机绝缘体上形成导电材料膜和凹部中，通过研磨去除有机绝缘膜上的导电材料，露出有机绝缘膜的表面，并将导电材料留在有机绝缘膜的凹部中。

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