专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明公开

US20230327609A1 AMPLIFIER CIRCUIT WITH PROTECTION CIRCUIT 审中-公开
公开(公告)号：US20230327609A1
公开(公告)日：2023-10-12
申请号：US18123818
申请日：2023-03-20
申请人： Skyworks Solutions, Inc.
发明人： Netsanet Gebeyehu
IPC分类号： H03F1/30 , H03F3/24
CPC分类号： H03F1/30 , H03F3/245 , H03F2200/451 , H03F2200/426 , H03F2200/441 , H03F2200/153
摘要： An amplifier circuit comprising: a power amplifier; a bias control circuit coupled to the power amplifier and having a voltage sensor configured to sense a bias voltage to the power amplifier, the bias control circuit being configured to determine whether the bias voltage exceeds a threshold voltage; and a protection circuit coupled to the power amplifier, the bias control circuit being further configured to control the protection circuit to apply a clamping status to limit a power output of the power amplifier to a predetermined value in response to the bias control circuit determining that the bias voltage exceeds a threshold voltage.

2. 发明授权

US10622956B2 Signal level detection and overrange signal limiter and clamp for electronic circuits 有权
公开(公告)号：US10622956B2
公开(公告)日：2020-04-14
申请号：US16592379
申请日：2019-10-03
申请人： Analog Devices, Inc.
发明人： Huseyin Dinc , Ronald Bryce Gray, III , Ahmed Mohamed Abdelatty Ali
IPC分类号： H03G3/30 , H03F3/45 , H03F1/52
CPC分类号： H03G3/30 , H03F1/523 , H03F3/45183 , H03F2200/258 , H03F2200/435 , H03F2200/441 , H03F2200/78
摘要： One embodiment is an apparatus including a detector circuit electrically coupled between a signal source and a second circuit, the signal source generating a first signal, the detector circuit detecting a level of the first signal and generating a first control signal when the detected level of the first signal exceeds a first threshold value, and a clamping switch electrically coupled to receive the first control signal from the detector circuit, the clamping switch including a multi-terminal active device. The first control signal controls a state of the clamping switch such that the clamping switch clamps a level of a signal applied to the second circuit when the level of the first signal exceeds the first threshold value.

3. 发明授权

US09991852B2 System and method for close-down pop reduction 有权
公开(公告)号：US09991852B2
公开(公告)日：2018-06-05
申请号：US15528934
申请日：2015-11-02
申请人： ICEpower a/s
发明人： Kennet Skov Andersen
IPC分类号： H03F1/14 , H03F1/30 , H03F3/183 , H03G3/30 , H03F3/217 , H03F1/02
CPC分类号： H03F1/305 , H03F1/02 , H03F3/183 , H03F3/187 , H03F3/217 , H03F3/2173 , H03F2200/03 , H03F2200/129 , H03F2200/135 , H03F2200/144 , H03F2200/156 , H03F2200/258 , H03F2200/342 , H03F2200/426 , H03F2200/441 , H03F2200/444 , H03F2200/66 , H03F2200/78 , H03G3/301 , H03G3/348 , H03G2201/106
摘要： A close-down pop reduction system and a method for close-down pop reduction in an audio amplifier assembly are disclosed. The switching power conversion system comprises a forward path having a compensator and a switching power stage and a signal path from an output of a comparator in the switching power stage to a sequence control unit. The signal path includes a close-down timing circuit configured to provide a timing signal. The sequence control unit is configured to eliminate the input signal, increase the switch frequency of the close-down pop reduction system and disable the switching power stage at a moment in time within a PWM pulse of the switching power stage. Hereby, it is e.g. possible to minimize the audible pop during close-down of audio amplifier assemblies.

4. 发明申请

US20170317651A1 A SYSTEM AND METHOD FOR CLOSE-DOWN POP REDUCTION 有权
公开(公告)号：US20170317651A1
公开(公告)日：2017-11-02
申请号：US15528934
申请日：2015-11-02
申请人： ICEpower a/s
发明人： Kennet Skov Andersen
IPC分类号： H03F1/30 , H03F1/02 , H03G3/30 , H03F3/183 , H03F3/217
CPC分类号： H03F1/305 , H03F1/02 , H03F3/183 , H03F3/187 , H03F3/217 , H03F3/2173 , H03F2200/03 , H03F2200/129 , H03F2200/135 , H03F2200/144 , H03F2200/156 , H03F2200/258 , H03F2200/342 , H03F2200/426 , H03F2200/441 , H03F2200/444 , H03F2200/66 , H03F2200/78 , H03G3/301 , H03G3/348 , H03G2201/106
摘要： A close-down pop reduction system and a method for close-down pop reduction in an audio amplifier assembly are disclosed. The switching power conversion system comprises a forward path having a compensator and a switching power stage and a signal path from an output of a comparator in the switching power stage to a sequence control unit. The signal path includes a close-down timing circuit configured to provide a timing signal. The sequence control unit is configured to eliminate the input signal, increase the switch frequency of the close-down pop reduction system and disable the switching power stage at a moment in time within a PWM pulse of the switching power stage. Hereby, it is e.g. possible to minimize the audible pop during close-down of audio amplifier assemblies.

5. 发明申请

US20170272061A1 VOLTAGE CLAMPING CIRCUIT 审中-公开
公开(公告)号：US20170272061A1
公开(公告)日：2017-09-21
申请号：US15251710
申请日：2016-08-30
申请人： Industrial Technology Research Institute
发明人： Yu-Lee Yeh , Chien-Nan Kuo
IPC分类号： H03K5/08
CPC分类号： H03K5/08 , H03F3/211 , H03F3/45085 , H03F3/45475 , H03F2200/408 , H03F2200/411 , H03F2200/441 , H03F2203/45701 , H03G3/341 , H03G3/348 , H03G11/00
摘要： A voltage clamping circuit is provided. In an embodiment, the voltage clamping circuit includes a plurality of gain shifting circuits and a signal processing circuit. The plurality of gain shifting circuits receive an input voltage and voltage levels to generate a plurality of shifted voltages. The signal processing circuit generates a difference value of the plurality of shifted voltages to generate an output voltage according to the difference value, such that the voltage clamping circuit achieves an implementation of a passing band or a rejection of the input voltage.

6. 发明申请

US20170019075A1 RF AMPLIFIER 有权
标题翻译：射频放大器
公开(公告)号：US20170019075A1
公开(公告)日：2017-01-19
申请号：US15209816
申请日：2016-07-14
申请人： NXP B.V.
发明人： Gian Hoogzaad
IPC分类号： H03F1/52 , H03F3/195
CPC分类号： H03F1/52 , H03F3/195 , H03F3/45475 , H03F2200/18 , H03F2200/258 , H03F2200/294 , H03F2200/426 , H03F2200/441 , H03F2200/444 , H03F2200/451 , H03F2200/462 , H03F2200/481 , H03F2200/489 , H03F2200/492 , H03F2200/78
摘要： An RF amplifier comprising an input-transistor having an input-transistor-base terminal, an input-transistor-collector terminal and an input-transistor-emitter terminal; a degeneration-component connected between the input-transistor-emitter terminal and a ground terminal; and a protection-transistor having a protection-transistor-base terminal, a protection-transistor-collector terminal and a protection-transistor-emitter terminal. The input-transistor-base terminal is connected to the protection-transistor-emitter terminal, and the protection-transistor-base terminal is connected to the input-transistor-emitter.
摘要翻译：一种RF放大器，包括具有输入晶体管基极端子的输入晶体管，输入晶体管集电极端子和输入晶体管 - 发射极端子; 连接在输入 - 晶体管 - 发射极端子和接地端子之间的退化分量; 以及具有保护晶体管基极端子的保护晶体管，保护晶体管集电极端子和保护晶体管 - 发射极端子。输入晶体管基极端子连接到保护晶体管 - 发射极端子，保护晶体管基极端子连接到输入晶体管 - 发射极。

7. 发明授权

US09543905B2 Amplifier circuit 有权
标题翻译：放大器电路
公开(公告)号：US09543905B2
公开(公告)日：2017-01-10
申请号：US14594773
申请日：2015-01-12
申请人： Seiko Instruments Inc.
发明人： Tsutomu Tomioka
IPC分类号： H03F1/52 , H03F1/22
CPC分类号： H03F1/523 , H03F1/223 , H03F2200/441
摘要： Provided is an amplifier circuit including an NMOS transistor having a low drain breakdown voltage and an NMOS transistor having a high drain breakdown voltage connected in series thereto, and capable of preventing breakdown of a drain of the NMOS transistor having a low drain breakdown voltage. A clamp circuit configured to limit a drain voltage of the NMOS transistor having a low drain breakdown voltage is connected to the drain thereof.
摘要翻译：提供了包括具有低漏极击穿电压的NMOS晶体管和具有与其串联连接的高漏极击穿电压的NMOS晶体管的放大器电路，并且能够防止具有低漏极击穿电压的NMOS晶体管的漏极击穿。配置成限制具有低漏极击穿电压的NMOS晶体管的漏极电压的钳位电路连接到其漏极。

8. 发明授权

US09461598B2 Power amplifier 有权
标题翻译：功率放大器
公开(公告)号：US09461598B2
公开(公告)日：2016-10-04
申请号：US14613455
申请日：2015-02-04
申请人： STMicroelectronics (Shenzhen) R&D Co. Ltd , STMicroelectronics S.r.l.
发明人： Kelvin Jian Wen , Mei Yang , Zheng Hua Song , Xian Xiong , Cristiano Meroni
IPC分类号： H03F3/45 , H03F3/187
CPC分类号： H03F3/187 , H03F3/45475 , H03F3/45941 , H03F2200/03 , H03F2200/441 , H03F2203/45138 , H03F2203/45418 , H03F2203/45424 , H03F2203/45528 , H03F2203/45541
摘要： A power amplifier includes a clamping circuit configured to provide a clamped voltage from a power supply; an amplifier pair having first inputs coupled to the clamping circuit, second inputs and an output for providing an amplified signal; and a biasing circuit coupled between the clamping circuit and the second inputs. The biasing circuit is configured to adjust input bias voltages of the amplifier pair such that the output of the amplifier pair varies proportionally to a change of the power supply.
摘要翻译：功率放大器包括被配置为提供来自电源的钳位电压的钳位电路; 放大器对，其具有耦合到所述钳位电路的第一输入，第二输入和用于提供放大信号的输出; 以及耦合在所述钳位电路和所述第二输入之间的偏置电路。偏置电路被配置为调整放大器对的输入偏置电压，使得放大器对的输出与电源的变化成比例地变化。

9. 发明授权

US09276531B2 Apparatus and methods for amplifier input protection 有权
标题翻译：放大器输入保护的装置和方法
公开(公告)号：US09276531B2
公开(公告)日：2016-03-01
申请号：US14262255
申请日：2014-04-25
申请人： Analog Devices, Inc.
发明人： Moshe Gerstenhaber , Rayal Johnson
IPC分类号： H03F1/52 , H03F3/16
CPC分类号： H03F1/523 , H03F3/16 , H03F3/45475 , H03F2200/441 , H03F2200/471 , H03F2203/45552
摘要： Apparatus and methods for amplifier input protection are provided. In certain implementations, an amplifier input protection circuit includes a first JFET electrically connected between a first input and a first output, and a second JFET electrically connected between a second input and a second output. Additionally, a first clamp is electrically connected to the first output, and a second clamp is electrically connected to the second output. A first current mirror mirrors a current through the first clamp, and provides the mirrored current to a third JFET electrically connected between the first JFET's source and gate. Additionally, a second current mirror that mirrors a current through the second clamp, and provides the mirrored current to a fourth JFET that is electrically connected between a source and gate of the second JFET. Configuring the protection circuit in this manner can provide the benefits of both low noise and low fault current.
摘要翻译：提供放大器输入保护的装置和方法。在某些实施方案中，放大器输入保护电路包括电连接在第一输入端和第一输出端之间的第一JFET以及电连接在第二输入端和第二输出端之间的第二JFET。另外，第一钳位电连接到第一输出端，第二钳位电连接到第二输出。第一电流镜反射通过第一夹具的电流，并将镜像电流提供到电连接在第一JFET源极和栅极之间的第三JFET。另外，第二电流镜反射通过第二夹具的电流，并且将镜像电流提供给电连接在第二JFET的源极和栅极之间的第四JFET。以这种方式配置保护电路可以提供低噪声和低故障电流的优点。

10. 发明授权

US09136796B2 Negative audio signal voltage protection circuit and method for audio ground circuits 有权
标题翻译：用于音频接地电路的负音频信号电压保护电路和方法
公开(公告)号：US09136796B2
公开(公告)日：2015-09-15
申请号：US13920302
申请日：2013-06-18
申请人： Texas Instruments Incorporated
发明人： David H. Elwart, II , Vikas Suma Vinay , Christopher M. Graves , Baher S. Haroun
IPC分类号： H04B15/00 , H03F1/30 , H02H9/04
CPC分类号： H03F1/305 , H02H9/045 , H03F1/523 , H03F3/187 , H03F3/68 , H03F2200/441 , H03F2200/444 , H03F2200/555 , H03K17/6874 , H03K2217/0018
摘要： Self-grounded circuitry (10) includes a signal channel conducting an output voltage (VOUT1). A charge pump (2) powered by a reference voltage (VDD) produces a control voltage (VCP). The control signal is at a low level if the reference voltage is low and is boosted to a high level if the reference voltage is high. A ground switch circuit (15) includes a depletion mode transistor (MP1) having a source coupled to the output voltage, a gate coupled to the control voltage, and a drain coupled to ground. The transistor includes a well region (4-1) and a parasitic substrate diode (D3-1). A negative voltage protection circuit (17-1) includes a depletion mode first protection transistor (MP3-1) having a drain coupled to the well region, a source coupled to a source of a depletion mode second protection transistor (MP4-1) having a drain coupled to the output voltage, the first and second protection transistors each having a gate coupled to the control voltage, and also includes a diode (MN1) coupled to charge the well region from the control voltage conductor to prevent distortion of the output voltage.
摘要翻译：自接地电路（10）包括传导输出电压（VOUT1）的信号通道。由参考电压（VDD）供电的电荷泵（2）产生控制电压（VCP）。如果参考电压较低，则控制信号处于低电平，并且如果参考电压高，则其升压到高电平。接地开关电路（15）包括具有耦合到输出电压的源极的耗尽型晶体管（MP1），耦合到控制电压的栅极和耦合到地的漏极。晶体管包括阱区（4-1）和寄生衬底二极管（D3-1）。负电压保护电路（17-1）包括具有耦合到阱区的漏极的耗尽型第一保护晶体管（MP3-1），耦合到耗尽型第二保护晶体管（MP4-1）的源极的源极，耦合到输出电压的漏极，第一和第二保护晶体管各自具有耦合到控制电压的栅极，并且还包括耦合到从控制电压导体对阱区域充电的二极管（MN1），以防止输出电压的失真。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式