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1. 发明申请

US20180287615A1 LEVEL SHIFTER AND LEVEL SHIFTING METHOD 审中-公开
公开(公告)号：US20180287615A1
公开(公告)日：2018-10-04
申请号：US15700033
申请日：2017-09-08
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
发明人： Lei PAN
IPC分类号： H03K19/177 , H03K19/017 , H03K19/0185 , H03K3/0233 , H03K3/356 , H02M3/07
CPC分类号： H03K19/17784 , H02M3/07 , H03K3/02335 , H03K3/356 , H03K3/35613 , H03K3/356182 , H03K19/01714 , H03K19/018528
摘要： A level shifter includes a level switching circuit, an input circuit, and a first voltage drop circuit. The level switching circuit is configured to adjust a first voltage level of a first node and a second voltage level of a second node in response to a first input signal and a second input signal. The input circuit is configured to receive the first input signal and the second input signal. The first voltage drop circuit is coupled between the level switching circuit and the input circuit, and is configured to track a voltage level of a third node which is coupled to the first node, in order to be turned on according to the voltage level of the third node.

2. 发明申请

US20160118988A1 CIRCUITS FOR AND METHODS OF CONTROLLING POWER WITHIN AN INTEGRATED CIRCUIT 有权
标题翻译：在集成电路中控制电源的电路和方法
公开(公告)号：US20160118988A1
公开(公告)日：2016-04-28
申请号：US14526192
申请日：2014-10-28
申请人： Xilinx, Inc.
发明人： Santosh Kumar Sood , Brian C. Gaide , Steven P. Young
IPC分类号： H03K19/177 , H03K19/00
CPC分类号： H03K19/17784 , H03K19/0008 , H03K19/0016
摘要： A circuit for controlling power within an integrated circuit comprises a plurality of circuit blocks; a global control signal routed within the integrated circuit; and a plurality of power control blocks. Each power control block is coupled to a corresponding circuit block of the plurality of circuit bocks and has a first input coupled to receive a reference voltage and a second input coupled to receive the global control signal. The global control signal enables, for each circuit block, the coupling of the reference voltage to the corresponding circuit block. A method of controlling power within an integrated circuit is also disclosed.
摘要翻译：用于控制集成电路内的电力的电路包括多个电路块; 在集成电路内布线的全局控制信号; 和多个功率控制块。每个功率控制块耦合到多个电路块的相应电路块，并且具有耦合以接收参考电压的第一输入和耦合以接收全局控制信号的第二输入。对于每个电路块，全局控制信号使得参考电压与对应的电路块的耦合。还公开了一种控制集成电路内的功率的方法。

3. 发明授权

US08975917B2 Programmable logic device 有权
标题翻译：可编程逻辑器件
公开(公告)号：US08975917B2
公开(公告)日：2015-03-10
申请号：US13778210
申请日：2013-02-27
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Seiichi Yoneda
IPC分类号： H03K19/177 , G11C11/412 , H03K19/173
CPC分类号： H03K19/173 , H03K19/17784
摘要： A programmable logic device includes a plurality of arithmetic circuits; a configuration changing circuit for changing a logic state of each of the plurality of arithmetic circuits by rewriting configuration data; a power supply control circuit for switching between start and stop of supply of power supply voltage to the plurality of arithmetic circuits; a state memory circuit for storing data on configuration, data on a state of power supply voltage, data on use frequency, and data on last use of each of the plurality of arithmetic circuits; and an arithmetic state control circuit for controlling the configuration changing circuit and the power supply control circuit in accordance with the data stored in the state memory circuit. One of the plurality of arithmetic circuits includes a transistor comprising an oxide semiconductor film in a channel formation region.
摘要翻译：可编程逻辑器件包括多个运算电路; 配置改变电路，用于通过重写配置数据来改变多个算术电路中的每一个的逻辑状态; 电源控制电路，用于在向多个运算电路供电的电源的开始和停止之间切换; 用于存储关于配置的数据的状态存储器电路，关于电源电压的状态的数据，关于使用频率的数据以及所述多个运算电路中的每一个的最后使用的数据; 以及用于根据存储在状态存储电路中的数据来控制配置改变电路和电源控制电路的算术状态控制电路。多个算术电路中的一个包括在沟道形成区域中包括氧化物半导体膜的晶体管。

4. 发明授权

US08912831B1 Apparatus and method for routing of signals 有权
标题翻译：用于信号路由的装置和方法
公开(公告)号：US08912831B1
公开(公告)日：2014-12-16
申请号：US13541964
申请日：2012-07-05
申请人： Kerry Veenstra , Krishna Rangasayee , Robert Bielby
发明人： Kerry Veenstra , Krishna Rangasayee , Robert Bielby
IPC分类号： H03L7/06 , H03L7/187
CPC分类号： H03L7/187 , H03K19/17736 , H03K19/17744 , H03K19/17784 , H04L25/0272 , H04L25/0282
摘要： A signal routing apparatus comprises a register bank to store a set of data signals. A delay locked loop generates a set of phase displaced clock signals. A phase controlled read circuit sequentially routes the set of data signals from the register bank in response to the phase displaced clock signals. A Low Voltage Differential Signaling buffer connected to the phase controlled read circuit transmits the data signals in a Low Voltage Differential Signaling mode. The phase displaced clock signals operate in lieu of a higher clock rate in order to reduce power consumption.
摘要翻译：信号路由装置包括用于存储一组数据信号的寄存器组。延迟锁定环产生一组相移位时钟信号。相位控制的读取电路响应于相移位的时钟信号顺序地将来自寄存器组的数据信号组传送。连接到相位控制读取电路的低压差分信号缓冲器以低电压差分信号传输数据信号。相移位的时钟信号代替更高的时钟频率，以便降低功耗。

5. 发明申请

US20140021980A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20140021980A1
公开(公告)日：2014-01-23
申请号：US14033924
申请日：2013-09-23
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Yasuhiko TAKEMURA , Shunpei YAMAZAKI
IPC分类号： H03K19/173
CPC分类号： H03K19/0013 , H01L27/0629 , H01L29/7869 , H01L2924/0002 , H03K17/161 , H03K19/173 , H03K19/17724 , H03K19/17736 , H03K19/1776 , H03K19/17772 , H03K19/17784 , H01L2924/00
摘要： It is an object to provide a semiconductor device in which power consumption can be reduced. It is another object to provide a highly reliable semiconductor device using a programming cell, such as a programmable logic device (PLD). In accordance with a change in a configuration of connections between basic blocks, power supply voltage furnishing to the basic blocks is changed. That is, when the structure of connections between the basic blocks is such that a basic block does not contribute to a circuit, the supply of the power supply voltage to this basic block is stopped. Further, the supply of the power supply voltage to the basic blocks is controlled using a programming cell formed using a field effect transistor whose channel formation region is formed using an oxide semiconductor, the field effect transistor having extremely low off-state current or extremely low leakage current.
摘要翻译：本发明的目的是提供能够降低功耗的半导体装置。另一个目的是提供使用诸如可编程逻辑器件（PLD）之类的编程单元的高度可靠的半导体器件。根据基本块之间的连接配置的变化，改变基本块的供电电压。也就是说，当基本块之间的连接结构使得基本块不对电路有贡献时，停止向该基本块提供电源电压。此外，使用使用使用氧化物半导体形成沟道形成区域的场效应晶体管形成的编程单元来控制对基本块的电源电压的供给，场效应晶体管具有极低的截止电流或极低漏电流。

6. 发明申请

US20130285698A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20130285698A1
公开(公告)日：2013-10-31
申请号：US13872469
申请日：2013-04-29
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Takahiro Fukutome
IPC分类号： H03K19/00
CPC分类号： H03K19/0008 , H03K19/17756 , H03K19/17784
摘要： A semiconductor device including a PLD which can increase the execution speed of an application with low power consumption is provided. The semiconductor device includes a programmable logic device and a processor which is not dynamically reconfigured. A memory element of the programmable logic device stores a plurality of pieces of configuration data determined to have high frequency of use by a memory module among configuration data corresponding to a thread. The memory element includes a storage element and a switch in each of a plurality of memory cells. The switch is used for supplying charge whose amount is determined by the plurality of pieces of stored configuration data to the storage element, retaining the charge in the storage element, and discharging the charge from the storage element.
摘要翻译：提供了包括能够以低功耗提高应用的执行速度的PLD的半导体装置。半导体器件包括可编程逻辑器件和不被动态重新配置的处理器。可编程逻辑器件的存储器元件存储被确定为具有与线程对应的配置数据中的存储器模块具有高频率的多个配置数据。存储元件包括多个存储单元中的每一个中的存储元件和开关。开关用于将数量由存储的多个存储的配置数据确定的电荷供应到存储元件，将电荷保持在存储元件中，并且从存储元件放电。

7. 发明授权

US08547770B2 Semiconductor apparatus and its control method 有权
标题翻译：半导体装置及其控制方法
公开(公告)号：US08547770B2
公开(公告)日：2013-10-01
申请号：US13137287
申请日：2011-08-03
申请人： Kohei Nakamura , Sachiko Kamisaki
发明人： Kohei Nakamura , Sachiko Kamisaki
IPC分类号： G11C5/14
CPC分类号： H03K19/17784 , Y10T307/832
摘要： Semiconductor apparatus includes first power supply line and second power supply line, first sub power supply line, first switch circuit, first logic circuit and first control circuit. First switch circuit is disposed between first power supply line and first sub power supply line, and controlled based on first signal. First logic circuit is disposed between first sub power supply line and second power supply line and comprises first input node and second input node receiving second signal and third signal respectively, and output node. First logic circuit outputs an active voltage associated with a logical level of second signal to output node in active state, and outputs a standby voltage associated with a voltage of second power supply line to output node regardless of the logical level of second signal in non-active state. First control circuit generates third signal based on first signal and fourth signal independent of first signal, and letting first logic circuit transit from non-active state to active state by providing third signal to second input node of first logic circuit.
摘要翻译：半导体装置包括第一电源线和第二电源线，第一副电源线，第一开关电路，第一逻辑电路和第一控制电路。第一开关电路设置在第一电源线和第一副电源线之间，并且基于第一信号进行控制。第一逻辑电路设置在第一副电源线和第二电源线之间，并且包括分别接收第二信号和第三信号的第一输入节点和第二输入节点以及输出节点。第一逻辑电路将与第二信号的逻辑电平相关联的有效电压输出到处于活动状态的输出节点，并且将与第二电源线的电压相关联的待机电压输出到输出节点，而不管第二信号的逻辑电平如何，活跃状态第一控制电路基于与第一信号无关的第一信号和第四信号产生第三信号，并且通过向第一逻辑电路的第二输入节点提供第三信号，使第一逻辑电路从非活动状态转换到有效状态。

8. 发明授权

US08536935B1 Uniform power regulation for integrated circuits 有权
标题翻译：集成电路均匀功率调节
公开(公告)号：US08536935B1
公开(公告)日：2013-09-17
申请号：US12910719
申请日：2010-10-22
申请人： Thomas P. LeBoeuf , Eric E. Edwards
发明人： Thomas P. LeBoeuf , Eric E. Edwards
IPC分类号： G05F1/575 , H02M3/00 , G06F1/26
CPC分类号： H03K19/17788 , G11C5/147 , G11C29/021 , G11C29/028 , H01L23/50 , H01L2924/0002 , H03K19/17784 , H01L2924/00
摘要： A system for uniform power regulation of an integrated circuit is disclosed. In each of a plurality of regions, the system includes a comparison circuit having a first input coupled to receive a reference voltage and a second input coupled to receive a feedback voltage. The comparison circuit provides a gating voltage to a driver circuit that is coupled to a first supply voltage. The driver circuit is configured to provide a regulated voltage responsive to the gating voltage. A feedback adjustment circuit is configured to trim the regulated voltage by a region-specific trim value and output the trimmed regulated voltage as the feedback voltage on the output.
摘要翻译：公开了一种用于集成电路的均匀功率调节的系统。在多个区域中的每个区域中，该系统包括比较电路，其具有耦合以接收参考电压的第一输入和耦合以接收反馈电压的第二输入。该比较电路为耦合到第一电源电压的驱动电路提供门控电压。驱动器电路被配置为响应于门控电压提供调节电压。反馈调整电路被配置为通过区域特定的修整值来修整调节电压，并输出修整的调节电压作为输出上的反馈电压。

9. 发明授权

US08497702B2 Power control of an integrated circuit including an array of interconnected configurable logic elements 有权
标题翻译：集成电路的功率控制，包括互连的可配置逻辑元件阵列
公开(公告)号：US08497702B2
公开(公告)日：2013-07-30
申请号：US12998395
申请日：2009-08-20
申请人： Stephen John Hill , Michael Peter Muller
发明人： Stephen John Hill , Michael Peter Muller
IPC分类号： H03K19/177
CPC分类号： H03K19/17772 , H03K19/17784 , H03K19/17788
摘要： An integrated circuit (8) comprising an array (10) of interconnected configurable logic elements (12), such as an FPGA array, is provided. The logic elements are used to form a power controller (14) which separately controls the power state of different regions of the array. Each region of the array contains one or more logic elements. Each region has a corresponding region controller (16) responsive to one or more power signals generated by the power controller to switch that region into the requested power state.
摘要翻译：提供了包括互连的可配置逻辑元件（12）的阵列（10）的集成电路（8），诸如FPGA阵列。逻辑元件用于形成分别控制阵列的不同区域的功率状态的功率控制器（14）。数组的每个区域都包含一个或多个逻辑元素。每个区域具有响应于由功率控制器产生的一个或多个功率信号以将该区域切换到所请求的功率状态的对应的区域控制器（16）。

10. 发明授权

US08436656B2 Method and apparatus for saving power in an integrated circuit 有权
标题翻译：用于在集成电路中节电的方法和装置
公开(公告)号：US08436656B2
公开(公告)日：2013-05-07
申请号：US13127473
申请日：2009-01-07
申请人： Daniel Gitlin , Martin Voogel , Jason Redgrave , Matt Crowley
发明人： Daniel Gitlin , Martin Voogel , Jason Redgrave , Matt Crowley
IPC分类号： H03K19/0175
CPC分类号： H03K19/0008 , H03K19/017509 , H03K19/17704 , H03K19/17784
摘要： Some embodiments provide an integrated circuit (‘IC’) that includes at least first and second circuits operating at a first voltage. The IC includes, between the first and second circuits, a direct connection comprising a third circuit for transmitting a signal from the first circuit to the second circuit at a second voltage that is lower than the first voltage. At least one of the first and second circuits is a configurable circuit for configurably performing operations.
摘要翻译：一些实施例提供集成电路（'IC'），其包括以第一电压工作的至少第一和第二电路。 IC包括在第一和第二电路之间的直接连接，其包括用于以低于第一电压的第二电压将信号从第一电路传输到第二电路的第三电路。第一和第二电路中的至少一个是用于可配置地执行操作的可配置电路。

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