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1. 发明申请

US20160277036A1 Method of Constructing a Parity-Check Matrix for Using Message-Passing Algorithm to Decode the Repeat-Accumulate Type of Modulation and Coding Schemes 有权
标题翻译：构建使用消息传递算法解码重复累加类型的调制和编码方案的奇偶校验矩阵的方法
公开(公告)号：US20160277036A1
公开(公告)日：2016-09-22
申请号：US14663151
申请日：2015-03-19
申请人： Telefonaktiebolaget L M Ericsson (publ)
发明人： Yi-Pin Eric Wang , Bo Hagerman , Ali S. Khayrallah , Michael Samuel Bebawy , Leif Wilhelmsson
IPC分类号： H03M13/11 , H03M13/00 , H04L1/00
CPC分类号： H03M13/118 , H03M13/1197 , H03M13/616 , H03M13/6325 , H04L1/0041
摘要： A method in a network node comprises generating a parity-check matrix for decoding a transmission scheme. The transmission scheme comprises a repetition code, an interleaver, and a modulation having a memory property. The parity-check matrix comprises a function of: a differentiator matrix, the differentiator matrix comprising an inverse of an accumulator matrix; a deinterleaver matrix, the deinterleaver matrix comprising an inverse of an interleaver matrix, the interleaver matrix comprising a square unitary permutation matrix for introducing randomness; and a repetition decoder matrix.
摘要翻译：网络节点中的方法包括生成用于解码传输方案的奇偶校验矩阵。传输方案包括重复码，交织器和具有存储特性的调制。奇偶校验矩阵包括以下功能：微分矩阵，微分矩阵包括累加器矩阵的逆; 去交织器矩阵，所述解交织器矩阵包括交织器矩阵的逆，所述交织器矩阵包括用于引入随机性的平方整数置换矩阵; 和重复解码器矩阵。

2. 发明授权

US09203440B1 Matrix expansion 有权
标题翻译：矩阵扩展
公开(公告)号：US09203440B1
公开(公告)日：2015-12-01
申请号：US13752718
申请日：2013-01-29
申请人： Xilinx, Inc.
发明人： Nihat E. Tunali , Raghavendar M. Rao , Raied N. Mazahreh , Krishna R. Narayanan
IPC分类号： H03M13/11 , H03M13/29 , H03M13/53 , H03M13/03
CPC分类号： H03M13/2906 , H03M13/033 , H03M13/116 , H03M13/1188 , H03M13/1197 , H03M13/6325 , H03M13/6362
摘要： A method for matrix expansion is disclosed. In this method, a Progressive Edge Growth (“PEG”) expanding of an H matrix by a coder is used to provide an expanded H matrix. An Approximate Cycle Extrinsic Message Degree (“ACE”) expanding of the expanded H matrix by the coder is used to provide a parity check matrix for a code. The ACE expanding includes initializing a first index to increment in a first range associated with a PEG expansion factor, expanding each non-zero element in the expanded H matrix with a random shifted identity matrix for the first range, initializing a second index to increment in a second range associated with the first index and an ACE expansion factor, and performing an ACE detection for each variable node in the second range for the variable nodes of the parity check matrix. The coder outputs information using the parity check matrix.
摘要翻译：公开了一种用于矩阵扩展的方法。在该方法中，使用编码器对H矩阵的渐进边缘增长（“PEG”）进行扩展以提供扩展的H矩阵。使用由编码器扩展的H矩阵的近似周期外部消息度（“ACE”）来提供用于代码的奇偶校验矩阵。 ACE扩展包括初始化第一索引以在与PEG扩展因子相关联的第一范围内增加，以扩展的H矩阵中的每个非零元素以第一范围的随机移位单位矩阵进行扩展，初始化第二索引以递增与第一索引和ACE扩展因子相关联的第二范围，以及针对奇偶校验矩阵的可变节点的第二范围中的每个变量节点执行ACE检测。编码器使用奇偶校验矩阵输出信息。

3. 发明授权

US07912147B2 Compress-forward coding with N-PSK modulation for the half-duplex Gaussian relay channel 失效
标题翻译：用于半双工高斯中继信道的具有N-PSK调制的压缩前向编码
公开(公告)号：US07912147B2
公开(公告)日：2011-03-22
申请号：US11686019
申请日：2007-03-14
申请人： Zhixin Liu , Vladimir M. Stanković , Zixiang Xiong
发明人： Zhixin Liu , Vladimir M. Stanković , Zixiang Xiong
IPC分类号： H04L27/00
CPC分类号： H04L27/183 , H03M7/30 , H03M13/1102 , H03M13/1197 , H03M13/3746 , H03M13/6306 , H03M13/6312 , H03M13/658 , H04L1/0041 , H04L1/005 , H04L1/0057 , H04L27/186 , H04L27/2053 , H04L2001/0097
摘要： Systems and methods that implement compress-forward (CF) coding with N-PSK modulation for the relay channel are disclosed, where N is greater than or equal to two. In the CF scheme, Wyner-Ziv coding is applied at the relay to exploit the joint statistics between signals at the relay and the destination. Quantizer design and selection of channel code parameters are discussed. Low-density parity check (LDPC) codes are used for error protection at the source, and nested scalar quantization (NSQ) and irregular repeat accumulate (IRA) codes for Wyner Ziv coding (or more precisely, distributed joint source-channel coding) at the relay. The destination system decodes original message information using (a) a first signal received from the source in a first interval and (b) a second signal that represents a mixture of transmissions from the source and relay in the second interval.
摘要翻译：公开了通过用于中继信道的N-PSK调制实现压缩前向（CF）编码的系统和方法，其中N大于或等于2。在CF方案中，Wyner-Ziv编码适用于继电器，以利用继电器和目的地之间的信号之间的联合统计。讨论量化器设计和选择通道代码参数。低密度奇偶校验（LDPC）码用于源处的错误保护，嵌套标量量化（NSQ）和不规则重复累加（IRA）码用于Wyner-Ziv编码（或更准确地说，分布式联合源信道编码）在继电器。目的地系统使用（a）在第一间隔中从源接收的第一信号和（b）表示在第二间隔中来自源和继电器的传输的混合的第二信号来解码原始消息信息。

4. 发明授权

US07793190B1 Reduced clash GRA interleavers 有权
标题翻译：减少冲突GRA交织器
公开(公告)号：US07793190B1
公开(公告)日：2010-09-07
申请号：US11463857
申请日：2006-08-10
申请人： Paul Kingsley Gray , Keith Michael Chugg
发明人： Paul Kingsley Gray , Keith Michael Chugg
IPC分类号： H03M13/00
CPC分类号： H03M13/03 , H03M13/033 , H03M13/1137 , H03M13/1197 , H03M13/6566
摘要： Methods, apparatuses, and systems are presented for performing data encoding involving receiving a sequence of data bits, encoding the sequence of data bit according to a code characterized by a parity check matrix (H matrix) to generate a sequence of encoded bits, wherein the H matrix is capable of being expressed as H=[Hp|Hd]=[S|J*P*T], S being a dual-diagonal matrix, J being a single parity check matrix, P being an interleaver permutation matrix, and T being a repeat block matrix, wherein the H matrix is a column permuted version of an original H matrix, wherein clashes associated with an interleaver corresponding to the P matrix are reduced by adopting the H matrix instead of the original H matrix, and outputting the sequence of encoded bits.
摘要翻译：呈现用于执行涉及接收数据位序列的数据编码的方法，装置和系统，根据由奇偶校验矩阵（H矩阵）表征的代码对数据位序列进行编码，以生成编码位序列，其中， H矩阵能够被表示为H = [Hp | Hd] = [S | J * P * T]，S是双对角矩阵，J是单个奇偶校验矩阵，P是交织器置换矩阵，以及 T是重复块矩阵，其中H矩阵是原始H矩阵的列置换版本，其中通过采用H矩阵而不是原始H矩阵来减少与对应于P矩阵的交织器相关联的冲突，并输出编码位序列。

5. 发明授权

US07783951B2 Multiplexed coding for user cooperation 有权
标题翻译：多路复用用户合作编码
公开(公告)号：US07783951B2
公开(公告)日：2010-08-24
申请号：US11621743
申请日：2007-01-10
申请人： Guosen Yue , Xiadong Wang , Mohammad Madihian
发明人： Guosen Yue , Xiadong Wang , Mohammad Madihian
IPC分类号： H03M13/00
CPC分类号： H03M13/1197 , H03M13/114 , H03M13/1185
摘要： A method and system for decoding a combination of a first message and a second message that were encoded using a generating matrix of a systematic linear block code is described. The combination of the first message and the second message may be decoded using a parity check matrix. If the second message is known, the first message is decoding using a first component code parity check matrix. If first message is known, the second message is decoded using a second component code parity check matrix. The parity check matrix can be derived from the generating matrix and the first message or the second message can be decoded using the first or second component code parity check matrix.
摘要翻译：描述了使用系统线性块码的生成矩阵对第一消息和第二消息的组合进行解码的方法和系统。可以使用奇偶校验矩阵来解码第一消息和第二消息的组合。如果第二消息是已知的，则第一消息是使用第一分量码奇偶校验矩阵进行解码。如果已知第一消息，则使用第二分量码奇偶校验矩阵对第二消息进行解码。可以从生成矩阵导出奇偶校验矩阵，并且可以使用第一或第二分量码奇偶校验矩阵对第一消息或第二消息进行解码。

6. 发明授权

US07751491B2 Code design method for repeat-zigzag Hadamard codes 有权
标题翻译：重复锯齿Hadamard代码的代码设计方法
公开(公告)号：US07751491B2
公开(公告)日：2010-07-06
申请号：US11768591
申请日：2007-06-26
申请人： Kai Li , Guosen Yue , Xiaodong Wang , Mohammad Madihian
发明人： Kai Li , Guosen Yue , Xiaodong Wang , Mohammad Madihian
IPC分类号： H04L5/12
CPC分类号： H03M13/2972 , H03M13/033 , H03M13/1191 , H03M13/1197 , H03M13/356
摘要： A method for selecting a signal to noise ratio for a communications code includes obtaining extrinsic information transfer (EXIT) information for a repeat-zigzag Hadamard (RZH) code responsive to a Hadamard order and a signal to noise ratio, determining code parameters for an irregular repeat zigzag Hadamard (IRZH) code for a corresponding code rate in response to the obtained EXIT values, and repeating the step of obtaining the EXIT information for a different signal to noise ratio if the corresponding code rate is other than a selected rate. The corresponding code rate is related to a bit error rate. In a preferred embodiment, the step of obtaining EXIT information includes one of obtaining an EXIT curve for repeat-zigzag Hadamard code by Monte Carlo simulation using serial decoding or obtaining an EXIT function for parallel decoding of the repeat-zigzag Hadamard code by using equations.
摘要翻译：用于选择通信代码的信噪比的方法包括：响应于哈达玛级和信噪比获得用于重复锯齿哈达玛（RZH）码的外部信息传输（EXIT）信息，确定不规则的针对所获得的EXIT值重复Zigzag Hadamard（IRZH）代码以获得对应的码率，并且如果相应的码率不是所选择的速率，则重复获得不同信噪比的EXIT信息的步骤。相应的代码率与误码率有关。在优选实施例中，获得EXIT信息的步骤包括通过使用串行解码的Monte Carlo模拟获得重复锯齿Hadamard码的EXIT曲线，或通过使用等式获得用于并行解码重复锯齿形Hadamard码的EXIT函数之一。

7. 发明授权

US07343539B2 ARA type protograph codes 有权
标题翻译： ARA型原型码
公开(公告)号：US07343539B2
公开(公告)日：2008-03-11
申请号：US11166040
申请日：2005-06-24
申请人： Dariush Divsalar , Aliazam Abbasfar , Christopher R. Jones , Samuel J. Dolinar , Jeremy C. Thorpe , Kenneth S. Andrews , Kung Yao
发明人： Dariush Divsalar , Aliazam Abbasfar , Christopher R. Jones , Samuel J. Dolinar , Jeremy C. Thorpe , Kenneth S. Andrews , Kung Yao
IPC分类号： H03M13/29
CPC分类号： H03M13/1197 , H03M13/1194
摘要： An apparatus and method for encoding low-density parity check codes. Together with a repeater, an interleaver and an accumulator, the apparatus comprises a precoder, thus forming accumulate-repeat-accumulate (ARA codes). Protographs representing various types of ARA codes, including AR3A, AR4A and ARJA codes, are described. High performance is obtained when compared to the performance of current repeat-accumulate (RA) or irregular-repeat-accumulate (IRA) codes.
摘要翻译：一种用于编码低密度奇偶校验码的装置和方法。与中继器，交织器和累加器一起，该装置包括预编码器，从而形成累加重复累加（ARA码）。描述代表各种类型的ARA代码的原型，包括AR3A，AR4A和ARJA代码。与当前重复累积（RA）或不规则重复累积（IRA）码的性能相比，获得了高性能。

8. 发明授权

US09509341B2 Systems and methods for encoding and decoding of check-irregular non-systematic IRA codes 有权
公开(公告)号：US09509341B2
公开(公告)日：2016-11-29
申请号：US14607043
申请日：2015-01-27
申请人： Digital PowerRadio, LLC
发明人： Branimir R Vojcic , Stylianos Papaharalabos
IPC分类号： H03M13/00 , H03M13/11 , H04L1/00 , H03M13/25 , H03M13/35 , H03M13/37 , H03M13/09 , H03M13/15 , H03M13/29
CPC分类号： H03M13/1197 , H03M13/09 , H03M13/098 , H03M13/1111 , H03M13/152 , H03M13/255 , H03M13/2906 , H03M13/296 , H03M13/356 , H03M13/3746 , H03M13/3761 , H03M13/611 , H03M13/6362 , H04L1/0041
摘要： Systems and methods for encoding and decoding check-irregular non-systematic IRA codes of messages in any communication or electronic system where capacity achieving coding is desired. According to these systems and methods, IRA coding strategies, including ones that employ capacity-approaching non-systematic IRA codes that are irregular and that exhibit a low error floor, are employed. These non-systematic IRA codes are particularly advantageous in scenarios in which up to half of coded bits could be lost due to channel impairments and/or where complementary coded bits are desired to transmit over two or more communications sub-channels. An encoder includes information bit repeaters and encoders, one or more interleavers, check node combiners, a check node by-pass and an accumulator. A decoder includes a demapper, one or more check node processors, an accumulator decoder, a bit decoder, and one or more interleavers/deinterleavers.

9. 发明授权

US09083383B1 Parity check matrix 有权
标题翻译：奇偶校验矩阵
公开(公告)号：US09083383B1
公开(公告)日：2015-07-14
申请号：US13752689
申请日：2013-01-29
申请人： Xilinx, Inc.
发明人： Nihat E. Tunali , Raghavendar M. Rao , Raied N. Mazahreh , Krishna R. Narayanan
IPC分类号： H03M13/00 , H03M13/13
CPC分类号： H03M13/13 , H03M13/036 , H03M13/112 , H03M13/1197 , H03M13/6502
摘要： An apparatus is disclosed. In this apparatus, at least one coder block has a parity check matrix. The parity check matrix comprises each element of an H matrix expanded by a Progressive Edge Growth (“PEG”) expansion factor and an Approximate Cycle Extrinsic Message Degree (“ACE”) expansion factor.
摘要翻译：公开了一种装置。在该装置中，至少一个编码器块具有奇偶校验矩阵。奇偶校验矩阵包括通过渐进边缘增长（“PEG”）扩展因子和近似周期外在消息度（“ACE”）扩展因子扩展的H矩阵的每个元素。

10. 发明申请

US20140157092A1 SYSTEMS AND METHODS FOR ENCODING AND DECODING OF CHECK-IRREGULAR NON-SYSTEMATIC IRA CODES 有权
标题翻译：用于编码和解码检查非正规非系统性IRA代码的系统和方法
公开(公告)号：US20140157092A1
公开(公告)日：2014-06-05
申请号：US14052440
申请日：2013-10-11
申请人： DIGITAL POWERRADIO, LLC
发明人： Branimir R. Vojcic , Stylianos Papaharalabos
IPC分类号： H04L1/00
CPC分类号： H03M13/1197 , H03M13/09 , H03M13/098 , H03M13/1111 , H03M13/152 , H03M13/255 , H03M13/2906 , H03M13/296 , H03M13/356 , H03M13/3746 , H03M13/3761 , H03M13/611 , H03M13/6362 , H04L1/0041
摘要： Systems and methods for encoding and decoding check-irregular non-systematic IRA codes of messages in any communication or electronic system where capacity achieving coding is desired. According to these systems and methods, IRA coding strategies, including ones that employ capacity-approaching non-systematic IRA codes that are irregular and that exhibit a low error floor, are employed. These non-systematic IRA codes are particularly advantageous in scenarios in which up to half of coded bits could be lost due to channel impairments and/or where complementary coded bits are desired to transmit over two or more communications sub-channels. An encoder includes information bit repeaters and encoders, one or more interleavers, check node combiners, a check node by-pass and an accumulator. A decoder includes a demapper, one or more check node processors, an accumulator decoder, a bit decoder, and one or more interleavers/deinterleavers.
摘要翻译：用于在需要容量实现编码的任何通信或电子系统中编码和解码校验不规则非系统IRA代码的系统和方法。根据这些系统和方法，使用IRA编码策略，包括采用不规则的能力接近非系统IRA代码并且表现出低错误底线的策略。这些非系统IRA码在由于信道损伤和/或需要互补编码比特在两个或更多个通信子信道上传输的情况下可能丢失多达一半的编码比特的情况下是特别有利的。编码器包括信息比特中继器和编码器，一个或多个交织器，校验节点组合器，校验节点旁路和累加器。解码器包括解映射器，一个或多个校验节点处理器，累加器解码器，比特解码器和一个或多个交织器/解交织器。

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