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    • 2. 发明授权
    • Turbo encoder apparatus
    • 涡轮编码器装置
    • US09000959B2
    • 2015-04-07
    • US14370565
    • 2012-02-24
    • Jinsoup JoungJoohyeong LeeJongho LimSeungkeun YookJi Hye Shin
    • Jinsoup JoungJoohyeong LeeJongho LimSeungkeun YookJi Hye Shin
    • H03M13/00H03M13/47H03M13/23H03M13/29
    • H03M13/47H03M13/235H03M13/2903H03M13/2957H03M13/2993H03M13/6525H03M13/6575
    • A turbo encoder apparatus includes: a first element encoder for receiving an input of a bitstream of the data, encoding the input of the bitstream of the data, and generating a first output bitstream in an unit of plural bits; an internal interleaver for generating an interleaved input bitstream from the bitstream of the data; a second element encoder for receiving an input of the interleaved input bitstream in the unit of plural bits, encoding the input of the interleaved input bitstream, and generating a second output bitstream in an unit of plural bits; a trellis-termination-encoder for generating bits for trellis terminations of the first element encoder and the second element encoder; and a bitstream assembler for receiving the first output bitstream, the second output bitstream, and the bits for the trellis terminations and generating an input bitstream for a rate matching.
    • 涡轮编码器装置包括:第一元件编码器,用于接收数据的比特流的输入,对数据的比特流的输入进行编码,并以多个比特为单位生成第一输出比特流; 内部交织器,用于从所述数据的比特流生成交织的输入比特流; 第二单元编码器,用于以多位为单位接收交织的输入比特流的输入,对交织的输入比特流的输入进行编码,并以多位单位生成第二输出比特流; 网格终端编码器,用于产生用于第一单元编码器和第二单元编码器的网格终端的比特; 以及比特流汇编器,用于接收第一输出比特流,第二输出比特流和用于网格终端的比特,并且生成用于速率匹配的输入比特流。
    • 3. 发明授权
    • Method for a general near optimal turbo code trellis termination
    • 一般近似最优turbo码格局终止的方法
    • US08429490B2
    • 2013-04-23
    • US13475572
    • 2012-05-18
    • Mustafa ErozA. Roger Hammons, Jr.
    • Mustafa ErozA. Roger Hammons, Jr.
    • H03M13/29
    • H03M13/6362H03M13/2903H03M13/2993H03M13/2996H03M13/4123
    • A method of terminating two or more constituent encoders of a turbo encoder employing a turbo code, comprising the steps of: generating tail input bits at each of two or more constituent encoders, including deriving the tail input bits from each of the two or more constituent encoders separately from a contents of shift registers within each of the two or more constituent encoders, after an encoding of information bits by the two or more constituent encoders; puncturing one or more tail output bits such that 1/R output tail bits are transmitted for each of a plurality of trellis branches, wherein R is a turbo code rate employed by the turbo encoder during an information bit transmission. In yet another variation, the step of puncturing the tail output bits further comprises the step of: transmitting, during trellis termination, the tail output bits, only if they are sent from an output branch of one of the two or more constituent encoders that are used during information bit transmission.
    • 一种终止采用turbo码的turbo编码器的两个或多个组成编码器的方法,包括以下步骤:在两个或更多个组成编码器中的每一个处生成尾部输入位,包括从两个或更多个成分中的每一个导出尾部输入位 在两个或多个组成编码器对信息比特进行编码之后,与两个或更多个组成编码器中的每一个中的移位寄存器的内容分开编码; 对一个或多个尾部输出位进行穿孔,使得对于多个网格分支中的每一个发送1 / R个输出尾比特,其中R是在信息比特传输期间由turbo编码器采用的turbo码率。 在另一个实施例中,打孔尾部输出位的步骤还包括以下步骤:在网格终止期间,仅在从两个或更多个组成编码器之一的输出分支发送尾部输出位时发送尾部输出位, 在信息位传输期间使用。
    • 4. 发明授权
    • State metrics memory reduction in a turbo decoder implementation
    • turbo解码器实现中的状态量度记忆减少
    • US08291302B2
    • 2012-10-16
    • US12285987
    • 2008-10-17
    • Moshe Haiut
    • Moshe Haiut
    • H03M13/00
    • H03M13/2993H03M13/2957H03M13/3905H03M13/3922H03M13/6505
    • Methods and apparatus are described for reducing memory storage cells in a turbo decoder by storing only half the state metrics generated during a scan process. States associated with each bit transmission may be divided into couples and only one state from every state couple may be stored. In one example embodiment, only the state metric for a losing state of every state couple is saved, along with a single bit, e.g., 1 or 0, indicating whether the upper state or lower state of the state couple was the winner. The winning state may be reconstituted at a later stage. In this manner, for a code rate 1/3 and constraint length 3 turbo code, instead of storing 8*10=80 bits of state metrics for each systematic bit, only (4*10)+(4*1)=44 bits of scan state metrics data need be stored, a savings of nearly 50% regardless of the transistor technology used.
    • 描述了用于通过仅存储在扫描处理期间生成的状态度量的一半来减少turbo解码器中的存储器存储单元的方法和装置。 与每个位传输相关联的状态可以被划分为对,并且可以仅存储来自每个状态对的一个状态。 在一个示例实施例中,仅保存每个状态对的丢失状态的状态度量,以及指示状态对的上部状态或较低状态是否为赢者的单个位,例如1或0。 获胜状态可以在稍后阶段重新组建。 以这种方式,对于码率1/3和约束长度3 turbo码,代替仅存储每个系统比特的8×10 = 80比特的状态度量,只有(4 * 10)+(4 * 1)= 44比特 的扫描状态度量数据需要存储,节省近50%,而不考虑使用的晶体管技术。
    • 6. 发明申请
    • EXTENDED TURBO INTERLEAVERS FOR PARALLEL TURBO DECODING
    • 扩展的涡轮交错器并行涡轮解码
    • US20100207789A1
    • 2010-08-19
    • US12378998
    • 2009-02-19
    • Esko Nieminen
    • Esko Nieminen
    • H03M7/00
    • H03M13/2993H03M13/2775H03M13/6525H03M13/653H03M13/6544H03M13/6558
    • A first grouping of memory space addresses is generated for systematic bits of a received codeword; a second grouping of memory space addresses is generated for a first set of coding bits of the received codeword, wherein the first set of coding bits comprises an ascending order; and a third grouping of memory space addresses is generated for a second set of coding bits of the received codeword, wherein the second set of coding bits comprises an interleaved order. A sub-codeword of the received codeword is decoded in parallel by accessing the first set of coding bits using the addresses in the second grouping of memory spaces. In turn, another sub-codeword of the received codeword is decoded in parallel by accessing the second set of coding bits using the addresses in the third grouping of memory spaces. Apparatus and a memory storing a computer program are also detailed.
    • 为接收到的码字的系统比特生成第一组存储器空间地址; 为接收到的码字的第一组编码比特生成第二组存储器空间地址,其中第一组编码比特包括升序; 并且为接收的码字的第二组编码比特生成第三组存储器空间地址,其中第二组编码比特包括交织顺序。 通过使用第二组存储器空间中的地址访问第一组编码比特来并行地解码所接收码字的子码字。 接着,通过使用第三组存储器空间中的地址访问第二组编码比特来并行地解码接收到的码字的另一子码字。 还详细说明了存储计算机程序的装置和存储器。