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1. 发明申请

US20180068634A1 IMAGE PROCESSING APPARATUS AND RECORDING MEDIUM 审中-公开
公开(公告)号：US20180068634A1
公开(公告)日：2018-03-08
申请号：US15695549
申请日：2017-09-05
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Seok-bong YOO , Hyung-jun LIM , Gi-yeong GIM , Young-su MOON , Tae-gyoung AHN
IPC分类号： G09G5/00 , G06T1/20
CPC分类号： G09G5/006 , G06T1/20 , G06T3/4053 , G06T5/002 , G06T5/20 , H04N7/0117 , H04N7/0135
摘要： An image processing apparatus includes: a signal receiver configured to receive an input image; an image processor configured to process the input image and generate an output image; a storage configured to store a first patch corresponding to a first pixel of the input image; and a controller configured to control the image processor to generate the output image by applying the first patch stored in the storage to the first pixel.

2. 发明授权

US09848163B2 Image processing apparatus and image processing method 有权
公开(公告)号：US09848163B2
公开(公告)日：2017-12-19
申请号：US14912451
申请日：2014-08-20
申请人： KEISOKU GIKEN Co., Ltd.
发明人： Seiichi Gohshi , Jin Ogasawara , Shinichiro Nakamura
IPC分类号： G06K9/40 , H04N7/01 , G06T5/00 , G06T5/20 , H04N5/21 , H04N7/015
CPC分类号： H04N7/0122 , G06T5/003 , G06T5/20 , H04N5/21 , H04N7/0117 , H04N7/0135 , H04N7/015
摘要： For sharpening an input image by up-converting the input image in order to increase the number of pixels of an image and generating a frequency component higher than a frequency component contained in an input image signal representing the input image, the number of multipliers is reduced, thereby achieving significant downsizing of an apparatus and cost reduction. An image processing apparatus includes a path on a base image side for up-converting the input image signal and a path on a sharpening processing side for carrying out nonlinear arithmetic processing on the input image signal. The path on the sharpening processing side includes an up-converter at a subsequent stage of at least one filter, after which the nonlinear arithmetic processing is carried out. The at least one filter may be either a two-dimensional low pass filter for noise removal or a high pass filter for removing a DC component.

3. 发明授权

US09781381B2 Super-resolution of dynamic scenes using sampling rate diversity 有权
公开(公告)号：US09781381B2
公开(公告)日：2017-10-03
申请号：US15041654
申请日：2016-02-11
申请人： King Abdulaziz City for Science and Technology
发明人： Faisal M. al-Salem , Andrew E. Yagle
IPC分类号： G06K9/32 , H04N7/01 , G06K9/62 , G06T5/00 , G06T5/50 , H04N7/015 , G06T3/40 , G06T7/70 , G06T7/246 , G06T7/277
CPC分类号： H04N7/0135 , G06K9/3233 , G06K9/6201 , G06K9/6234 , G06K9/6247 , G06K9/6249 , G06K9/6255 , G06T3/4053 , G06T5/002 , G06T5/003 , G06T5/009 , G06T5/50 , G06T7/246 , G06T7/277 , G06T7/70 , G06T2200/12 , G06T2207/20182 , G06T2207/20201 , G06T2207/20208 , G06T2207/20221 , G06T2207/30241 , H04N7/0117 , H04N7/0152
摘要： Super-resolution of dynamic scenes using sampling rate diversity, processes and systems thereof are provided. The method implementing the processes includes: in a first stage, super-resolving secondary low-resolution (LR) images using a set of primary LR images to create LR dictionaries to represent polyphase components (PPCs) of high resolution (HR) patches of images; and, in a second stage, reverting to a single frame super-resolution (SR) applied to each frame which comprises an entire image, using the HR dictionaries extracted from the super-resolved sequence obtain in the first stage.

4. 发明申请

US20160301848A1 GENERATING SYNTHETIC VIDEO FRAMES USING OPTICAL FLOW 审中-公开
标题翻译：使用光学流量生成合成视频框架
公开(公告)号：US20160301848A1
公开(公告)日：2016-10-13
申请号：US14683638
申请日：2015-04-10
申请人： Apple Inc.
发明人： Angus M. Taggart , Eric S. Beale
IPC分类号： H04N5/235 , G06T5/40
CPC分类号： G06T5/40 , G06T3/40 , H04N7/0127 , H04N7/0135
摘要： A novel video system that detects events in a video sequence that causes such distortions and switch off optical flow based frame interpolation is provided. The system detects sudden changes in light intensity and switch to non-optical flow based frame interpolation when such sudden change is detected. When there is no such drastic change in light intensity, the system reverts back to using optical flow frame interpolation. Specifically, the system detects a flash event by computing a sum of differences in histograms of intensity levels between the pair of consecutive actual video frames. When the sum of differences is above a certain threshold, the video system switch to non-optical flow based frame interpolation. When the sum of differences is below the threshold, the video system reverts back to optical flow frame interpolation.
摘要翻译：提供了一种新颖的视频系统，其检测导致这种失真并关闭基于光流的帧插值的视频序列中的事件。当检测到这种突然变化时，系统检测到光强度的突然变化并切换到基于非光流的帧插值。当光强没有如此剧烈的变化时，系统恢复到使用光流帧插值。具体地，系统通过计算一对连续实际视频帧之间的强度级别的直方图的差异之和来检测闪光事件。当差值之和高于某个阈值时，视频系统切换到基于非光流的帧插值。当差值之和低于阈值时，视频系统恢复为光流帧插值。

5. 发明申请

US20160205342A1 IMAGE PROCESSING APPARATUS AND IMAGE PROCESSING METHOD 有权
标题翻译：图像处理装置和图像处理方法
公开(公告)号：US20160205342A1
公开(公告)日：2016-07-14
申请号：US14912451
申请日：2014-08-20
申请人： KEISOKU GIKEN CO., LTD.
发明人： Seiichi GOHSHI , Jin OGASAWARA , Shinichiro NAKAMURA
IPC分类号： H04N7/01 , H04N7/015 , H04N5/21 , G06T5/00 , G06T5/20
CPC分类号： H04N7/0122 , G06T5/003 , G06T5/20 , H04N5/21 , H04N7/0117 , H04N7/0135 , H04N7/015
摘要： For sharpening an input image by up-converting the input image in order to increase the number of pixels of an image and generating a frequency component higher than a frequency component contained in an input image signal representing the input image, the number of multipliers is reduced, thereby achieving significant downsizing of an apparatus and cost reduction. An image processing apparatus includes a path on a base image side for up-converting the input image signal and a path on a sharpening processing side for carrying out nonlinear arithmetic processing on the input image signal. The path on the sharpening processing side includes an up-converter at a subsequent stage of at least one filter, after which the nonlinear arithmetic processing is carried out. The at least one filter may be either a two-dimensional low pass filter for noise removal or a high pass filter for removing a DC component.
摘要翻译：为了通过对输入图像进行上变频来锐化输入图像，以便增加图像的像素数量并产生高于包含在表示输入图像的输入图像信号中的频率分量的频率分量，乘法器数量减少，从而实现装置的显着的小型化和降低成本。一种图像处理装置包括：基本图像侧的路径，用于对输入图像信号进行上变频;以及在锐化处理侧上的路径，用于对输入图像信号进行非线性运算处理。锐化处理侧的路径在至少一个滤波器的后续阶段包括上变频器，之后执行非线性运算处理。至少一个滤波器可以是用于噪声去除的二维低通滤波器或用于去除DC分量的高通滤波器。

6. 发明申请

US20160163021A1 SUPER-RESOLUTION OF DYNAMIC SCENES USING SAMPLING RATE DIVERSITY 有权
标题翻译：使用采样速率多样性的动态场景的超分辨率
公开(公告)号：US20160163021A1
公开(公告)日：2016-06-09
申请号：US14559515
申请日：2014-12-03
申请人： King Abdulaziz City for Science and Technology
发明人： Faisal M. al-Salem , Andrew E. Yagle
IPC分类号： G06T3/00 , G06T7/00 , G06T5/50 , G06K9/32 , G06T5/00 , G06T7/20 , G06K9/62
CPC分类号： H04N7/0135 , G06K9/3233 , G06K9/6201 , G06K9/6234 , G06K9/6247 , G06K9/6249 , G06K9/6255 , G06T3/4053 , G06T5/002 , G06T5/003 , G06T5/009 , G06T5/50 , G06T7/246 , G06T7/277 , G06T7/70 , G06T2200/12 , G06T2207/20182 , G06T2207/20201 , G06T2207/20208 , G06T2207/20221 , G06T2207/30241 , H04N7/0117 , H04N7/0152
摘要： Super-resolution of dynamic scenes using sampling rate diversity, processes and systems thereof are provided. The method implementing the processes includes: in a first stage, super-resolving secondary low-resolution (LR) images using a set of primary LR images to create LR dictionaries to represent polyphase components (PPCs) of high resolution (HR) patches of images; and, in a second stage, reverting to a single frame super-resolution (SR) applied to each frame which comprises an entire image, using the HR dictionaries extracted from the super-resolved sequence obtain in the first stage.
摘要翻译：提供了使用采样率分集的动态场景的超分辨率，其过程和系统。实现该过程的方法包括：在第一阶段中，使用一组主LR图像来超分辨次级低分辨率（LR）图像，以创建LR词典来表示图像的高分辨率（HR）图像的多相分量（PPC） ; 并且在第二阶段中，使用从第一阶段获得的超分辨序列中提取的HR字典，还原到包括整个图像的每个帧的单帧超分辨率（SR）。

7. 发明申请

US20160021335A1 IMAGE PROCESSING APPARATUS WITH A LOOK-UP TABLE AND A MAPPING UNIT, IMAGE PROCESSING METHOD USING A LOOK-UP TABLE AND A MAPPING UNIT, AND STORAGE MEDIUM IN WHICH PROGRAM USING A LOOK-UP TABLE AND A MAPPING UNIT IS STORED 有权
标题翻译：具有查找表和映射单元的图像处理装置，使用查找表和映射单元的图像处理方法以及使用查找表和映射单元存储的程序中的存储介质
公开(公告)号：US20160021335A1
公开(公告)日：2016-01-21
申请号：US14719737
申请日：2015-05-22
申请人： I-CUBED RESEARCH CENTER INC.
发明人： Tetsujiro KONDO
IPC分类号： H04N7/01 , H04N13/00
CPC分类号： H04N7/0135 , G06T3/40 , H04N13/122 , H04N13/144
摘要： An image processing apparatus includes a storage unit that stores a look-up table having association information for associating at least one first image with at least one second image that is an image whose load on a brain has been adjusted, an image accepting unit that accepts at least one image, a mapping unit that acquires a whole or part of one or more second images associated with a whole or part of the at least one image accepted by the image accepting unit, using association information from among the one or more pieces of association information, and an image output unit that outputs at least one output image, which is the whole of the at least one second image acquired by the mapping unit or a group of part of the at least one second image acquired by the mapping unit.
摘要翻译：一种图像处理装置，包括：存储单元，存储具有用于将至少一个第一图像与至少一个第二图像相关联的关联信息的查找表，所述至少一个第二图像是已经调整了大脑上的负载的图像;图像接收单元，其接受至少一个图像，映射单元，使用来自所述一个或多个图像的关联信息，获取与所述图像接收单元接受的所述至少一个图像的全部或一部分相关联的一个或多个第二图像的全部或一部分，输出至少一个输出图像的图像输出单元，所述至少一个输出图像是由所述映射单元获取的所述至少一个第二图像的整体或由所述映射单元获取的所述至少一个第二图像的一部分组。

8. 发明授权

US09237321B2 Image processing device to generate an interpolated image that includes a large amount of high-frequency component and has high resolution, imaging device, image processing method, and information storage device 有权
标题翻译：图像处理装置，用于生成包括大量高频分量并具有高分辨率的内插图像，成像装置，图像处理方法和信息存储装置
公开(公告)号：US09237321B2
公开(公告)日：2016-01-12
申请号：US14541608
申请日：2014-11-14
申请人： OLYMPUS CORPORATION
发明人： Sunao Kikuchi
IPC分类号： H04N3/14 , H04N5/335 , H04N9/76 , H04N9/07 , H04N9/04 , H04N7/01
CPC分类号： H04N9/76 , H04N7/0135 , H04N9/045 , H04N9/07 , H04N2209/045 , H04N2209/046
摘要： An image processing device includes: an image acquisition section that acquires captured image data captured using an image sensor including color filters corresponding to bands, and corresponding to a plurality of frames; an alignment processing section that performs an alignment process on the captured image data to generate integrated captured image data; a reference band selection section that selects a reference band from the bands using an output image in a preceding frame; a reference image generation section that performs an interpolation process on image data included in the integrated captured image data and corresponding to the color filter corresponding to the reference band; and an interpolated image generation section that performs an interpolation process on image data included in the integrated captured image data and corresponding to the color filter corresponding to a band differing from the reference band based on a reference image to generate an interpolated image.
摘要翻译：一种图像处理装置，包括：图像获取部，其使用包含与频带对应的彩色滤波器的图像传感器拍摄并对应于多个帧的拍摄图像数据; 对准处理部，其对所拍摄的图像数据进行对准处理，生成集成的拍摄图像数据; 参考频带选择部分，使用前一帧中的输出图像从所述频带中选择参考频带; 参考图像生成部，对包含在所述综合拍摄图像数据中的与对应于所述参照频带的所述滤色器对应的图像数据进行插值处理; 以及内插图像生成部，对包含在所述综合拍摄图像数据中的图像数据进行内插处理，并对应于与基准参照图像不同的频带的滤色器对应，生成内插图像。

9. 发明授权

US09111369B2 Graphics accelerator 有权
标题翻译：图形加速器
公开(公告)号：US09111369B2
公开(公告)日：2015-08-18
申请号：US13782081
申请日：2013-03-01
申请人： Broadcom Corporation
发明人： Alexander G. MacInnis , Chengfuh Jeffrey Tang , Xiadong Xie , James T. Patterson , Greg A. Kranawetter
IPC分类号： G06T1/60 , G06T1/20 , G06T9/00 , G09G5/00 , G09G5/06 , G09G5/12 , G09G5/14 , G09G5/28 , G09G5/34 , G09G5/36 , H04N5/04 , H04N5/14 , H04N5/445 , H04N5/45 , H04N7/01 , H04N9/45 , H04N9/64 , H04N21/422 , H04N21/426 , H04N21/43 , H04N21/431 , H04N21/434 , H04N21/4402 , H04N21/443 , H04N21/47 , H04N19/61 , H04N19/44 , H04N19/42 , H04N19/423 , H04N19/436 , H04N19/59 , G09G5/02 , H04N5/12 , H04N5/44 , H04N5/46 , H04N11/14 , H04N11/20
CPC分类号： G06F3/0611 , G06F3/0653 , G06F3/0659 , G06F3/0683 , G06T1/20 , G06T1/60 , G06T9/00 , G06T9/007 , G09G5/001 , G09G5/02 , G09G5/024 , G09G5/026 , G09G5/06 , G09G5/12 , G09G5/14 , G09G5/28 , G09G5/346 , G09G5/36 , G09G5/363 , G09G2310/0224 , G09G2320/0247 , G09G2340/02 , G09G2340/0407 , G09G2340/10 , G09G2340/125 , G09G2360/02 , G09G2360/121 , G09G2360/125 , G09G2360/126 , G09G2360/128 , H04N5/04 , H04N5/126 , H04N5/14 , H04N5/4401 , H04N5/44504 , H04N5/44508 , H04N5/44591 , H04N5/45 , H04N5/46 , H04N7/0122 , H04N7/0135 , H04N9/45 , H04N9/641 , H04N9/642 , H04N11/143 , H04N11/20 , H04N19/42 , H04N19/423 , H04N19/436 , H04N19/44 , H04N19/59 , H04N19/61 , H04N21/42204 , H04N21/42653 , H04N21/4305 , H04N21/4316 , H04N21/434 , H04N21/440263 , H04N21/4438 , H04N21/47
摘要： Disclosed herein are various embodiments of a graphics accelerator, which may include an integrated circuit. The integrated circuit may include a local memory; a direct memory access (DMA) engine; a processor; and one or more processing pipelines. The local memory stores graphics data that includes a plurality of pixels. The DMA engine transfers the graphics data between the local memory and an external memory. The processor performs at least one operation, in parallel, on components of at least a portion of the pixels. The one or more processing pipelines process the graphics data. The graphics accelerator works on operands and produces outputs for one set of pixels while the DMA engine is bringing in operands for a future set of pixel operations, and transfers data from the external memory to the one or more processing pipelines by directing data to the one or more pipelines.
摘要翻译：这里公开了图形加速器的各种实施例，其可以包括集成电路。集成电路可以包括本地存储器; 直接存储器访问（DMA）引擎; 处理器和一个或多个处理管道。本地存储器存储包括多个像素的图形数据。 DMA引擎在本地存储器和外部存储器之间传输图形数据。处理器并行地执行至少一部分像素的组件上的至少一个操作。一个或多个处理管线处理图形数据。图形加速器对操作数起作用，并产生一组像素的输出，而DMA引擎为未来的像素运算组提供操作数，并通过将数据指向一个或多个处理流水线将数据从外部存储器传输到一个或多个处理流水线或更多管道。

10. 发明授权

US09077997B2 Graphics display system with unified memory architecture 有权
公开(公告)号：US09077997B2
公开(公告)日：2015-07-07
申请号：US10763087
申请日：2004-01-22
申请人： Alexander G. MacInnis , Chengfuh Jeffrey Tang , Xiaodong Xie , James T. Patterson , Greg A. Kranawetter
发明人： Alexander G. MacInnis , Chengfuh Jeffrey Tang , Xiaodong Xie , James T. Patterson , Greg A. Kranawetter
IPC分类号： G06F3/00 , H04N19/436 , G06T9/00 , G09G5/00 , G09G5/06 , G09G5/12 , G09G5/14 , G09G5/28 , G09G5/34 , G09G5/36 , H04N5/04 , H04N5/14 , H04N5/445 , H04N5/45 , H04N7/01 , H04N9/45 , H04N9/64 , H04N21/422 , H04N21/43 , H04N21/426 , H04N21/431 , H04N21/434 , H04N21/4402 , H04N21/443 , H04N21/47 , H04N19/61 , H04N19/44 , H04N19/42 , H04N19/423 , H04N19/59 , G09G5/02 , H04N5/12 , H04N5/44 , H04N5/46 , H04N11/14 , H04N11/20
CPC分类号： G06F3/0611 , G06F3/0653 , G06F3/0659 , G06F3/0683 , G06T1/20 , G06T1/60 , G06T9/00 , G06T9/007 , G09G5/001 , G09G5/02 , G09G5/024 , G09G5/026 , G09G5/06 , G09G5/12 , G09G5/14 , G09G5/28 , G09G5/346 , G09G5/36 , G09G5/363 , G09G2310/0224 , G09G2320/0247 , G09G2340/02 , G09G2340/0407 , G09G2340/10 , G09G2340/125 , G09G2360/02 , G09G2360/121 , G09G2360/125 , G09G2360/126 , G09G2360/128 , H04N5/04 , H04N5/126 , H04N5/14 , H04N5/4401 , H04N5/44504 , H04N5/44508 , H04N5/44591 , H04N5/45 , H04N5/46 , H04N7/0122 , H04N7/0135 , H04N9/45 , H04N9/641 , H04N9/642 , H04N11/143 , H04N11/20 , H04N19/42 , H04N19/423 , H04N19/436 , H04N19/44 , H04N19/59 , H04N19/61 , H04N21/42204 , H04N21/42653 , H04N21/4305 , H04N21/4316 , H04N21/434 , H04N21/440263 , H04N21/4438 , H04N21/47
摘要： A graphics display system integrated circuit is used in a set-top box for controlling a television display. The graphics display system processes analog video input, digital video input, and graphics input. The system incorporates a unified memory architecture that is shared by the graphics system, a CPU, and other peripherals. The unified memory architecture uses real time scheduling to service tasks. Critical instant analysis is used to find a schedule for memory usage that does not affect memory requirements of real time tasks while at the same time servicing non-real-time tasks as needed.

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