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1. 发明授权

US09269689B1 Single sided, flat, no lead, integrated circuit package 有权
标题翻译：单面，平面，无引线，集成电路封装
公开(公告)号：US09269689B1
公开(公告)日：2016-02-23
申请号：US13724894
申请日：2012-12-21
申请人： Maxim Integrated Products, Inc.
发明人： Jeff A. Gordon , Steven Hass , Hal Kurkowski , Scott Jones
IPC分类号： H01L23/48 , H01L23/00
CPC分类号： H01L24/46 , H01L23/32 , H01L24/48 , H01L24/85 , H01L2224/48091 , H01L2924/00014 , H01L2924/14 , H01L2924/181 , H05K3/325 , H05K2201/10636 , H05K2203/168 , Y02P70/611 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An integrated circuit package comprising an enclosure including a dielectric housing, a first electrical contact, and a second electrical contact. The dielectric housing, the first electrical contact, and the second electrical contact are configured to form a contact side of the enclosure. In addition, the first and second electrical contacts are sized to be substantially alignment insensitive for electro-mechanical connection to corresponding contacts of an end-use equipment. The enclosure encapsulates an integrated circuit die which is electrically coupled to the first and second electrical contacts. The alignment insensitive first and second electrical contacts may be electro-mechanically connected to corresponding contacts of an end-use equipment (e.g., a printer). Further, the integrated circuit package may be hosted by a peripheral device (e.g., a printer cartridge).
摘要翻译：一种集成电路封装，包括包括绝缘壳体，第一电触头和第二电触头的外壳。绝缘壳体，第一电触点和第二电触头被构造成形成外壳的接触侧。此外，第一和第二电触头的尺寸被设计成基本对准不对终端用途设备的相应触点进行机电连接的对准。封装封装集成电路管芯，该集成电路管芯电耦合到第一和第二电触点。对准不敏感的第一和第二电触点可以电机械连接到最终用途设备（例如打印机）的相应触点。此外，集成电路封装可以由外围设备（例如，打印机墨盒）托管。

2. 发明授权

US09039427B2 Interdigitated chip capacitor assembly 有权
标题翻译：叉指电容器组装
公开(公告)号：US09039427B2
公开(公告)日：2015-05-26
申请号：US13767009
申请日：2013-02-14
申请人： Texas Instruments Incorporated
发明人： Allan Jerome Daen Rapales , Floro Lopez Camenforte, III , John Paul Quianzon Kwo
IPC分类号： H01R12/00 , H01G2/06 , H01G4/232 , H05K1/18 , H01G4/30
CPC分类号： H05K3/3442 , H01G2/065 , H01G4/232 , H01G4/30 , H05K1/18 , H05K1/183 , H05K3/0014 , H05K3/301 , H05K3/3452 , H05K2201/0162 , H05K2201/09036 , H05K2201/09172 , H05K2201/09909 , H05K2203/0126 , H05K2203/046 , H05K2203/167 , H05K2203/168 , Y02P70/613 , Y10T29/43 , Y10T29/49135
摘要： An interdigitated chip capacitor (“IDC”) assembly including an IDC having a semiconductor block with a top portion, a bottom portion opposite the top portion, a plurality of sidewall portions extending between the top and bottom portions, and a plurality of terminals located on the sidewall portions; and a substrate having a top portion with a plurality of generally flat, vertically extending, nonconductive abutment surfaces thereon, the sidewall portions of the IDC being abuttingly engaged with at least some of the plurality of abutment surfaces.
摘要翻译：一种交错式片状电容器（“IDC”）组件，包括具有顶部的半导体块的IDC，与顶部相对的底部，在顶部和底部之间延伸的多个侧壁部分，以及位于侧壁部分; 以及具有在其上具有多个大致平坦的，垂直延伸的非导电邻接表面的顶部的基底，所述IDC的侧壁部分与多个邻接表面中的至少一些邻接地接合。

3. 发明授权

US08427839B2 Arrangement comprising an optoelectronic component 有权
标题翻译：包括光电子部件的布置
公开(公告)号：US08427839B2
公开(公告)日：2013-04-23
申请号：US12678511
申请日：2008-09-09
申请人： Dieter Eissler
发明人： Dieter Eissler
IPC分类号： H05K7/10
CPC分类号： H01L25/167 , H01L24/73 , H01L25/0756 , H01L33/62 , H01L33/641 , H01L2224/48227 , H01L2224/73257 , H01L2924/01005 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01068 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/04941 , H01L2924/12041 , H05K3/303 , H05K2201/09045 , H05K2201/10106 , H05K2203/167 , H05K2203/168 , Y02P70/613 , H01L2924/00
摘要： An arrangement includes an optoelectronic component with two contacts; at least one further component part; at least one contact arranged between the optoelectronic component and the further component part; and at least one web arranged between the optoelectronic component and the further component part.
摘要翻译：一种布置包括具有两个触点的光电子部件; 至少一个另外的部件; 布置在所述光电子部件和所述另外的部件之间的至少一个接触件; 以及布置在所述光电子部件和所述另外的部件之间的至少一个网。

4. 发明授权

US08338955B2 Single-sided, flat, no lead, integrated circuit package 有权
标题翻译：单面，平面，无引线，集成电路封装
公开(公告)号：US08338955B2
公开(公告)日：2012-12-25
申请号：US11697260
申请日：2007-04-05
申请人： Jeff Alan Gordon , Steven Hass , Hal Kurkowski , Scott Jones
发明人： Jeff Alan Gordon , Steven Hass , Hal Kurkowski , Scott Jones
IPC分类号： H01L23/48
CPC分类号： H01L24/46 , H01L23/32 , H01L24/48 , H01L24/85 , H01L2224/48091 , H01L2924/00014 , H01L2924/14 , H01L2924/181 , H05K3/325 , H05K2201/10636 , H05K2203/168 , Y02P70/611 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An integrated circuit package comprising an enclosure including a dielectric housing, a first electrical contact, and a second electrical contact. The dielectric housing, the first electrical contact, and the second electrical contact are configured to form a contact side of the enclosure. In addition, the first and second electrical contacts are sized to be substantially alignment insensitive for electro-mechanical connection to corresponding contacts of an end-use equipment. The enclosure encapsulates an integrated circuit die which is electrically coupled to the first and second electrical contacts. The alignment insensitive first and second electrical contacts may be electro-mechanically connected to corresponding contacts of an end-use equipment (e.g., a printer). Further, the integrated circuit package may be hosted by a peripheral device (e.g., a printer cartridge).
摘要翻译：一种集成电路封装，包括包括绝缘壳体，第一电触头和第二电触头的外壳。绝缘壳体，第一电触点和第二电触头被构造成形成外壳的接触侧。此外，第一和第二电触头的尺寸被设计成基本对准不对终端用途设备的相应触点进行机电连接的对准。封装封装集成电路管芯，该集成电路管芯电耦合到第一和第二电触点。对准不敏感的第一和第二电触点可以电机械连接到最终用途设备（例如打印机）的相应触点。此外，集成电路封装可以由外围设备（例如，打印机墨盒）托管。

5. 发明申请

US20120111606A1 ELECTRONIC CIRCUIT COMPRISING A TRANSFER FACE ON WHICH CONTACT PADS ARE LAID OUT 审中-公开
标题翻译：包含接触垫出现的转印面的电子电路
公开(公告)号：US20120111606A1
公开(公告)日：2012-05-10
申请号：US13293286
申请日：2011-11-10
申请人： Jean-Pierre Mauclerc
发明人： Jean-Pierre Mauclerc
IPC分类号： H05K1/00
CPC分类号： H05K1/111 , H01L23/49838 , H01L2924/0002 , H05K3/3436 , H05K2201/094 , H05K2201/10098 , H05K2201/10734 , H05K2203/168 , Y02P70/611 , H01L2924/00
摘要： An electronic circuit includes a transfer face and a plurality of contact pads. The pads include a first set of pads of a first type in a central zone at the center of the transfer face; second sets of pads of the first type on an end portion of a diagonal of the transfer face; third sets of pads of a second type on a median portion of a diagonal of the transfer face; fourth sets of pads of a third type in a lateral zone demarcated by the central zone and two semi-diagonals joined by one side of the transfer face. Each pad of the first type has a greater surface area on the transfer face than each pad of the second type, and each pad of the second type has a greater surface area than each pad of the third type.
摘要翻译：电子电路包括转印面和多个接触垫。垫片包括位于转印面中心的中央区域中的第一类型的第一组垫片; 在转印面的对角线的端部上的第一类型的第二组垫; 在转印面的对角线的中间部分上的第二类垫的第三组; 第四组第三类垫在由中心区域划分的横向区域中，两个半对角线由转移面的一侧连接。第一类型的每个焊盘在转印面上具有比每种第二类型的焊盘更大的表面积，并且第二类型的每个焊盘具有比第三类型的每个焊盘更大的表面积。

6. 发明申请

US20120106099A1 PACKAGING BOARD 审中-公开
标题翻译：包装板
公开(公告)号：US20120106099A1
公开(公告)日：2012-05-03
申请号：US13281878
申请日：2011-10-26
申请人： Yukinori KITA
发明人： Yukinori KITA
IPC分类号： H05K7/00
CPC分类号： H05K1/0269 , H01H2001/5888 , H05K3/306 , H05K2201/10053 , H05K2203/168
摘要： A packaging board is described having a structure that can positively prevent same kind electrical components having different specifications from being erroneously mounted on a printed board and that can quickly confirm a regular packaging position for each of the same kind of electrical components. The packing board includes at least two electrical components having a same kind and different specifications from each other can be provided with component side identifying marks that can discriminate between the electrical components. A printed board can be provided with mounting areas for the same kind of electrical components with board side identifying marks that correspond to the component side identifying marks.
摘要翻译：描述了一种包装板，其结构可以确实地防止具有不同规格的相同种类的电气部件错误地安装在印刷电路板上，并且可以快速确认每种相同类型的电气部件的正常包装位置。包装板包括彼此相同种类和不同规格的至少两个电气部件可以设置有能够区分电气部件的部件侧识别标记。可以为印刷电路板提供相同类型的电气部件的安装区域，其中板侧识别标记对应于部件侧识别标记。

7. 发明授权

US07898818B2 Variably orientated capacitive elements for printed circuit boards and method of manufacturing same 有权
标题翻译：用于印刷电路板的可变取向的电容元件及其制造方法
公开(公告)号：US07898818B2
公开(公告)日：2011-03-01
申请号：US11683144
申请日：2007-03-07
申请人： Daniel W. Kehoe
发明人： Daniel W. Kehoe
IPC分类号： H05K1/18
CPC分类号： H01G4/38 , H01G2/065 , H01G4/30 , H05K1/0231 , H05K1/181 , H05K2201/09936 , H05K2201/10454 , H05K2201/10522 , H05K2201/10636 , H05K2203/168 , Y02P70/611 , Y10T29/49169
摘要： Variably oriented capacitive elements for printed circuit boards (PCBs) and method of manufacturing the same. In one form the disclosure, a PCB can include a first multiple-layered capacitor including a first orientation and placed along a surface operable to mount electronic components. The PCB can also include a second multiple-layered capacitor including a second orientation different from the first. The second multiple-layered capacitor can be placed along the surface near the first multiple-layered capacitor.
摘要翻译：用于印刷电路板（PCB）的可变方向电容元件及其制造方法。在本公开的一种形式中，PCB可以包括包括第一取向的第一多层电容器，并且沿着可操作以安装电子部件的表面放置。 PCB还可以包括第二多层电容器，其包括与第一取向不同的第二取向。第二多层电容器可以沿着第一多层电容器附近的表面放置。

8. 发明授权

US07851255B2 Placement of an integrated circuit 有权
标题翻译：放置集成电路
公开(公告)号：US07851255B2
公开(公告)日：2010-12-14
申请号：US12195441
申请日：2008-08-21
申请人： Czeslaw Andrzej Ruszowski
发明人： Czeslaw Andrzej Ruszowski
IPC分类号： H01L21/00
CPC分类号： H05K3/303 , H01L2924/14 , H05K1/0266 , H05K2201/10568 , H05K2201/10689 , H05K2203/167 , H05K2203/168 , Y02P70/613 , Y10T29/49133
摘要： Disclosed herein is a method of positioning and placing an integrated circuit on a printed circuit board. The integrated circuit comprises first geometrical elements. The first geometrical elements are of one or more predefined shapes and are located on one or more predefined surfaces of the integrated circuit. The printed circuit board comprises second geometrical elements. The second geometrical elements are shaped to accommodate the first geometrical elements. The first geometrical elements are designed to fit into the second geometrical elements. The first geometrical elements are positioned and placed over the second geometrical elements. The first geometrical elements come in contact with the second geometrical elements at two or more points. The positioning and placement of the first geometrical elements over the second geometrical elements limits displacement of connections of the integrated circuit from the printed circuit board.
摘要翻译：这里公开了一种将集成电路定位和放置在印刷电路板上的方法。集成电路包括第一几何元件。第一几何元件具有一个或多个预定形状并且位于集成电路的一个或多个预定表面上。印刷电路板包括第二几何元件。第二几何元件被成形为适应第一几何元件。第一几何元件被设计成适合于第二几何元件。第一几何元件被定位并放置在第二几何元件上。第一几何元件在两个或多个点处与第二几何元件接触。在第二几何元件上的第一几何元件的定位和放置限制了集成电路与印刷电路板的连接的位移。

9. 发明授权

US07655348B2 Chip-type battery 失效
标题翻译：芯片型电池
公开(公告)号：US07655348B2
公开(公告)日：2010-02-02
申请号：US11055971
申请日：2005-02-14
申请人： Tetsuo Nanno , Tsunenori Yoshida
发明人： Tetsuo Nanno , Tsunenori Yoshida
IPC分类号： H01M10/48 , H01M2/00 , H01M2/02
CPC分类号： H01M10/0436 , H01M2/30 , H01M10/4257 , H05K1/0269 , H05K3/303 , H05K2201/0112 , H05K2201/10636 , H05K2201/10909 , H05K2203/168 , Y02P70/611 , Y02P70/613
摘要： In order to enhance versatility, a chip-type battery having a means for readily identifying a first terminal and a second terminal is provided. The chip-type battery includes: a body having a substantially rectangular parallelepiped shape and contains a plurality of power generating elements in a stack, each element including a sintered material; a first terminal having a first polarity; and a second terminal having a second polarity. The first terminal is provided at a first side face of the body. The second terminal is provided at a second side face of the body located on other than the first side face. The first terminal and the second terminal include different metal materials.
摘要翻译：为了提高多功能性，提供了具有用于容易地识别第一端子和第二端子的装置的芯片型电池。芯片型电池包括：具有大致长方体形状并且在堆叠中包含多个发电元件的主体，每个元件包括烧结材料; 具有第一极性的第一端子; 以及具有第二极性的第二端子。第一端子设置在主体的第一侧面。第二端子设置在位于除了第一侧面之外的主体的第二侧面。第一端子和第二端子包括不同的金属材料。

10. 发明授权

US07518306B2 Light unit with staggered electrodes 有权
标题翻译：具有交错电极的灯单元
公开(公告)号：US07518306B2
公开(公告)日：2009-04-14
申请号：US11459377
申请日：2006-07-24
申请人： Jiahn-Chang Wu
发明人： Jiahn-Chang Wu
IPC分类号： H01J1/62 , H01J63/04
CPC分类号： H01L33/62 , H01L2224/48091 , H01L2224/48247 , H05K3/308 , H05K2201/09309 , H05K2201/10106 , H05K2201/10651 , H05K2203/168 , H01L2924/00014
摘要： A staggered light unit has a top-bottom electrode lead. The light unit is insertable into a substrate having a metal/insulation/metal sandwich structure.
摘要翻译：交错的光单元具有顶部 - 底部电极引线。光单元可插入具有金属/绝缘/金属夹层结构的基板中。

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