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1. 发明授权

US10558173B2 Method and device for producing a reference frequency 有权
公开(公告)号：US10558173B2
公开(公告)日：2020-02-11
申请号：US16091333
申请日：2017-04-05
申请人： Technische Universität Wien
发明人： Michael Trupke
IPC分类号： G04G3/04 , G02B6/293 , G02B6/42 , G04F5/14 , H03L7/26 , H01S3/10 , H01S3/13
摘要： The invention relates to a method for producing a reference frequency Δf. According to the invention, the use of a first optical resonator (3a; 24) and of a second optical resonator (25) is provided, wherein the first resonator (3a; 24) has a first resonator mode having a first frequency f1 and the second resonator (25) has a second resonator mode having a second frequency f2, wherein the frequencies of the two resonator modes are functions of an operating parameter BP and assume the values f1 and f2 at a specified value BP0 of the operating parameter such that f1(BP0)=f1 and f2(BP0)=f2 apply, wherein the resonators (3a; 24, 25) are designed in such a way that the respective first derivatives of the frequencies f1(BP), f2(BP) with respect to BP or at least respective difference quotients around BP0 correspond within a deviation of at most ±0.1%, wherein light of the first frequency f1 is stabilized to the first frequency f1 by means of the first resonator and light of the second frequency f2 is stabilized to the second frequency f2 by means of the second resonator, and wherein the difference between the stabilized frequencies f1 and f2, Δf=|f1−f2|, is determined in order to obtain the stabilized reference frequency Δf.

2. 发明授权

US10528011B2 Oscillation device and timepiece with temperature compensation function 有权
公开(公告)号：US10528011B2
公开(公告)日：2020-01-07
申请号：US15437743
申请日：2017-02-21
申请人： Seiko Epson Corporation
发明人： Yutaka Yamazaki
IPC分类号： G04G3/00 , G04G3/04 , G04B47/06 , H03B5/36
摘要： An oscillation device includes an oscillation circuit configured including an oscillation inverter, and adapted to oscillate a resonator, a frequency adjustment circuit adapted to perform frequency adjustment of the oscillation circuit, and a constant voltage circuit adapted to drive the oscillation circuit, in the oscillation circuit and the frequency adjustment circuit, a gate and a substrate of a field-effect transistor having a connection relationship with one of a gate and a drain of the oscillation inverter are driven with a constant voltage.

3. 发明授权

US09304498B2 Method for compensating timing errors of real-time clocks 有权
标题翻译：补偿实时时钟定时误差的方法
公开(公告)号：US09304498B2
公开(公告)日：2016-04-05
申请号：US14291123
申请日：2014-05-30
申请人： SI-EN TECHNOLOGY LIMITED
发明人： Dongshi Zhou
IPC分类号： G06F11/00 , G06F1/00 , G04G3/04
CPC分类号： G04G3/04
摘要： The present invention relates to a method for compensating timing errors of real-time clocks, which comprises a compensating step, wherein in step 1, assign CNT to be 0 and execute step two; in step 2, assign FLAG to be 1 when a rising edge of 1 Hz clock is arrived and execute step 3; in step 3, judge FLAG and M3, if FLAG=1 and M3 0, execute step 5; otherwise execute step 2; in step 4, execute an assignment operation, CNT=0, M3=M3+S4, FLAG=0 and restart step 2; in step 5, execute an assignment operation, CNT=S4, M3=M3−S4, FLAG=0, and restart step 2. A sampling frequency of relative errors ERR of the present invention is adjustable, and a compensatory accuracy is much higher.
摘要翻译：本发明涉及一种用于补偿实时时钟的定时误差的方法，包括补偿步骤，其中在步骤1中，将CNT分配为0并执行步骤2; 在步骤2中，当到达1 Hz时钟的上升沿时，将FLAG分配为1，执行步骤3; 在步骤3中，判断FLAG和M3，如果FLAG = 1且M3 <0，则在等待直到CNT = S4时执行步骤4; 如果FLAG = 1，CNT = 0和M3> 0，执行步骤5; 否则执行步骤2; 在步骤4中，执行分配操作，CNT = 0，M3 = M3 + S4，FLAG = 0，重启步骤2; 在步骤5中，执行分配操作CNT = S4，M3 = M3-S4，FLAG = 0，并重新开始步骤2.本发明的相对误差ERR的采样频率是可调节的，并且补偿精度要高得多。

4. 发明授权

US10295962B2 Method for testing the rate of a quartz watch 有权
公开(公告)号：US10295962B2
公开(公告)日：2019-05-21
申请号：US15340286
申请日：2016-11-01
申请人： ETA SA Manufacture Horlogere Suisse
发明人： Francois Klopfenstein , Yves Godat , Nicolas Jeannet
IPC分类号： G04D7/00 , G04D7/12 , G04C3/12 , G04C3/10 , G04G3/02 , G04G3/04
摘要： The method for test the rate of an electronic watch with a time base device (1) comprises three main steps for the test on test equipment. The time base device comprises at least one watch module (2) with a resonator (3) connected to an oscillator of an electronic circuit (4), which is followed by a divider circuit, which is controlled by an inhibition circuit, and which provides a divided timing signal for a motor. In a first step, a measurement is made of the frequency of the oscillator reference signal in at least one measurement period without inhibition. A second step is provided for acquiring the current inhibition value to inhibit a certain number of clock pulses in a subsequently inhibition period and to determine the inhibition value. Finally, a third step is provided for calculating the corresponding rate frequency of the watch.

5. 发明授权

US09362920B2 Correction circuit and real-time clock circuit 有权
标题翻译：校正电路和实时时钟电路
公开(公告)号：US09362920B2
公开(公告)日：2016-06-07
申请号：US14194291
申请日：2014-02-28
申请人： Huawei Technologies Co., Ltd.
发明人： Jinxiu Liu , Shubao Guo , Ding Li
IPC分类号： G06F1/00 , G06F1/04 , G06F13/42 , H03K21/02 , G06F1/14 , H03L1/00 , G04G3/04 , G06F1/32
CPC分类号： H03K21/02 , G04G3/04 , G06F1/14 , G06F1/32 , H03L1/00
摘要： The present invention provides a correction circuit. The correction circuit includes a frequency dividing circuit, a frequency dividing coefficient operation circuit, a built-in temperature collection circuit, and a power-on and power-off detection circuit. The built-in temperature collection circuit is configured to collect a temperature of the chip; the power-on and power-off detection circuit is configured to detect power-on and power-off of the chip; the frequency dividing coefficient operation circuit is configured to calculate, according to the temperature of the chip collected by the built-in temperature collection circuit when the power-on and power-off detection circuit detects that the chip is powered off, a frequency dividing coefficient, and output the frequency dividing coefficient to the frequency dividing circuit; and the frequency dividing circuit is configured to provide, according to the frequency dividing coefficient output by the frequency dividing coefficient operation circuit, a timing pulse for a real-time clock.
摘要翻译：本发明提供一种校正电路。校正电路包括分频电路，分频系数运算电路，内置温度采集电路以及通电断电检测电路。内置的温度采集电路被配置为收集芯片的温度; 上电断电检测电路被配置为检测芯片的上电和断电; 分频系数运算电路被配置为当上电和断电检测电路检测到芯片断电时根据由内置温度采集电路收集的芯片的温度来计算分频系数并将分频系数输出到分频电路; 并且分频电路被配置为根据由分频系数运算电路输出的分频系数提供实时时钟的定时脉冲。

6. 发明授权

US08981857B2 Temperature dependent timer circuit 有权
标题翻译：温度依赖定时器电路
公开(公告)号：US08981857B2
公开(公告)日：2015-03-17
申请号：US13678117
申请日：2012-11-15
申请人： Dale J. McQuirk , Michael T. Berens , Miten H. Nagda
发明人： Dale J. McQuirk , Michael T. Berens , Miten H. Nagda
IPC分类号： H03K3/03 , H03K3/023 , G06F1/26 , G11C5/14 , G11C11/406 , H03K3/0231 , G06F1/08 , G06F1/32 , G04G3/04 , G04F3/06
CPC分类号： H03K3/023 , G04F3/06 , G04G3/04 , G06F1/08 , G06F1/26 , G06F1/3296 , G11C5/147 , G11C11/40626 , G11C2211/4065 , H03K3/0231 , Y02D10/172
摘要： A timer to provide pulses at a comparator output wherein a frequency of the pulses is dependent on temperature, wherein providing each pulse includes biasing a first input of the comparator at a voltage and operating a transistor in a subthreshold region of operation to change the voltage of the first input of a comparator at a rate dependent upon temperature. The output of the comparator changes state when the voltage of the first input crosses a voltage of a second input of the comparator.
摘要翻译：一种在比较器输出端提供脉冲的定时器，其中所述脉冲的频率取决于温度，其中提供每个脉冲包括以一个电压偏置所述比较器的第一输入并操作亚阈值操作区域中的晶体管，比较器的第一个输入，取决于温度。当第一输入的电压与比较器的第二输入的电压相交时，比较器的输出改变状态。

7. 发明申请

US20140269227A1 TIMEPIECE DEVICE AND METHOD OF OPERATION THEREOF 审中-公开
标题翻译：定时器件及其操作方法
公开(公告)号：US20140269227A1
公开(公告)日：2014-09-18
申请号：US14117610
申请日：2012-05-11
申请人： Borislav Bobev , Krassimire Stoyanov
发明人： Borislav Bobev , Krassimire Stoyanov
IPC分类号： G04G7/00 , G04G3/04
CPC分类号： G04G7/00 , G04G3/04
摘要： A timepiece device includes a control unit for time keeping, which is synchronizable by a clock generator. The timepiece device has at least two crystal oscillators built respectively by at least one crystal unit, whereby a first crystal oscillator with a first crystal unit and with a predetermined nominal oscillation frequency is suitable for use as the clock generator of the control unit during a vehicle standby mode, and whereby the oscillation frequency of the first crystal oscillator is at least temporarily measured and adjustable by a second crystal oscillator with a second crystal unit whose nominal oscillation frequency is higher than that of the first crystal oscillator. In a method of operation of the timepiece device, the oscillation frequency of the second crystal oscillator is compensated against the temperature by the software inside the control unit.
摘要翻译：钟表装置包括用于时间保持的控制单元，其可由时钟发生器同步。该钟表装置具有至少两个晶体振荡器，分别由至少一个晶体单元构成，由此具有第一晶体单元和预定标称振荡频率的第一晶体振荡器适合用作车辆中的控制单元的时钟发生器待机模式，由此第一晶体振荡器的振荡频率至少由标称振荡频率高于第一晶体振荡器的第二晶体单元的第二晶体振荡器临时测量和调节。在钟表装置的操作方法中，通过控制单元内部的软件来补偿第二晶振的振荡频率。

8. 发明授权

US10936004B2 Temperature compensated clock frequency monitor 有权
公开(公告)号：US10936004B2
公开(公告)日：2021-03-02
申请号：US16143967
申请日：2018-09-27
申请人： Microchip Technology Incorporated
发明人： Bryan Kris , Igor Wojewoda , Stephen Bowling , Yong Yuenyongsgool
IPC分类号： G06F1/08 , G06F1/20 , G06F11/30 , G01R19/25 , G05B13/02 , G01R23/15 , H03L1/02 , G04G3/04 , G05B19/042
摘要： A temperature-compensating clock frequency monitor circuit may be provided to detect a clock pulse frequency in an electronic device that may cause erratic or dangerous operation of the device, as a function of an operating temperature of the device. The temperature-compensating clock frequency monitor circuit include a temperature sensor configured to measure a temperature associated with an electronic device, a clock having an operating frequency, and a frequency monitoring system. The frequency monitoring system may be configured to determine the operating frequency of the clock, and based at least on (a) the operating frequency of the clock and (b) the measured temperature associated with the electronic device, generate a corrective action signal to initiate a corrective action associated with the electronic device or a related device. The temperature sensor, clock, and frequency monitoring system may, for example, be provided on a microcontroller.

9. 发明授权

US10317850B2 Positioning apparatus, electronic timepiece, positioning control method and recording medium 有权
公开(公告)号：US10317850B2
公开(公告)日：2019-06-11
申请号：US15660055
申请日：2017-07-26
申请人： CASIO COMPUTER CO., LTD.
发明人： Takeshi Matsue
IPC分类号： G04G3/04 , G04G19/12 , G04G99/00 , G04R20/02 , G04R40/00
摘要： A positioning apparatus includes the following. A first oscillator outputs a clock signal. A second oscillator outputs a clock signal which is more accurate than the first oscillator. A receiver receives a radio wave from a positioning satellite. A positioning controller calculates a present position based on positioning information calculated from the received radio wave. The positioning controller controls switching of a supply source of the clock signal supplied to the receiver and the positioning controller between the first oscillator and the second oscillator depending on a reception status of the radio wave from the positioning satellite by the receiver.

10. 发明授权

US10274899B2 Thermocompensated chronometer circuit 有权
公开(公告)号：US10274899B2
公开(公告)日：2019-04-30
申请号：US14649029
申请日：2013-12-11
申请人： ETA SA Manufacture Horlogere Suisse
发明人： Thierry Bonnet , Silvio Dalla Piazza , Laurent Christe , Francois Klopfenstein , Emmanuel Fleury , Yves Godat , Nicolas Jeannet
IPC分类号： G04C13/00 , G04C3/14 , G04G3/04
摘要： An electronic module including at least one electric motor for driving an analog display, a clock module including a time base delivering a clock signal connected to a divider circuit, the divider circuit delivering a reference signal sent to a control circuit arranged to control the electric motor, the clock module further including a measuring and correction circuit arranged between the time base and the divider circuit and delivering an intermediate compensated signal. The time base, the compensation module, the divider circuit, and the control circuit are arranged in a same case to form the clock module.

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