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1. 发明授权

US10211150B2 Memory structure 有权
公开(公告)号：US10211150B2
公开(公告)日：2019-02-19
申请号：US14845304
申请日：2015-09-04
申请人： MACRONIX INTERNATIONAL CO., LTD.
发明人： Shih-Hung Chen
IPC分类号： H01L23/528 , H01L29/792 , H01L29/788 , H01L27/115 , G11C16/18 , H01L27/11519 , H01L27/11556 , H01L27/11521 , H01L27/11565 , H01L27/11568 , H01L27/11582 , G11C16/08
摘要： A memory structure is provided. The memory structure comprises M array regions and N contact regions. M is an integer ≥2. N is an integer ≥M. Each array region is coupled to at least one contact region. Each contact region comprises a stair structure and a plurality of contacts. The stair structure comprises alternately stacked conductive layers and insulating layers. Each contact is connected to one conductive layer of the stair structure. Two array regions which are adjacent to each other are spatially separated by two contact regions, which are coupled to the two array regions, respectively.

2. 发明申请

US20050232026A1 Ultraviolet erasable semiconductor memory device 有权
标题翻译：紫外线可擦除半导体存储器件
公开(公告)号：US20050232026A1
公开(公告)日：2005-10-20
申请号：US11053851
申请日：2005-02-10
申请人： Yukihisa Kumagai
发明人： Yukihisa Kumagai
IPC分类号： G11C16/04 , G11C5/00 , G11C8/00 , G11C11/34 , G11C11/42 , G11C16/00 , G11C16/06 , G11C16/18 , H01L21/8247 , H01L27/10 , H01L27/115 , H01L29/78 , H01L29/788 , H01L29/792
CPC分类号： G11C16/18 , G11C8/00
摘要： Each memory cell of an EPROM contains two MOSFETs and a data of each memory cell is read out by detecting a current difference between the two MOSFETs by using a differential amplifier. In such constitution as described above, even when the data is erased by irradiating an ultraviolet ray, a stable output of the differential amplifier can be obtained and, therefore, confirmation of an initialized state can be facilitated. Specifically, a channel width WA of one of the two MOSFETs constituting the memory cell is formed narrower than a channel width WB of the other. By such arrangement as described above, in an initialized state in which the ultraviolet ray is irradiated, a data signal current value IHA of the MOSFET having the channel width WA becomes smaller than a data signal current value IHB flowing in the MOSFET having the channel width WB. Accordingly, the output of the differential amplifier is fixed in accordance with a current magnitude relation of IHA
摘要翻译： EPROM的每个存储单元包含两个MOSFET，并且通过使用差分放大器检测两个MOSFET之间的电流差来读出每个存储单元的数据。在这样构成的情况下，即使通过照射紫外线来擦除数据，也能够获得稳定的差分放大器的输出，因此能够促进初始化状态的确认。具体地，构成存储单元的两个MOSFET之一的沟道宽度W A A A形成得窄于另一个的沟道宽度W B B。通过如上所述的布置，在照射紫外线的初始化状态下，具有沟道宽度W A A的MOSFET的数据信号电流值I H HA < 小于在具有沟道宽度W B的MOSFET中流动的数据信号电流值I HB。因此，差分放大器的输出根据I H B H I H B B的电流大小关系固定，从而定义数据“0”。另一方面，在写入数据“1”时，将电荷注入具有沟道宽度W B B的MOSFET的浮置栅电极以提高阈值电压Vt，然后，MOSFET为设置为“关闭”状态。

3. 发明授权

US6121656A Semiconductor memory device mounted with a light emitting device 失效
标题翻译：安装有发光器件的半导体存储器件
公开(公告)号：US6121656A
公开(公告)日：2000-09-19
申请号：US964828
申请日：1997-11-05
申请人： Haruo Tanaka , Yukio Shakuda
发明人： Haruo Tanaka , Yukio Shakuda
IPC分类号： H01L21/8247 , G11C16/18 , H01L27/115 , H01L27/15 , H01L29/788 , H01L29/792 , H01L31/167 , H01L33/32 , H01L33/56 , H07L29/788
CPC分类号： G11C16/18 , H01L31/167 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247
摘要： A semiconductor memory device in which a stored information can be simply erased only by an electric signal so as to be rewritten is provided. The semiconductor memory device includes (a) a semiconductor chip having an array of memory cells, stored information in the memory cells being erasable by light irradiation; (b) a light emitting element irradiating a light into the memory cells portion of the semiconductor chip; and (c) a package in which the semiconductor chip and the light emitting element are encapsulated with a resin in one body.
摘要翻译：提供了一种半导体存储器件，其中可以仅通过电信号简单地擦除存储的信息以便被重写。半导体存储器件包括（a）具有存储单元阵列的半导体芯片，存储单元中存储的信息可通过光照射而被擦除; （b）向所述半导体芯片的存储单元部分照射光的发光元件; 和（c）半导体芯片和发光元件用树脂封装在一体内的封装。

4. 发明授权

US5856705A Sealed semiconductor chip and process for fabricating sealed semiconductor chip 失效
标题翻译：密封半导体芯片和制造密封半导体芯片的工艺
公开(公告)号：US5856705A
公开(公告)日：1999-01-05
申请号：US734445
申请日：1996-10-17
申请人： Chiu H. Ting
发明人： Chiu H. Ting
IPC分类号： G11C16/18 , H01L23/00 , H01L23/29 , H01L23/31 , H01L21/78 , H01L29/34
CPC分类号： H01L23/564 , G11C16/18 , H01L23/291 , H01L23/3171 , H01L2924/0002
摘要： Described is a structure and process for forming a hermetically sealed chip. This hermetically sealed chip will greatly simplify packaging requirements and eventually lead to the realization of a "packageless chip". The hermetic sealing is composed of two parts, an extremely thin passivation layer which is deposited over the entire chip top and side surfaces and a passivation layer which is deposited over the bonding pad surface. Preferably, SiN is deposited as a chip surface passivation layer and Ni is selectively deposited as a metal passivation layer. The extremely thin nitride layer will minimize the stress and the amount of hydrogen in the SiN film and minimize deleterious effects upon device performance caused by stress and hydrogen. The thickness of the metal passivation layer may be the same as that of the dielectric layer so as to give a planar surface or it may be thick enough so as to give a protruding metal passivation bump.
摘要翻译：描述了形成密封芯片的结构和工艺。这种密封芯片将大大简化封装要求，最终导致实现“无封装芯片”。气密密封由两部分组成，其沉积在整个芯片顶部和侧表面上的极薄的钝化层和沉积在焊盘表面上的钝化层。优选地，SiN作为芯片表面钝化层沉积，并且Ni被选择性地沉积为金属钝化层。极薄的氮化物层将使SiN膜中的应力和氢的量最小化，并使由应力和氢引起的对器件性能的有害影响最小化。金属钝化层的厚度可以与电介质层的厚度相同，以便得到平坦的表面，或者可以足够厚以便产生突出的金属钝化凸块。

5. 发明授权

US5300461A Process for fabricating sealed semiconductor chip using silicon nitride passivation film 失效
标题翻译：使用氮化硅钝化膜制造密封半导体芯片的工艺
公开(公告)号：US5300461A
公开(公告)日：1994-04-05
申请号：US8469
申请日：1993-01-25
申请人： Chiu H. Ting
发明人： Chiu H. Ting
IPC分类号： G11C16/18 , H01L23/00 , H01L23/29 , H01L23/31 , H01L21/80
CPC分类号： H01L23/564 , G11C16/18 , H01L23/291 , H01L23/3171 , H01L2924/0002
摘要： Described is a structure and process for forming a hermetically sealed chip. This hermetically sealed chip will greatly simplify packaging requirements and eventually lead to the realization of a "packageless chip". The hermetic sealing is composed of two parts, an extremely thin passivation layer which is deposited over the entire chip top and side surfaces and a passivation layer which is deposited over the bonding pad surface. Preferably, SiN is deposited as a chip surface passivation layer and Ni is selectively deposited as a metal passivation layer. The extremely thin nitride layer will minimize the stress and the amount of hydrogen in the SiN film and minimize deleterious effects upon device performance caused by stress and hydrogen. The thickness of the metal passivation layer may be the same as that of the dielectric layer so as to give a planar surface or it may be thick enough so as to give a protruding metal passivation bump.
摘要翻译：描述了形成密封芯片的结构和工艺。这种密封芯片将大大简化封装要求，最终导致实现“无封装芯片”。气密密封由两部分组成，其沉积在整个芯片顶部和侧表面上的极薄的钝化层和沉积在焊盘表面上的钝化层。优选地，SiN作为芯片表面钝化层沉积，并且Ni被选择性地沉积为金属钝化层。极薄的氮化物层将使SiN膜中的应力和氢的量最小化，并使由应力和氢引起的对器件性能的有害影响最小化。金属钝化层的厚度可以与电介质层的厚度相同，以便得到平坦的表面，或者可以足够厚以便产生突出的金属钝化凸块。

6. 发明授权

US5255236A ROM card unit 失效
标题翻译： ROM卡单元
公开(公告)号：US5255236A
公开(公告)日：1993-10-19
申请号：US681342
申请日：1991-04-08
申请人： Mitsuo Maehara
发明人： Mitsuo Maehara
IPC分类号： G06F12/16 , G11C16/02 , G11C16/18 , G11C17/00 , G11C7/00 , G11C13/04
CPC分类号： G11C16/18
摘要： A ROM card unit having a card package accommodating a ROM card board on which ROMs allowing data stored therein to be erased by ultraviolet radiation are mounted. A transparent cover permitting ultraviolet light to transmit therethrough is provided on a first side of the card package where there are ultraviolet radiation windows of the ROMs. An ultraviolet shield member for preventing unwanted erasure of the data in the ROMs is mounted on the first side of the card package in such a manner as to be removable therefrom.

7. 发明授权

US5043004A Method for making a ceramic lid for hermetic sealing of an EPROM circuit 失效
标题翻译：制造用于EPROM电路气密密封的陶瓷盖的方法
公开(公告)号：US5043004A
公开(公告)日：1991-08-27
申请号：US574668
申请日：1990-08-29
申请人： Nobuaki Miyauchi
发明人： Nobuaki Miyauchi
IPC分类号： C04B37/04 , G11C16/18
CPC分类号： G11C16/18
摘要： An assembly structure and a method for making a ceramic lid for a hermetically sealed package for an EPROM circuit are disclosed. The assembly structure includes, in combination, a ceramic lid, a UV transparent lens, and two fixtures for supporting the lens in the lid. The two fixtures are configured to contact the lens only at predetermined areas which are not crucial to UV transparency. The UV transparent lens is hermetically sealed to the ceramic lid by firing the assembly structure. The assembly structure prevents the lens from attracting foreign particulate matter during firing, thereby leaving the surfaces of the lens clean. The method provides a ceramic lid having a UV transparent lens hermetically sealed thereto, which finds wide use in integrated circuit packages for high-density EPROM's because of the untainted surfaces of the lens.
摘要翻译：公开了一种用于制造用于EPROM电路的气密封装的陶瓷盖的组装结构和方法。组合结构包括陶瓷盖，UV透明透镜和用于将透镜支撑在盖中的两个固定装置。两个固定装置被配置成仅在对UV透明度至关重要的预定区域接触透镜。 UV透明透镜通过烧结组装结构而密封在陶瓷盖上。组装结构防止了镜头在烧制过程中吸引外来颗粒物，从而使透镜的表面清洁。该方法提供了一种具有密封在其上的UV透明透镜的陶瓷盖，其由于透镜的未被保持的表面而被广泛用于高密度EPROM的集成电路封装中。

8. 发明授权

US4727221A Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US4727221A
公开(公告)日：1988-02-23
申请号：US931652
申请日：1986-11-17
申请人： Akitoshi Saitou , Mikio Bessho
发明人： Akitoshi Saitou , Mikio Bessho
IPC分类号： H01L23/02 , G11C16/18 , H01L21/8247 , H01L29/788 , H01L29/792 , H01L23/06
CPC分类号： G11C16/18 , H01L2224/32225 , H01L2224/48091 , H01L2224/48247 , H01L2224/48472 , H01L2224/73265 , H01L2924/01079 , H01L2924/3025 , Y10T428/2804 , Y10T428/31721
摘要： An UV-EPROM has a window for transmitting ultra-violet rays during the erasing operation, which is covered by a shading sheet including a metallic film, a polyimide film laminated on the upper surface of the metallic film, and a bond film attached to the lower surface of the metallic film.
摘要翻译： UV-EPROM具有用于在擦除操作期间传输紫外线的窗口，其被包括金属膜的遮光片，层压在金属膜的上表面上的聚酰亚胺膜和粘附到金属膜的粘结膜覆盖金属膜的下表面。

9. 发明授权

US4710797A Erasable and programable read only memory devices 失效
标题翻译：可擦除和可编程的只读存储器件
公开(公告)号：US4710797A
公开(公告)日：1987-12-01
申请号：US586998
申请日：1984-03-07
申请人： Seietsu Tanaka
发明人： Seietsu Tanaka
IPC分类号： H01L23/02 , G11C16/18 , H01L23/08 , H01L23/18
CPC分类号： G11C16/18 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/48247 , H01L2224/73265 , H01L24/73 , H01L2924/14
摘要： An EPROM device is constituted by an IC lead frame having an island area and a plurality of lead wires, an EPROM IC chip mounted in the island area of the frame, a plurality of wirings, each connecting the bonding pad of the IC chip to one of the lead wires, a layer of silicone resin material formed on the upper surface of the IC chip, a window plate placed on the surface of the silicone resin layer for transmitting ultraviolet rays and bonded to the silicone resin layer, and a molded package of epoxy resin encapsulating the chip island area, the EPROM chip and the silicone resin layer so as to expose the upper surface of the window plate.
摘要翻译： EPROM装置由具有岛状区域和多条引线的IC引线框架，安装在框架的岛状区域的EPROM IC芯片，多个布线构成，各布线将IC芯片的焊盘连接到一个的导线，形成在IC芯片的上表面上的硅树脂材料层，放置在用于透射紫外线并结合到有机硅树脂层的硅树脂层的表面上的窗板，以及模制包装封装芯片岛区域的环氧树脂，EPROM芯片和硅树脂层，以露出窗板的上表面。

10. 发明授权

US4644384A Apparatus and method for packaging eprom integrated circuits 失效
标题翻译：用于封装eprom集成电路的装置和方法
公开(公告)号：US4644384A
公开(公告)日：1987-02-17
申请号：US576300
申请日：1984-02-02
申请人： Chamras Charoensakvirochana , Wing K. Boey
发明人： Chamras Charoensakvirochana , Wing K. Boey
IPC分类号： B29C45/14 , G11C16/18 , H01L21/56 , H01L23/02 , H01L23/12
CPC分类号： G11C16/18 , B29C45/14655 , H01L21/565 , H01L2224/48091 , H01L2224/48247 , Y10T29/49121
摘要： An apparatus and a method for forming a protective package for an EPROM circuit are disclosed. The protective package includes a two piece inner ceramic package and a molded outer plastic package. The inner ceramic package includes a base member upon which the chip is mounted for wiring to a lead frame, and also includes a protective cover with a radiation transparent window that covers and protects the chip and wires. The base member and the protective cover are bonded together to hermetically seal the chip. The molded outer plastic package is formed in a mold that includes an elastomeric plug that contacts the top of the window to isolate it from the mold cavity. The plug prevents plastic from covering the top of the window during molding.
摘要翻译：公开了一种用于形成用于EPROM电路的保护封装的装置和方法。保护包装包括两件式内部陶瓷包装和模塑外部塑料包装。内部陶瓷封装包括基座部件，芯片安装在该基座上用于布线到引线框架，并且还包括具有覆盖和保护芯片和电线的辐射透明窗口的保护盖。基座部件和保护盖接合在一起以密封芯片。模制的外部塑料包装形成在模具中，该模具包括接触窗口顶部以将其与模具腔隔离的弹性体塞。插头防止塑料在模制过程中覆盖窗户的顶部。

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