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1. 发明授权

US11251310B2 Oxide semiconductor film, electronic device comprising thin film transistor, oxide sintered body and sputtering target 有权
公开(公告)号：US11251310B2
公开(公告)日：2022-02-15
申请号：US16485381
申请日：2018-02-15
申请人： IDEMITSU KOSAN CO., LTD.
发明人： Kazuyoshi Inoue , Masatoshi Shibata
IPC分类号： H01L21/363 , H01L29/78 , H01L29/80 , C23C14/08 , C23C14/34 , C04B35/01 , H01L29/786 , C04B35/626 , C04B35/64 , H01L21/02 , H01L29/24 , H01L29/66
摘要： An oxide semiconductor film contains In, Ga, and Sn at respective atomic ratios of 0.01≤Ga/(In+Ga+Sn)≤0.30 . . . (1), 0.01≤Sn/(In+Ga+Sn)≤0.40 . . . (2), and 0.55≤In/(In+Ga+Sn)≤0.98 . . . (3), and a rare-earth element X at an atomic ratio of 0.03≤X/(In+Ga+Sn+X)≤0.25 . . . (4).

2. 发明授权

US08154050B2 Semiconductor device with semiconductor epitaxial layers buried in source/drain regions, and fabrication method of the same 失效
标题翻译：半导体器件具有埋入源/漏区的半导体外延层及其制造方法
公开(公告)号：US08154050B2
公开(公告)日：2012-04-10
申请号：US12187567
申请日：2008-08-07
申请人： Gaku Sudo
发明人： Gaku Sudo
IPC分类号： H01L29/78 , H01L21/20 , H01L21/363
CPC分类号： H01L29/0847 , H01L29/165 , H01L29/665 , H01L29/6653 , H01L29/66636 , H01L29/7834 , H01L29/7848
摘要： A semiconductor device in which semiconductor epitaxial layers are embedded in the source/drain regions includes an element formation region formed in the major surface of a semiconductor substrate, a gate electrode formed on a part of the element formation region, the semiconductor epitaxial layers formed in the source/drain regions of the element formation region so as to sandwich the channel region below the gate electrode, and silicide layers formed on the gate electrode and semiconductor epitaxial layers. Each semiconductor epitaxial layer has a three-layered structure in which first semiconductor films different in material or composition from the semiconductor substrate sandwich a second semiconductor film having a silicidation reactivity higher than that of the first semiconductor films. Each silicide layer extends to the second semiconductor film along the interface between the semiconductor substrate and semiconductor epitaxial layer.
摘要翻译：其中半导体外延层嵌入在源极/漏极区域中的半导体器件包括形成在半导体衬底的主表面中的元件形成区域，形成在元件形成区域的一部分上的栅电极，形成在半导体外延层元件形成区域的源极/漏极区域以将栅极电极下方的沟道区域夹在中间，以及形成在栅电极和半导体外延层上的硅化物层。每个半导体外延层具有三层结构，其中与半导体衬底的材料或组成不同的第一半导体膜夹着具有高于第一半导体膜的硅化反应性的第二半导体膜。每个硅化物层沿着半导体衬底和半导体外延层之间的界面延伸到第二半导体膜。

3. 发明申请

US20120056176A1 SPUTTERING TARGET AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：溅射目标和制造半导体器件的方法
公开(公告)号：US20120056176A1
公开(公告)日：2012-03-08
申请号：US13221252
申请日：2011-08-30
申请人： Shunpei Yamazaki
发明人： Shunpei Yamazaki
IPC分类号： H01L29/227 , H01L21/363 , H01L29/24
CPC分类号： C23C14/3414 , C23C14/081 , C23C14/086 , H01L21/02565 , H01L21/02631 , H01L29/66742 , H01L29/66969 , H01L29/7869
摘要： An object is to provide a deposition technique for depositing an oxide semiconductor film. Another object is to provide a method for manufacturing a highly reliable semiconductor element using the oxide semiconductor film. A novel sputtering target obtained by removing an alkali metal, an alkaline earth metal, and hydrogen that are impurities in a sputtering target used for deposition is used, whereby an oxide semiconductor film containing a small amount of those impurities can be deposited.
摘要翻译：目的在于提供一种用于沉积氧化物半导体膜的沉积技术。另一个目的是提供一种使用氧化物半导体膜制造高可靠性半导体元件的方法。使用通过除去用于沉积的溅射靶中杂质的碱金属，碱土金属和氢来获得的新的溅射靶，由此可以沉积含有少量这些杂质的氧化物半导体膜。

4. 发明申请

US20120032163A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120032163A1
公开(公告)日：2012-02-09
申请号：US13193771
申请日：2011-07-29
申请人： Shunpei YAMAZAKI
发明人： Shunpei YAMAZAKI
IPC分类号： H01L29/786 , H01L21/363
CPC分类号： H01L29/7869 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L29/78603 , H01L29/78618
摘要： The electric characteristics of a semiconductor device including an oxide semiconductor change by irradiation with visible light or ultraviolet light. In view of the above problem, one object is to provide a semiconductor device including an oxide semiconductor film, which has stable electric characteristics and high reliability. Over an oxide insulating layer, a first oxide semiconductor layer is formed to a thickness greater than or equal to 1 nm and less than or equal to 10 nm and crystallized by heat treatment, so that a first crystalline oxide semiconductor layer is formed. A second crystalline oxide semiconductor layer with a greater thickness than the first crystalline oxide semiconductor layer is formed thereover.
摘要翻译：包括氧化物半导体的半导体器件的电特性通过用可见光或紫外光的照射而改变。鉴于上述问题，一个目的是提供一种具有稳定的电特性和高可靠性的氧化物半导体膜的半导体器件。在氧化物绝缘层之上，形成厚度大于或等于1nm且小于或等于10nm的第一氧化物半导体层，并通过热处理结晶，从而形成第一结晶氧化物半导体层。在其上形成厚度大于第一结晶氧化物半导体层的第二结晶氧化物半导体层。

5. 发明授权

US07670432B2 Exhaust system for a vacuum processing system 失效
标题翻译：真空处理系统排气系统
公开(公告)号：US07670432B2
公开(公告)日：2010-03-02
申请号：US11369754
申请日：2006-03-08
申请人： Yicheng Li
发明人： Yicheng Li
IPC分类号： C23C16/505 , H01L21/363
CPC分类号： C23C16/4412
摘要： A method, computer readable medium, and system for treating a substrate in a process space of a vacuum processing system is described. A vacuum pump in fluid communication with the vacuum processing system and configured to evacuate the process space, while a process material supply system is pneumatically coupled to the vacuum processing system and configured to supply a process gas to the process space. Additionally, the vacuum pump is pneumatically coupled to the process supply system and configured to, at times, evacuate the process gas supply system.
摘要翻译：描述了一种在真空处理系统的处理空间中处理基板的方法，计算机可读介质和系统。真空泵与真空处理系统流体连通并且构造成抽空处理空间，同时过程材料供应系统气动地耦合到真空处理系统并且被配置为将处理气体供应到处理空间。此外，真空泵气动地联接到过程供应系统并且构造成有时抽真空处理气体供应系统。

6. 发明申请

US20090217973A1 Nanocrystal Solar Cells Processed From Solution 有权
标题翻译：从溶液中加工的纳米晶体太阳能电池
公开(公告)号：US20090217973A1
公开(公告)日：2009-09-03
申请号：US12083723
申请日：2006-10-20
申请人： Paul A. Alivisatos , Ilan Gur , Delia Milliron
发明人： Paul A. Alivisatos , Ilan Gur , Delia Milliron
IPC分类号： H01L31/00 , H01L21/363
CPC分类号： H01L31/0352 , B82Y20/00 , B82Y30/00 , H01L31/022425 , Y02E10/50
摘要： A photovoltaic device having a first electrode layer, a high resistivity transparent film disposed on the first electrode, a second electrode layer, and an inorganic photoactive layer disposed between the first and second electrode layers, wherein the inorganic photoactive layer is disposed in at least partial electrical contact with the high resistivity transparent film, and in at least partial electrical contact with the second electrode. The photoactive layer has a first inorganic material and a second inorganic material different from the first inorganic material, wherein the first and second inorganic materials exhibit a type II band offset energy profile, and wherein the photoactive layer has a first population of nanostructures of a first inorganic material and a second population of nanostructures of a second inorganic material.
摘要翻译：一种具有第一电极层，设置在第一电极上的高电阻率透明膜，第二电极层和设置在第一和第二电极层之间的无机光活性层的光伏器件，其中无机光敏层至少部分地与高电阻率透明膜电接触，并与第二电极至少部分电接触。光活性层具有与第一无机材料不同的第一无机材料和第二无机材料，其中第一和第二无机材料表现出II型带偏移能量分布，并且其中光活性层具有第一种纳米结构的第一种无机材料和第二无机材料的第二组纳米结构体。

7. 发明申请

US20080206923A1 Oxide semiconductor target, method of forming the same, method of forming oxide semiconductor layer using the same and method of manufacturing semiconductor device using the same 有权
标题翻译：氧化物半导体靶，其形成方法，使用其形成氧化物半导体层的方法以及使用其制造半导体器件的方法
公开(公告)号：US20080206923A1
公开(公告)日：2008-08-28
申请号：US12071097
申请日：2008-02-15
申请人： Chang-jung Kim , Je-hun Lee
发明人： Chang-jung Kim , Je-hun Lee
IPC分类号： H01L21/363 , C22C29/12 , B22F3/14
CPC分类号： C23C14/0036 , C23C14/086 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L29/7869
摘要： Provided are a method of forming an oxide semiconductor layer and a method of manufacturing a semiconductor device using the method of forming an oxide semiconductor layer. The method may include mounting an oxide semiconductor target in a chamber; loading a substrate into the chamber; vacuuming the chamber; applying a direct current power to the oxide semiconductor target while injecting oxygen and a sputtering gas into the chamber; and forming an oxide semiconductor layer on a surface of the substrate by applying plasma of the sputtering gas onto the oxide semiconductor target. Here, the oxide semiconductor target may have a resistance of 1 kΩ or less. The oxide semiconductor target may have a composition of x(first oxide).y(second oxide).z(third oxide) where x, y and z are molar ratios. Each of the first through third oxides may be one of Ga2O3, HfO2, In2O3, and ZnO but different from each other. The oxide semiconductor target may be one of Ga2O3, HfO2, In2O3, and ZnO.
摘要翻译：提供一种形成氧化物半导体层的方法和使用形成氧化物半导体层的方法制造半导体器件的方法。该方法可以包括将氧化物半导体靶安装在腔室中; 将基板装载到所述室中; 抽真空室; 在氧气和溅射气体注入室内的同时对氧化物半导体靶施加直流电力; 以及通过将所述溅射气体的等离子体施加到所述氧化物半导体靶上而在所述衬底的表面上形成氧化物半导体层。这里，氧化物半导体靶可以具有1kΩ以下的电阻。氧化物半导体靶可以具有x（第一氧化物）.y（第二氧化物）.z（第三氧化物）的组成，其中x，y和z是摩尔比。第一至第三氧化物中的每一个可以是Ga 2 O 3，HfO 2，H 2 O 2， 3和ZnO，但彼此不同。氧化物半导体靶可以是Ga 2 O 3，HfO 2，Hf 2 O 3，HfO 2 O 3， 3和ZnO。

8. 发明申请

US20050285119A1 Dynamic p-n junction growth 有权
标题翻译：动态p-n结生长
公开(公告)号：US20050285119A1
公开(公告)日：2005-12-29
申请号：US11165847
申请日：2005-06-17
申请人： Robert Burgener , Roger Felix , Gary Renlund
发明人： Robert Burgener , Roger Felix , Gary Renlund
IPC分类号： C01G9/02 , H01L21/00 , H01L21/28 , H01L21/31 , H01L21/3115 , H01L21/316 , H01L21/363 , H01L21/365 , H01L21/469 , H01L23/58 , H01L27/15 , H01L29/225 , H01L29/26 , H01L31/0296 , H01L31/0328 , H01L31/12 , H01L33/28 , H01S5/30 , H01S5/327 , H01S5/347 , H01L33/00
CPC分类号： H01L21/02551 , B82Y20/00 , C01G9/02 , C01P2006/40 , C30B25/02 , C30B29/16 , C30B29/48 , H01L21/02554 , H01L21/02565 , H01L21/02568 , H01L21/02579 , H01L21/3115 , H01L21/316 , H01L23/5329 , H01L29/225 , H01L31/02963 , H01L33/025 , H01L33/28 , H01L33/285 , H01L2924/0002 , H01S5/305 , H01S5/3054 , H01S5/327 , H01S5/347 , H01L2924/00
摘要： Methods of fabricating semiconductor p-n junctions and semiconductor devices containing p-n junctions are disclosed in which the p-n junctions contain concentration profiles for the p-type and n-type dopants that are controllable and independent of a dopant diffusion profile. The p-n junction is disposed between a layer of semiconductor doped with a p-type dopant and a layer of semiconductor doped with an n-type dopant. The p-n junction is fabricated using a crystal growth process that allows dynamic control and variation of both p-type and n-type dopant concentrations during the crystal growth process.
摘要翻译：公开了制造半导体p-n结的方法和包含p-n结的半导体器件的方法，其中p-n结含有可控制且与掺杂剂扩散分布无关的p型和n型掺杂剂的浓度分布。 p-n结设置在掺杂有p型掺杂剂的半导体层和掺杂有n型掺杂剂的半导体层之间。使用晶体生长工艺制造p-n结，其允许在晶体生长过程期间动态控制和p型和n型掺杂剂浓度的变化。

9. 发明授权

US06838127B2 Method and apparatus for forming an HSG-Si layer on a wafer 有权
标题翻译：在晶片上形成HSG-Si层的方法和装置
公开(公告)号：US06838127B2
公开(公告)日：2005-01-04
申请号：US10107062
申请日：2002-03-28
申请人： Jong Young Yun
发明人： Jong Young Yun
IPC分类号： C23C16/24 , C23C16/56 , H01L21/00 , H01L21/205 , H01L21/363 , H01L21/8242 , H01L27/108 , C23C16/46 , C23C16/505
CPC分类号： C23C16/56 , C23C16/24 , H01J37/32522 , H01J2237/2001 , H01L21/67017 , H01L21/67103
摘要： An HSG-Si layer is formed on a wafer under a uniform temperature condition. An apparatus for forming the HSG-Si layer includes a housing forming a process chamber, a first heater on which the wafer is positioned fixed in place at the bottom of the process chamber, a second heater at the top of the process chamber, and a thermal insulator which prevents the heat generated by the first heater from being transferred to the outside of the process chamber. A temperature control system regulates the temperature of the heaters. A method of forming the HSG layer includes steps of placing the wafer on the first heater, using the heaters to remove moisture from the wafer, injecting a source gas of the HSG-Si toward the upper surface of the wafer to form amorphous silicon on the wafer, and annealing the wafer for a predetermined period of time to transform the amorphous silicon into an HSG-Si layer. During the steps of forming the HSG-Si layer, the temperatures of the first and second heaters are regulated to maintain the surface temperature of the wafer constant.

10. 发明授权

US6036772A Method for making semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US6036772A
公开(公告)日：2000-03-14
申请号：US999446
申请日：1997-12-29
申请人： Tomonori Hino , Satoshi Taniguchi , Satoshi Ito
发明人： Tomonori Hino , Satoshi Taniguchi , Satoshi Ito
IPC分类号： H01L21/363 , C30B25/18
CPC分类号： H01L21/02395 , H01L21/02463 , H01L21/02474 , H01L21/02477 , H01L21/02502 , H01L21/02557 , H01L21/0256 , H01L21/02576 , H01L21/02579 , H01L21/02631 , Y10S438/925 , Y10S438/944
摘要： A method for making a semiconductor device comprises: depositing at least one Group II-VI compound semiconductor layer comprising at least one Group II element selected from the group consisting of zinc, magnesium, manganese, beryllium, cadmium and mercury and at least one Group VI element selected from the group consisting of oxygen, sulfur, selenium and tellurium onto a Group III-V compound semiconductor layer comprising at least one Group III element selected from the group consisting of gallium, aluminum, boron and indium and at least one Group V element selected from the group consisting of nitrogen, phosphorus, arsenic, antimony and bismuth; whereinbefore depositing the Group II-VI compound semiconductor layer, a particle beam composed of at least one Group II element selected from the group consisting of zinc, magnesium, beryllium, cadmium and mercury is radiated onto the Group III-V compound semiconductor layer in a dose of 8.times.10.sup.-4 Torr.multidot.sec or more.
摘要翻译：一种制造半导体器件的方法包括：沉积至少一种包含至少一种选自锌，镁，锰，铍，镉和汞的II族元素的II-VI族化合物半导体层和至少一种VI族选自氧，硫，硒和碲的元素至III-V族化合物半导体层，该III-V族化合物半导体层包含至少一种选自镓，铝，硼和铟的III族元素和至少一种V族元素选自氮，磷，砷，锑和铋; 其中在沉积II-VI族化合物半导体层之前，将由选自锌，镁，铍，镉和汞的至少一种II族元素组成的粒子束辐射到III-V族化合物半导体层上剂量为8x10-4 Torrxsec或更高。

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