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1. 发明申请

US20230036404A1 SYSTEM AND METHOD FOR FACILITATING DYNAMIC TRIGGERED OPERATION MANAGEMENT IN A NETWORK INTERFACE CONTROLLER (NIC) 有权
公开(公告)号：US20230036404A1
公开(公告)日：2023-02-02
申请号：US17387334
申请日：2021-07-28
申请人： Hewlett Packard Enterprise Development LP
发明人： Keith D. Underwood , Duncan Roweth , Robert L. Alverson
IPC分类号： H04L12/879 , H04L12/863
摘要： A system for facilitating efficient command management in a network interface controller (NIC) is provided. During operation, the system can determine, at the NIC, a trigger condition and a location in a command queue for a set of commands corresponding to the trigger condition. The command queue can be external to the NIC. The location can correspond to an end of the set of commands in the command queue. The system can then determine, at the NIC, whether the trigger condition has been satisfied. If the trigger condition is satisfied, the system can fetch a respective command of the set of commands from the command queue and issuing the command from the NIC until the location is reached, thereby bypassing locally storing the set of commands prior to the trigger condition being satisfied.

2. 发明授权

US11210148B2 Reception according to a data transfer protocol of data directed to any of a plurality of destination entities 有权
公开(公告)号：US11210148B2
公开(公告)日：2021-12-28
申请号：US16600314
申请日：2019-10-11
申请人： Xilinx, Inc.
发明人： Steven Leslie Pope , Derek Edward Roberts , David James Riddoch , Greg Law , Steve Grantham , Matthew Slattery
IPC分类号： G06F9/54 , G06F13/00 , H04L12/861 , H04L29/06 , H04L29/08 , G06F15/16 , H04L12/879 , G06F9/30 , G06F13/14
摘要： A data processing system arranged for receiving over a network, according to a data transfer protocol, data directed to any of a plurality of destination identities, the data processing system comprising: data storage for storing data received over the network; and a first processing arrangement for performing processing in accordance with the data transfer protocol on received data in the data storage, for making the received data available to respective destination identities; and a response former arranged for: receiving a message requesting a response indicating the availability of received data to each of a group of destination identities; and forming such a response; wherein the system is arranged to, in dependence on receiving the said message.

3. 发明申请

US20210400124A1 Payload cache 有权
公开(公告)号：US20210400124A1
公开(公告)日：2021-12-23
申请号：US16908776
申请日：2020-06-23
申请人： MELLANOX TECHNOLOGIES, LTD.
发明人： Ilan Pardo , Mark B. Rosenbluth , Idan Burstein , Rui Xu , Oded Lempel , Tsofia Eshel
IPC分类号： H04L29/06 , G06F12/0875 , G06F13/40 , H04L29/08 , H04L12/879
摘要： In one embodiment, a computer system includes a payload sub-system including interfaces to connect with respective devices, transfer data with the respective devices, and receive write transactions from the respective devices, a classifier to classify the received write transactions into payload data and control data, and a payload cache to store the classified payload data, and a processing unit (PU) sub-system including a local PU cache to store the classified control data, wherein the payload cache and the local PU cache are different physical caches in respective different physical locations in the computer system, and processing core circuitry configured to execute software program instructions to perform control and packet processing responsively to the control data stored in the local PU cache.

4. 发明授权

US11188399B2 Determining whether to suppress an interrupt indicating completion of processing of a frame based on priority of the frame and current value information 有权
公开(公告)号：US11188399B2
公开(公告)日：2021-11-30
申请号：US15911337
申请日：2018-03-05
申请人： Kabushiki Kaisha Toshiba
发明人： Takahiro Yamaura
IPC分类号： G06F9/54 , G06F9/455 , H04L12/851 , H04L12/841 , H04L12/875 , G06F13/00 , H04L12/879
摘要： According to an embodiment, a notification control device includes a memory and one or more hardware processors configured to function as a determination unit and a notification unit. The determination unit is configured to determine, using notification control information set according to a priority of a frame, whether to notify of completion notification indicating completion of processing of the frame. The notification unit is configured to notify the completion notification when it is determined to notify of the completion notification.

5. 发明申请

US20210334182A1 NETWORK STORAGE FAILOVER SYSTEMS AND ASSOCIATED METHODS 有权
公开(公告)号：US20210334182A1
公开(公告)日：2021-10-28
申请号：US16855853
申请日：2020-04-22
申请人： NETAPP, INC.
发明人： Szu-Wen Kuo , Parag Sarfare , Ananthan Subramanian , Asif Imtiyaz Pathan , Santhosh Selvaraj , Nikhil Mattankot
IPC分类号： G06F11/20 , H04L29/08 , H04L12/24 , H04L12/879
摘要： Failover methods and systems for a networked storage environment are provided. A metadata data structure is generated, before starting a replay of entries at a log stored in a non-volatile memory of a second storage node, during a failover operation initiated in response to a failure at a first storage node. The second storage node operates as a partner node of the first storage node, and the metadata structure stores a metadata attribute of each log entry. Furthermore, the metadata attribute of each log entry is persistently stored. The persistently stored metadata attribute is used to respond to a read request received during the replay by the second storage node, while a write request metadata attribute of a write request is used for executing the write request received by the second storage node during the replay.

6. 发明申请

US20210328945A1 CONFIGURABLE RECEIVE BUFFER SIZE 有权
公开(公告)号：US20210328945A1
公开(公告)日：2021-10-21
申请号：US17359542
申请日：2021-06-26
申请人： Intel Corporation
发明人： Noam ELATI , Boris KLEIMAN , Piotr UMINSKI
IPC分类号： H04L12/861 , H04L12/879
摘要： Examples described herein relate to a network interface device comprising circuitry to: allocate a first number of buffers to store received packets associated with a first descriptor ring; allocate a second number of buffers to store received packets associated with a second descriptor ring; and based on receipt of a packet, copy the received packet into a number of buffers based on whether the received packet is associated with the first descriptor ring or the second descriptor ring. In some examples, the circuitry is to copy the received packet starting at an offset from a start of a starting buffer in a number of buffers, wherein the offset is based on whether the received packet is associated with the first descriptor ring or the second descriptor ring and wherein the number of buffers is based on whether the received packet is associated with the first descriptor ring or the second descriptor ring.

7. 发明申请

US20210303187A1 RESOURCE SHARING IN A TELECOMMUNICATIONS ENVIRONMENT 有权
公开(公告)号：US20210303187A1
公开(公告)日：2021-09-30
申请号：US17236228
申请日：2021-04-21
申请人： TQ DELTA, LLC
发明人： Marcos C. Tzannes , Michael Lund
IPC分类号： G06F3/06 , H04L1/18 , H04L12/54 , H04L12/701 , H04L12/721 , H04L12/801 , H04L1/00 , H04L27/26 , H04L12/861 , H04L12/879 , H04B1/38 , G06F13/16
摘要： A transceiver is designed to share memory and processing power amongst a plurality of transmitter and/or receiver latency paths, in a communications transceiver that carries or supports multiple applications. For example, the transmitter and/or receiver latency paths of the transceiver can share an interleaver/deinterleaver memory. This allocation can be done based on the data rate, latency, BER, impulse noise protection requirements of the application, data or information being transported over each latency path, or in general any parameter associated with the communications system.

8. 发明授权

US11134032B1 Augmenting data plane functionality with field programmable integrated circuits 有权
公开(公告)号：US11134032B1
公开(公告)日：2021-09-28
申请号：US16540750
申请日：2019-08-14
申请人： Barefoot Networks, Inc.
发明人： Antonin Mathieu Bas , Anurag Agrawal , Changhoon Kim
IPC分类号： H04L12/879
摘要： Some embodiments use one or more FPGAs and external memories associated with the FPGAs to implement large, hash-addressable tables for a data plane circuit. These embodiments configure at least one message processing stage of the DP circuit to store (1) a first plurality of records for matching with a set of data messages received by the DP circuit, and (2) a redirection record redirecting data messages that do not match the first plurality of records to a DP egress port associated with the memory circuit. These embodiments configure an external memory circuit to store a larger, second set of records for matching with redirected data messages received through the DP egress port associated with the memory circuit. This external memory circuit is a hash-addressable memory in some embodiments. To determine whether a redirected data message matches a record in the second set of record, the method of some embodiments configures an FPGA associated with the hash-addressable external memory to use a collision free hash process to generate a collision-free, hash address value from a set of attributes of the data message. This hash address value specifies an address in the external memory for the record in the second set of records to compare with the redirected data message.

9. 发明申请

US20210281527A1 LINE MONITOR DEVICE AND NETWORK SWITCH 有权
公开(公告)号：US20210281527A1
公开(公告)日：2021-09-09
申请号：US17329708
申请日：2021-05-25
申请人： DENSO CORPORATION
发明人： Shota MIZOGUCHI , Takahiro SASAKI
IPC分类号： H04L12/879 , H04L12/939
摘要： A network switch includes a plurality of ports each connected to a network or a terminal. The network switch performs routing between the plurality of ports. A control device is apart from the network switch. The control device controls the network switch. The network switch includes a command storage unit. The command storage unit stores a plurality of commands acquired from the control device for physical devices.

10. 发明申请

US20210243123A1 METHOD AND SYSTEM FOR HANDLING OF DATA PACKET/FRAMES USING AN ADAPTED BLOOM FILTER 有权
公开(公告)号：US20210243123A1
公开(公告)日：2021-08-05
申请号：US16995915
申请日：2020-08-18
申请人： OVH
发明人： Clement ROUSSEAU , Tristan GROLEAT
IPC分类号： H04L12/743 , H04L12/879 , H04L12/26
摘要： A method and system are disclosed for handling a received content word in a system comprising a memory of memory words, wherein: each memory word comprises Bloom Filter structures. The method comprises hashing the content word into a fixed-size word, pointing to the memory word corresponding to an address of the fixed-size word, pointing to, and reading, the Bloom Filter structure in the pointed memory word corresponding to an address in the fixed-size word, and reading and writing the content of the Bloom Filter structures so as to keep track of a number of occurrences of the received content word over a sliding window of time.

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