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1. 发明申请

US20230140265A1 NMR RELAXATION TIME INVERSION METHOD BASED ON UNSUPERVISED NEURAL NETWORK 有权
公开(公告)号：US20230140265A1
公开(公告)日：2023-05-04
申请号：US17945120
申请日：2022-09-15
申请人： INNOVATION ACADEMY FOR PRECISION MEASUREMENT SCIENCE AND TECHNOLOGY, CAS
发明人： Li CHEN , Sheng SHEN , Junfei CHEN , Fang CHEN , Chaoyang LIU
IPC分类号： G01R33/46 , G06N3/04 , G06N3/08
摘要： An NMR relaxation time inversion method based on an unsupervised neural network includes simulating inversion kernel matrix, simulating continuous NMR relaxation time spectrum, simulating noise, calculating NMR relaxation signals as samples, various samples forming a sample set, constructing an unsupervised neural network model, and defining a loss function of the unsupervised neural network model; and taking the samples in the training sample set as an input of the unsupervised neural network model, to obtain an optimal mapping relationship between the NMR relaxation signals and the NMR relaxation time spectrum with a minimum loss function. The present invention provides the possibility of using experimental data as the sample for training since the trading sample does not need to be labeled, can automatically learn the optimal regularization parameters without depending on the initial value and manual experience, and predicts fast.

2. 发明申请

US20230140131A1 DUAL-DETECTOR REAL-TIME SPECTRUM ANALYZER 有权
公开(公告)号：US20230140131A1
公开(公告)日：2023-05-04
申请号：US17878231
申请日：2022-08-01
申请人： Keysight Technologies, Inc.
发明人： Matthew S. Holcomb , Paul Holcomb , Connor P. McKay
IPC分类号： G01R23/16 , G01R13/02 , H03M1/12
摘要： A real-time spectrum analyzer (RSTA) includes an analog-to-digital converter (ADC) configured to convert in an input analog signal into a digital input data stream, a fast Fourier transform (FFT) unit configured to generate FFTs of the digital input data stream for successive time slices of the input analog signal, wherein the FFTs of each time slice are grouped into FFT bins, each FFT bin including the FFTs of a given frequency band, a first detector configured to reduce a number of FFTs per bin generated by the FFT unit and output a corresponding thinned FFT data stream for each of the successive time slices, a second detector configured to compress the thinned FFT data stream output by the first detector and output a compressed FFT data stream for each of the successive time slices, an FFT plotter configured to generate first display data representing an FFT plot of a given time slice of the input analog signal from the thinned FFT data stream output by the first detector, and a spectrogram plotter configured to generate second display data of a spectrogram of the given time slice and previous time slices of the input analog signal from the compressed FFT data stream output by the second detector.

3. 发明申请

US20230138651A1 INTEGRATED TEST CIRCUIT, TEST ASSEMBLY AND METHOD FOR TESTING AN INTEGRATED CIRCUIT 有权
公开(公告)号：US20230138651A1
公开(公告)日：2023-05-04
申请号：US17947495
申请日：2022-09-19
申请人： Infineon Technologies AG
发明人： Tobias Kilian , Martin Huch , Heiko Ahrens , Daniel Tille
IPC分类号： G01R31/3185 , H03K3/03
摘要： An integrated circuit includes a ring oscillator circuit and a plurality of logic paths. Each logic path comprises a path input connection, a path output connection and an input multiplexer, which has an output connection that is connected to the path input connection of the logic path. Each logic path, beginning with a first logic path, is assigned a respective subsequent logic path by virtue of the path output connection of the logic path being connected to a data input connection of the input multiplexer of the subsequent logic path. A last logic path of the logic paths is assigned the first logic path as subsequent logic path. For each logic path, the multiplexer is configured such that, when a control signal that indicates a test mode is fed thereto, it connects the data input connection of the input multiplexer to the path input connection of the logic path.

4. 发明申请

US20230138465A1 BATTERY VALVE AND BATTERY INCLUDING THE SAME 有权
公开(公告)号：US20230138465A1
公开(公告)日：2023-05-04
申请号：US17911530
申请日：2021-07-13
申请人： LG ENERGY SOLUTION, LTD.
发明人： Hun Hee LIM , Hyung Kyun YU , Sang Hun KIM , Min Hyeong KANG
IPC分类号： H01M50/317 , H01M10/48 , H01M10/42 , G01R31/36
摘要： Discussed is a battery valve configured to discharge a gas inside a battery to the outside, the battery valve including a communicator configured to receive a battery valve opening/closing command from an external device; and an opening/closing controller configured to open or close a passage through which the inside of the battery and the outside of the battery communicate with each other according to the battery valve opening/closing command.

5. 发明申请

US20230138341A1 INSPECTION JIG AND INSPECTION DEVICE 有权
公开(公告)号：US20230138341A1
公开(公告)日：2023-05-04
申请号：US17917950
申请日：2021-04-19
申请人： NIDEC READ CORPORATION
发明人： Kohei TSUMURA , Hidekazu YAMAZAKI
IPC分类号： G01R1/067
摘要： An inspection jig includes a rod-shaped probe, a first support portion that supports one end portion side of the probe, a second support portion that supports the other end portion side of the probe, and a separation holding member that holds the first support portion and the second support portion to be separated from each other. The first support portion includes a support plate in which a through hole through which the probe is inserted is formed. A reinforcing plate having bending strength stronger than that of the support plate is disposed on a surface of the support plate facing the second support portion.

6. 发明申请

US20230138247A1 Method of Identifying Vulnerable Regions in an Integrated Circuit 有权
公开(公告)号：US20230138247A1
公开(公告)日：2023-05-04
申请号：US17907688
申请日：2021-03-23
申请人： Battelle Memorial Institute
发明人： Adam Gakuto KIMURA , Jeremy BELLAY , Thomas KENT
IPC分类号： G01R31/28 , G06N3/0455
摘要： A method of designing a robust integrated circuit that is not vulnerable to optical fault injection comprises training a variational autoencoder to identify regions in a target integrated circuit that are vulnerable to optical fault injection and altering the design of the target integrated circuit by altering the design of the vulnerable regions so that the target integrated circuit is no longer vulnerable to optical fault injection, thereby forming the robust integrated circuit.

7. 发明申请

US20230136775A1 METHODS AND SYSTEMS FOR AN ELECTRIC CHARGING AND METERING DEVICE 有权
公开(公告)号：US20230136775A1
公开(公告)日：2023-05-04
申请号：US17515502
申请日：2021-10-31
申请人： BETA AIR, LLC
发明人： Herman Wiegman
IPC分类号： H02J7/00 , G01R21/133 , B60L53/16 , B60L53/66 , B60L53/62 , B64F1/36
摘要： An electric charging and metering device, including a charging connector, the charging connector configured to connect a charger to an electric aircraft; a sensor; and a processor. The charging connector including a direct current pin and an alternating current pin. The sensor communicatively connected to the charging connector. Additionally, the sensor configured to: monitor the direct current pin and the alternating current pin; measure an energy datum, the energy datum relating to a property of the charger, the charging connector electrically connected to the charger; and transmit the energy datum to a processor. The processor configured to receive the energy datum and calculate an electricity usage of the charger.

8. 发明申请

US20230135981A1 CONNECTOR WITH OVERVOLTAGE PROTECTION AND METHODS OF USE FOR CHARGING AN ELECTRIC AIRCRAFT 有权
公开(公告)号：US20230135981A1
公开(公告)日：2023-05-04
申请号：US17732912
申请日：2022-04-29
申请人： BETA AIR, LLC
发明人： Herman Wiegman
IPC分类号： H01R13/66 , G01R31/66 , H02J7/00
摘要： A connector with overvoltage protection, and methods of use, for charging an electric aircraft. The connector includes a housing, at least a current conductor, a protection circuit, at least a sensor and a controller. The housing is configured to mate with an electric aircraft port of the electric aircraft. The at least a current conductor is configured to conduct a current. The protection circuit is configured to control transmission of electrical power through the connector. The at least a sensor is configured to detect an output voltage of the connector. The controller is communicatively connected to the at least a sensor. The controller is configured to determine an overvoltage output as a function of the output voltage, and activate the protection circuit based on detection of the overvoltage output.

9. 发明申请

US20230135977A1 PROGRAMMABLE MACRO TEST DESIGN FOR AN INTEGRATED CIRCUIT 有权
公开(公告)号：US20230135977A1
公开(公告)日：2023-05-04
申请号：US17513584
申请日：2021-10-28
申请人： Cypress Semiconductor Corporation
发明人： Senwen Kan
IPC分类号： G06F30/333 , G01R31/317
摘要： A system and method for using a programmable macro built-in self-test (BIST) to test an integrated circuit. The method includes receiving, by a built-in self-test (BIST) controller of an integrated circuit (IC) device from a testing equipment, a test vector of a first type for testing a first region of the IC device. The method includes identifying, based on the test vector of the first type, a first BIST engine of a plurality of BIST engines associated with the first region of the IC device. The method includes generating, based on the test vector of the first type, a first command of the second type. The method includes configuring, based on the first command of the second type, the first BIST engine of the plurality of BIST engines to cause the first BIST engine to perform a first set of tests on the first region of the IC device.

10. 发明申请

US20230135862A1 ELECTRONIC DEVICE AND CONTROLLING METHOD THEREOF 有权
公开(公告)号：US20230135862A1
公开(公告)日：2023-05-04
申请号：US18089176
申请日：2022-12-27
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Kyusik KIM , Hyeongmo GU , Jangwoo LEE
IPC分类号： G01R19/165
摘要： Provided is an electronic device and method for controlling the same, which controls an operation by detecting a voltage between a plurality of live terminals and thus determining whether there is an error in supplying power through a power input terminal. According to an embodiment, an electronic device includes a power input terminal including a plurality of live terminals and a neutral terminal; a voltage detection circuit connected between the plurality of live terminals for detecting a voltage between the plurality of live terminals; and a controller configured to control operation of the electronic device to be interrupted in response to a magnitude of the voltage between the plurality of live terminals smaller than a threshold.

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