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31. 发明申请

US20180261581A1 METHOD AND APPARATUS FOR DIRECT TRANSFER OF SEMICONDUCTOR DEVICE DIE FROM A MAPPED WAFER 审中-公开
公开(公告)号：US20180261581A1
公开(公告)日：2018-09-13
申请号：US15978093
申请日：2018-05-12
申请人： Rohinni, LLC
发明人： Andrew Huska , Cody Peterson , Clinton Adams , Sean Kupcow
IPC分类号： H01L25/075 , H01L21/677 , H01L21/48 , H01L21/687 , H01L33/62 , H01L23/00 , H01L21/67 , H01L21/66 , H01L23/544 , H01L21/683 , H01L21/68
CPC分类号： H01L25/0753 , G02F1/133603 , G02F1/133605 , G02F1/133606 , G02F2001/133612 , H01L21/4853 , H01L21/67132 , H01L21/67144 , H01L21/67196 , H01L21/67265 , H01L21/67715 , H01L21/67778 , H01L21/681 , H01L21/6836 , H01L21/68742 , H01L22/12 , H01L22/20 , H01L23/53242 , H01L23/544 , H01L24/75 , H01L24/81 , H01L24/83 , H01L24/89 , H01L33/62 , H01L2221/68322 , H01L2221/68327 , H01L2221/68354 , H01L2221/68363 , H01L2221/68381 , H01L2223/54413 , H01L2223/54426 , H01L2223/54433 , H01L2223/54486 , H01L2224/16238 , H01L2224/75252 , H01L2224/75261 , H01L2224/75262 , H01L2224/75303 , H01L2224/7531 , H01L2224/75314 , H01L2224/75651 , H01L2224/75753 , H01L2224/75824 , H01L2224/75842 , H01L2224/75843 , H01L2224/81191 , H01L2224/81205 , H01L2224/81224 , H01L2224/83224 , H01L2924/12041 , H01L2924/405 , H01L2933/0066 , H01L2924/00014
摘要： A system for performing a direct transfer of a plurality of semiconductor die from a first substrate to a second substrate based on map data of the location of the semiconductor die. A first conveyance mechanism conveys the first substrate. A second conveyance mechanism conveys the second substrate. A transfer mechanism is disposed adjacent to the first conveyance mechanism to effectuate the direct transfer. A controller causes one or more processors to perform operations including: determining positions of the plurality of semiconductor die based at least in part on map data, conveying at least one of the first substrate or the second substrate such that the first substrate, the second substrate, and the transfer mechanism are in a direct transfer position, and activating the transfer mechanism to perform the direct transfer of the plurality of semiconductor die.

32. 发明授权

US10043776B2 Micro device transfer system with pivot mount 有权
公开(公告)号：US10043776B2
公开(公告)日：2018-08-07
申请号：US15182272
申请日：2016-06-14
申请人： Apple Inc.
发明人： Dariusz Golda , John A. Higginson , Andreas Bibl
IPC分类号： B23P19/00 , H01L23/00 , H01L25/16 , H01L33/00
CPC分类号： H01L24/75 , H01L24/97 , H01L25/167 , H01L33/00 , H01L2224/75725 , H01L2224/75843 , H01L2224/7598 , H01L2924/12041 , H01L2924/12042 , H01L2924/1461 , H01L2924/351 , Y10T279/23 , H01L2924/00
摘要： A micro pick up array mount includes a pivot platform to allow a micro pick up array to automatically align with a carrier substrate. Deflection of the pivot platform may be detected to control further movement of the micro pick up array.

33. 发明申请

US20170256524A1 SEMICONDUCTOR DEVICE ON GLASS SUBSTRATE AND METHOD OF MAKING THE SAME 审中-公开
公开(公告)号：US20170256524A1
公开(公告)日：2017-09-07
申请号：US15600637
申请日：2017-05-19
申请人： Rohinni, LLC
发明人： Andrew Huska , Cody Peterson , Clinton Adams , Sean Kupcow
IPC分类号： H01L25/075 , H01L23/00 , H01L21/67 , H01L21/683 , H01L23/544 , H01L21/677 , H01L21/68 , H01L21/687 , H01L21/66 , H01L33/62 , H01L21/48
CPC分类号： H01L25/0753 , G02F1/133603 , G02F1/133605 , G02F1/133606 , G02F2001/133612 , H01L21/4853 , H01L21/67132 , H01L21/67144 , H01L21/67196 , H01L21/67265 , H01L21/67715 , H01L21/67778 , H01L21/681 , H01L21/6836 , H01L21/68742 , H01L22/12 , H01L22/20 , H01L23/53242 , H01L23/544 , H01L24/75 , H01L24/81 , H01L24/83 , H01L24/89 , H01L33/62 , H01L2221/68322 , H01L2221/68327 , H01L2221/68354 , H01L2221/68363 , H01L2221/68381 , H01L2223/54413 , H01L2223/54426 , H01L2223/54433 , H01L2223/54486 , H01L2224/16238 , H01L2224/75252 , H01L2224/75261 , H01L2224/75262 , H01L2224/75303 , H01L2224/7531 , H01L2224/75314 , H01L2224/75317 , H01L2224/75651 , H01L2224/75753 , H01L2224/75824 , H01L2224/75842 , H01L2224/75843 , H01L2224/81191 , H01L2224/81205 , H01L2224/81224 , H01L2224/83224 , H01L2924/12041 , H01L2924/405 , H01L2933/0066 , H01L2924/00014
摘要： A lighting component including a plurality of die transferred to the glass substrate. The transfer occurs by positioning the glass substrate to face a first surface of a die carrier carrying multiple die. A reciprocating transfer member thrusts against a second surface of the die carrier to actuate the transfer member thereby causing a localized deflection of the die carrier in a direction of the surface of the glass substrate to position an initial die proximate to the glass substrate. The initial die transfers directly to a circuit trace on the glass substrate. At least one of the die carrier or the transfer member is then shifted such that the transfer member aligns with a subsequent die on the first surface of the die carrier. The acts of actuating, transferring, and shifting are repeated to effectuate a transfer of the multiple die onto the glass substrate.

34. 发明授权

US09673166B2 Three-dimensional mounting method and three-dimensional mounting device 有权
公开(公告)号：US09673166B2
公开(公告)日：2017-06-06
申请号：US15038963
申请日：2014-11-19
申请人： TORAY ENGINEERING CO., LTD.
发明人： Koji Nishimura , Katsumi Terada , Mikio Kawakami
IPC分类号： H01L21/68 , H01L23/00 , H01L25/065 , H01L25/00
CPC分类号： H01L24/81 , H01L24/75 , H01L25/0657 , H01L25/50 , H01L2224/14181 , H01L2224/16145 , H01L2224/16227 , H01L2224/75252 , H01L2224/75753 , H01L2224/75843 , H01L2224/8113 , H01L2224/81132 , H01L2224/81193 , H01L2224/81203 , H01L2225/06513 , H01L2225/06517 , H01L2225/06565 , H01L2225/06593 , H01L2924/00014
摘要： A three-dimensional mounting method for successively laminating N number of upper-layer joining materials includes positioning a first upper-layer joining material relative to a lowermost-layer joining material by recognizing an alignment position of the lowermost-layer joining material and a lower face alignment position of the first upper-layer joining material by a two-field image recognition unit, storing positional coordinates of the alignment position of the lowermost-layer joining material, positioning an (n+1)-th upper-layer joining material relative to an n-th upper-layer joining material by recognizing an upper face alignment position of the n-th upper-layer joining material and a lower face alignment position of the (n+1)-th upper-layer joining material, storing positional coordinates of the upper face alignment position of the n-th upper-layer joining material, recognizing an upper face alignment position of the N-th uppermost-layer joining material, and storing positional coordinates of the upper face alignment position of the N-th uppermost-layer joining material.

35. 发明申请

US20170140959A1 Apparatus and Method for Direct Transfer of Semiconductor Devices 审中-公开
公开(公告)号：US20170140959A1
公开(公告)日：2017-05-18
申请号：US15418573
申请日：2017-01-27
申请人： Rohinni, LLC
发明人： Andrew Huska , Cody Peterson , Clinton Adams , Sean Kupcow
IPC分类号： H01L21/67 , H01L21/66 , H01L21/48 , H01L21/68 , H01L21/683
CPC分类号： H01L25/0753 , G02F1/133603 , G02F1/133605 , G02F1/133606 , G02F2001/133612 , H01L21/4853 , H01L21/67132 , H01L21/67144 , H01L21/67196 , H01L21/67265 , H01L21/67715 , H01L21/67778 , H01L21/681 , H01L21/6836 , H01L21/68742 , H01L22/12 , H01L22/20 , H01L23/53242 , H01L23/544 , H01L24/75 , H01L24/81 , H01L24/83 , H01L24/89 , H01L33/62 , H01L2221/68322 , H01L2221/68327 , H01L2221/68354 , H01L2221/68363 , H01L2221/68381 , H01L2223/54413 , H01L2223/54426 , H01L2223/54433 , H01L2223/54486 , H01L2224/16238 , H01L2224/75252 , H01L2224/75261 , H01L2224/75262 , H01L2224/75303 , H01L2224/7531 , H01L2224/75314 , H01L2224/75317 , H01L2224/75651 , H01L2224/75753 , H01L2224/75824 , H01L2224/75842 , H01L2224/75843 , H01L2224/81191 , H01L2224/81205 , H01L2224/81224 , H01L2224/83224 , H01L2924/12041 , H01L2924/405 , H01L2933/0066 , H01L2924/00014
摘要： An apparatus that directly transfers a semiconductor device die from a first substrate to a second substrate. The semiconductor device die is disposed on the first side of the first substrate. The apparatus includes a first frame to hold the first substrate, and a second frame to hold the second substrate adjacent to the first side of the first substrate. A needle is disposed adjacent to the first frame and extends in a direction toward the second side of the first substrate. A needle actuator is connected to the needle to move the needle, during a direct transfer process, to a die transfer position at which the needle contacts the second side of the first substrate to press the semiconductor device die into contact with the second substrate such that the semiconductor device die is released from the first substrate and is attached to the second substrate.

36. 发明授权

US09391042B2 Micro device transfer system with pivot mount 有权
标题翻译：带枢轴安装的微型设备传输系统
公开(公告)号：US09391042B2
公开(公告)日：2016-07-12
申请号：US13715557
申请日：2012-12-14
申请人： Luxvue Technology Corporation
发明人： Dariusz Golda , John A. Higginson , Andreas Bibl
IPC分类号： B23P19/00 , H01R43/042 , H01L23/00
CPC分类号： H01L24/75 , H01L24/97 , H01L25/167 , H01L33/00 , H01L2224/75725 , H01L2224/75843 , H01L2224/7598 , H01L2924/12041 , H01L2924/12042 , H01L2924/1461 , H01L2924/351 , Y10T279/23 , H01L2924/00
摘要： Systems and methods for transferring a micro device from a carrier substrate are disclosed. In an embodiment, a micro pick up array mount includes a pivot platform to allow a micro pick up array to automatically align with a carrier substrate. Deflection of the pivot platform may be detected to control further movement of the micro pick up array.
摘要翻译：公开了用于从载体衬底传送微器件的系统和方法。在一个实施例中，微拾取阵列安装件包括枢轴平台，以允许微拾取阵列自动对准载体衬底。可以检测枢轴平台的偏转以控制微拾取阵列的进一步移动。

37. 发明申请

US20150079763A1 SOLDER BUMP STRETCHING METHOD AND DEVICE FOR PERFORMING THE SAME 有权
标题翻译：焊膏压延方法及其执行装置
公开(公告)号：US20150079763A1
公开(公告)日：2015-03-19
申请号：US14554354
申请日：2014-11-26
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Su-Chun YANG , Yi-Li HSIAO , Chih-Hang TUNG , Chen-Hua YU
IPC分类号： H01L23/00 , H01L21/78
CPC分类号： H01L24/11 , B23K1/0016 , H01L21/78 , H01L24/13 , H01L24/16 , H01L24/742 , H01L24/75 , H01L24/81 , H01L24/94 , H01L24/97 , H01L25/0652 , H01L25/0655 , H01L25/0657 , H01L25/50 , H01L2224/1132 , H01L2224/11334 , H01L2224/1134 , H01L2224/1145 , H01L2224/11462 , H01L2224/1183 , H01L2224/1184 , H01L2224/11848 , H01L2224/13014 , H01L2224/131 , H01L2224/13111 , H01L2224/13139 , H01L2224/13147 , H01L2224/16057 , H01L2224/16058 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/16506 , H01L2224/16507 , H01L2224/75252 , H01L2224/75317 , H01L2224/75501 , H01L2224/75502 , H01L2224/75744 , H01L2224/75745 , H01L2224/75843 , H01L2224/7598 , H01L2224/81121 , H01L2224/81191 , H01L2224/81815 , H01L2224/8193 , H01L2224/94 , H01L2224/97 , H01L2225/06513 , H01L2924/00013 , H01L2924/01322 , H01L2924/12042 , H01L2224/81 , H01L2924/00
摘要： A wafer-level pulling method includes securing a top holder to a plurality of chips; and securing a bottom holder to a wafer, wherein the plurality of chips are bonded to the wafer by a plurality of solder bumps. The wafer-level pulling method further includes softening the plurality of solder bumps; and stretching the plurality of softened solder bumps.
摘要翻译：晶圆级牵引方法包括将顶部保持器固定到多个芯片; 以及将底部保持器固定到晶片上，其中所述多个芯片通过多个焊料凸块接合到所述晶片。晶片级牵引方法还包括软化多个焊料凸块; 并且拉伸多个软化的焊料凸块。

38. 发明专利

JPWO2015079991A1 ３次元実装方法および３次元実装装置审中-公开
公开(公告)号：JPWO2015079991A1
公开(公告)日：2017-03-16
申请号：JP2015550668
申请日：2014-11-19
申请人：東レエンジニアリング株式会社
发明人：幸治西村 , 幸治西村 , 寺田　勝美 , 勝美寺田 , 幹夫川上 , 幹夫川上
IPC分类号： H01L21/60 , H01L25/065 , H01L25/07 , H01L25/18
CPC分类号： H01L24/81 , H01L24/75 , H01L25/0657 , H01L25/50 , H01L2224/14181 , H01L2224/16145 , H01L2224/16227 , H01L2224/75252 , H01L2224/75753 , H01L2224/75843 , H01L2224/8113 , H01L2224/81132 , H01L2224/81193 , H01L2224/81203 , H01L2225/06513 , H01L2225/06517 , H01L2225/06565 , H01L2225/06593 , H01L2924/00014
摘要：電極を備えた基板上に、上下両面に電極を備えたN個のチップを、電極同士の位置を合わせた状態で順次積層する3次元実装方法において、前記基板上に第1のチップを積層する際に、前記基板のアライメント用位置と、第1のチップの下面に記された下面アライメント用位置を2視野画像認識手段によって認識して位置合わせを行うとともに、前記基板のアライメント用位置の位置座標を記憶し、1≦n≦N−1である第nのチップ上に、第n+1のチップを接合する際に、第nのチップの上面に記された上面アライメント用位置と、第n+1のチップの下面に記された下面アライメント用位置を前記2視野画像認識手段によって認識して位置合わせをを行うとともに、前記第nのチップの上面アライメント用位置を認識して位置座標を記憶し、第Nの最上層チップを積層した後に、前記第Nのチップの上面に記された上面アライメント用位置を認識して座標位置を記憶する。

39. 发明专利

JP2009010074A Electronic component mounting device and manufacturing method of electronic device 有权
标题翻译：电子元件安装设备及电子设备的制造方法
公开(公告)号：JP2009010074A
公开(公告)日：2009-01-15
申请号：JP2007168502
申请日：2007-06-27
申请人： Shinko Electric Ind Co Ltd , 新光電気工業株式会社
发明人： KURAMOCHI TOSHIYUKI
IPC分类号： H01L21/603
CPC分类号： H01L21/563 , H01L24/75 , H01L24/81 , H01L2224/131 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/75753 , H01L2224/75843 , H01L2224/831 , H01L2224/92125 , H01L2924/0001 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01082 , Y10T29/49149 , H01L2924/00 , H01L2924/014 , H01L2224/13099
摘要： PROBLEM TO BE SOLVED: To provide an electronic component mounting device capable of mounting an electronic component in a state wherein a mounting board is curved, and also charging an underfill resin just after the electronic component is heated and press-bonded to prevent a flip-chip connection portion from breaking or fracturing, and to provide a manufacturing method of the electronic device. SOLUTION: The electronic component mounting device includes a bonding head 11 which holds and crimps an electronic component 3 to the mounting board 2, a local stage 12 which is provided with a support surface formed to area nearly equal or a little wider than a mounting surface for the electronic component 3 and bears crimping force on the support surface from a non-mounting surface of the mounting board 2, a length measuring mechanism which measures the distance between the bonding head 11 and mounting board 2 to calculate a virtual plane at a predetermined mounting position on the mounting substrate 2, and a tilt moving mechanism which tilts and moves the bonding head 11 and local stage 12 to match a normal line of the virtual plane at the mounting position with the line of action of the crimping force, crimping being carried out along the normal. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种能够在安装板弯曲的状态下安装电子部件的电子部件安装装置，并且在电子部件被加热和加压粘合之后也对底部填充树脂进行充电以防止倒装芯片连接部分断裂或断裂，并提供电子设备的制造方法。电子部件安装装置包括将电子部件3保持并卷曲到安装基板2的接合头11，局部台12，其设置有形成为几乎等于或略宽于用于电子部件3的安装表面，并且从安装板2的非安装表面承载在支撑表面上的压接力;长度测量机构，其测量接合头11和安装板2之间的距离以计算虚拟平面在安装基板2上的预定安装位置处，以及倾斜移动机构，其使粘合头11和局部平台12倾斜并移动，以使安装位置处的虚拟平面的法线与卷曲力的作用线相匹配，沿着正常进行卷边。版权所有（C）2009，JPO＆INPIT

40. 发明公开

KR1020160090842A 3차원 실장 방법 및 3차원 실장 장치 审中-实审
标题翻译：三维安装方法和三维安装设备
公开(公告)号：KR1020160090842A
公开(公告)日：2016-08-01
申请号：KR1020167016542
申请日：2014-11-19
申请人： 토레이 엔지니어링 컴퍼니, 리미티드
发明人： 니시무라고지 , 데라다가츠미 , 가와카미미키오
IPC分类号： H01L25/00 , H01L23/00
CPC分类号： H01L24/81 , H01L24/75 , H01L25/0657 , H01L25/50 , H01L2224/14181 , H01L2224/16145 , H01L2224/16227 , H01L2224/75252 , H01L2224/75753 , H01L2224/75843 , H01L2224/8113 , H01L2224/81132 , H01L2224/81193 , H01L2224/81203 , H01L2225/06513 , H01L2225/06517 , H01L2225/06565 , H01L2225/06593 , H01L2924/00014
摘要： 전극을구비한기판상에, 상하양면에전극을구비한 N개의칩을, 전극끼리의위치를맞춘상태에서순차적층하는 3차원실장방법에있어서, 상기기판상에제1 칩을적층할때, 상기기판의얼라인먼트용위치와, 제1 칩의하면에표기된하면얼라인먼트용위치를 2시야화상인식수단에의해인식하여위치정렬을행함과함께, 상기기판의얼라인먼트용위치의위치좌표를기억하고, 1≤n≤N-1인제n 칩상에, 제n+1 칩을접합할때, 제n 칩의상면에표기된상면얼라인먼트용위치와, 제n+1 칩의하면에표기된하면얼라인먼트용위치를상기 2시야화상인식수단에의해인식하여위치정렬을행함과함께, 상기제n 칩의상면얼라인먼트용위치를인식하여위치좌표를기억하고, 제N 최상층칩을적층한후에, 상기제N 칩의상면에표기된상면얼라인먼트용위치를인식하여좌표위치를기억한다.
摘要翻译：用于连续层压N个上层接合材料的三维安装方法包括通过识别最下层接合材料的对准位置和相对于最下层接合材料的下表面定位第一上层接合材料相对于最下层接合材料通过双场图像识别单元对第一上层接合材料的对准位置，存储最下层接合材料的取向位置的位置坐标，定位第（n + 1）个上层接合材料相对于通过识别第n个上层接合材料的上表面对准位置和第（n + 1）个上层接合材料的下表面对准位置，第n个上层接合材料，存储位置坐标第n个上层接合材料的上表面对准位置，识别第N个最上层接合材料的上表面对准位置，并且存储位置第N个最上层接合材料的上表面对准位置的坐标。

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