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1. 发明申请

US20070120254A1 Semiconductor device comprising a pn-heterojunction 审中-公开
标题翻译：包括pn异质结的半导体器件
公开(公告)号：US20070120254A1
公开(公告)日：2007-05-31
申请号：US10584038
申请日：2004-12-20
申请人： Godefridus Hurkx , Prabhat Agarwal , Abraham Balkenende , Petrus Hubertus Magnee , Melanie Wagemans , Erik Petrus Antonius Bakkers , Erwin Hijzen
发明人： Godefridus Hurkx , Prabhat Agarwal , Abraham Balkenende , Petrus Hubertus Magnee , Melanie Wagemans , Erik Petrus Antonius Bakkers , Erwin Hijzen
IPC分类号： H01L23/48
CPC分类号： H01L29/8611 , B82Y10/00 , H01L29/045 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/2003 , H01L29/66136 , H01L29/66219 , H01L2924/0002 , H01L2924/00
摘要： An electric device is disclosed comprising a pn-heterojunction (4) formed by a nanowire (3) of 111-V semiconductor material and a semiconductor body (1) comprising a group IV semiconductor material. The nanowire (3) is positioned in direct contact with the surface (2) of the semiconductor body (1) and has a first conductivity type, the semiconductor body (1) has a second conductivity type opposite to the first conductivity type, the nanowire (3) forming with the semiconductor body (1) a pn-heterojunction (4). The nanowire of III-V semiconductor material can be used as a diffusion source (5) of dopant atoms into the semiconductor body. The diffused group III atoms and/or the group V atoms from the III-V material are the dopant atoms forming a region (6) in the semiconductor body in direct contact with the nanowire (3).
摘要翻译：公开了一种电子器件，其包括由111-V族半导体材料的纳米线（3）和包含IV族半导体材料的半导体本体（1）形成的pn异质结（4）。纳米线（3）与半导体本体（1）的表面（2）直接接触并且具有第一导电类型，半导体本体（1）具有与第一导电类型相反的第二导电类型，纳米线（3）与半导体本体（1）形成pn异质结（4）。 III-V族半导体材料的纳米线可以用作半导体本体中掺杂剂原子的扩散源（5）。来自III-V材料的扩散的III族原子和/或V族原子是在半导体本体中与纳米线（3）直接接触形成区域（6）的掺杂剂原子。

2. 发明申请

US20080029909A1 Nanowire Semiconductor Device 有权
标题翻译：纳米线半导体器件
公开(公告)号：US20080029909A1
公开(公告)日：2008-02-07
申请号：US11629657
申请日：2005-06-07
申请人： Erwin Hijzen , Erik Bakkers , Raymond Hueting , Abraham Balkenende
发明人： Erwin Hijzen , Erik Bakkers , Raymond Hueting , Abraham Balkenende
IPC分类号： H01L23/48 , H01L21/44
CPC分类号： H01L29/775 , B82Y10/00 , H01L21/0237 , H01L21/02458 , H01L21/02532 , H01L21/0254 , H01L21/02603 , H01L21/02639 , H01L21/02653 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/267 , H01L29/66666 , H01L29/78642 , H01L29/78681 , H01L29/78696 , H01L29/861 , H01L29/872 , H01L51/0048 , H01L51/0052 , H01L51/0512 , H01L2924/0002 , Y10S977/70 , Y10S977/701 , Y10S977/707 , Y10S977/72 , Y10S977/721 , Y10S977/722 , Y10S977/723 , Y10S977/742 , Y10S977/762 , Y10S977/938 , H01L2924/00
摘要： Semiconductor devices are fabricated using nanowires 16. A conductive gate 22 may be used to control conduction along the nanowires 16, in which case one of the contacts is a drain 12 and the other a source 18. The nanowires 16 may be grown in a trench or through-hole 8 in a substrate 2 or in particular in epilayer 3 on substrate 2. The gate 22 may be provided only at one end of the nanowires 16. The nanowires 16 can be of the same material along their length; alternatively different materials can be used, especially different materials adjacent to the gate 22 and between the gate 22 and the base of the trench.
摘要翻译：使用纳米线16制造半导体器件。可以使用导电栅极22来控制沿着纳米线16的导通，在这种情况下，一个触点是漏极12，另一个是源极18。纳米线16可以在衬底2中的沟槽或通孔8中生长，或特别是在衬底2上的外延层3中生长。栅极22可以仅设置在纳米线16的一端。纳米线16沿其长度可以是相同的材料; 可以使用不同的材料，特别是与栅极22相邻并且在栅极22和沟槽的基底之间的不同材料。

3. 发明授权

US07868424B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07868424B2
公开(公告)日：2011-01-11
申请号：US11658227
申请日：2005-07-07
申请人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Erwin Hijzen , Raymond Josephus Engelbart Hueting
发明人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Erwin Hijzen , Raymond Josephus Engelbart Hueting
IPC分类号： H01L21/02
CPC分类号： H01L29/0821 , B82Y10/00 , H01L29/06 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/08 , H01L29/423 , H01L29/42304 , H01L29/66242 , H01L29/737 , H01L29/7378
摘要： The invention relates to a semiconductor device (10) with a substrate (11) and a semiconductor body (12) comprising a vertical bipolar transistor with an emitter region, a base region and a collector region (1, 2, 3) of, respectively, a first conductivity type, a second conductivity type opposite to the first conductivity type and the first conductivity type, wherein the collector region (3) comprises a first sub-region (3A) bordering the base region (2) and a second sub-region (3B) bordering the first sub-region (3A) which has a lower doping concentration than the second sub-region (3B), and the transistor is provided with a gate electrode (5) which laterally borders the first sub-region (3A) and by means of which the first sub-region (3A) may be depleted. According to the invention the collector region (3) borders the surface of the semiconductor body (12), while the emitter region (1) is recessed in the semiconductor body (12), and the collector region (3) forms part of a mesa structure (6) formed at the surface of the semiconductor body (12). Such a device (10) has very favorable properties at high frequencies and high voltages and, moreover, is easy to manufacture. In a preferred embodiment the collector (3) comprises a nanowire (30) forming the mesa structure (6).
摘要翻译：本发明涉及一种具有衬底（11）和半导体本体（12）的半导体器件（10），该半导体器件包括分别具有发射极区，基极区和集电极区（1,2,3）的垂直双极晶体管，第一导电类型，与第一导电类型和第一导电类型相反的第二导电类型，其中集电极区域（3）包括与基极区域（2）接壤的第一子区域（3A）与第二子区域（3A）接合的第一子区域（3A）的区域（3B），其具有比第二子区域（3B）低的掺杂浓度，并且晶体管设置有与第一子区域横向相邻的栅电极（5） 3A），并且借助于此可以使第一子区域（3A）耗尽。根据本发明，集电极区域（3）与半导体本体（12）的表面相接触，而发射极区域（1）凹入半导体本体（12）中，并且集电极区域（3）形成台面的一部分结构（6）形成在半导体本体（12）的表面。这种装置（10）在高频和高电压下具有非常有利的特性，而且易于制造。在优选实施例中，收集器（3）包括形成台面结构（6）的纳米线（30）。

4. 发明申请

US20090200641A1 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20090200641A1
公开(公告)日：2009-08-13
申请号：US11658228
申请日：2005-07-07
申请人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Abraham Rudolf Balkenende , Petrus Hubertus Cornelis Magnee , Melanie Maria Hubertina Wagemans , Erik Petrus Antonius Maria Bakkers , Erwin Hijzen
发明人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Abraham Rudolf Balkenende , Petrus Hubertus Cornelis Magnee , Melanie Maria Hubertina Wagemans , Erik Petrus Antonius Maria Bakkers , Erwin Hijzen
IPC分类号： H01L29/73 , H01L21/331
CPC分类号： H01L29/0804 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/0821 , H01L29/7378 , Y10S977/936
摘要： The invention relates to a semiconductor device (10) with a semiconductor body (12) comprising a bipolar transistor with an emitter region, a base region and a collector region (1, 2, 3) of, respectively, a first conductivity type, a second conductivity type opposite to the first conductivity type, and the first conductivity type. One of the emitter or collector regions (1, 3) comprises a nanowire (30). The base region (2) has been formed from a layer (20) at the surface of the semiconductor body (12); the other one (3, 1) of the emitter or collector regions (1, 3) has been formed in the semiconductor body (12) below the base region (2). The emitter or collector region (1, 3) comprising the nanowire (30) has been provided on the surface of the semiconductor body (12) such that its longitudinal axis extends perpendicularly to the surface.
摘要翻译：本发明涉及具有半导体本体（12）的半导体器件（10），该半导体器件（12）包括分别具有第一导电类型的发射极区，基极区和集电极区（1,2,3）的双极晶体管，与第一导电类型相反的第二导电类型和第一导电类型。发射极或集电极区域（1,3）中的一个包括纳米线（30）。基底区域（2）由半导体本体（12）表面的层（20）形成; 发射极或集电极区域（1,3）中的另一个（3,1）已经形成在基极区域（2）下方的半导体本体（12）中。包括纳米线（30）的发射极或集电极区域（1,3）已经设置在半导体本体（12）的表面上，使得其纵向轴线垂直于该表面延伸。

5. 发明申请

US20080315361A1 Semiconductor Device and Method of Manufacturing the Same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080315361A1
公开(公告)日：2008-12-25
申请号：US11658227
申请日：2005-07-07
申请人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Erwin Hijzen , Raymond Josephus Engelbart Hueting
发明人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Erwin Hijzen , Raymond Josephus Engelbart Hueting
IPC分类号： H01L27/00 , H01L21/331
CPC分类号： H01L29/0821 , B82Y10/00 , H01L29/06 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/08 , H01L29/423 , H01L29/42304 , H01L29/66242 , H01L29/737 , H01L29/7378
摘要： The invention relates to a semiconductor device (10) with a substrate (11) and a semiconductor body (12) comprising a vertical bipolar transistor with an emitter region, a base region and a collector region (1, 2, 3) of, respectively, a first conductivity type, a second conductivity type opposite to the first conductivity type and the first conductivity type, wherein the collector region (3) comprises a first sub-region (3A) bordering the base region (2) and a second sub-region (3B) bordering the first sub-region (3A) which has a lower doping concentration than the second sub-region (3B), and the transistor is provided with a gate electrode (5) which laterally borders the first sub-region (3A) and by means of which the first sub-region (3A) may be depleted. According to the invention the collector region (3) borders the surface of the semiconductor body (12), while the emitter region (1) is recessed in the semiconductor body (12), and the collector region (3) forms part of a mesa structure (6) formed at the surface of the semiconductor body (12). Such a device (10) has very favorable properties at high frequencies and high voltages and, moreover, is easy to manufacture. In a preferred embodiment the collector (3) comprises a nanowire (30) forming the mesa structure (6).
摘要翻译：本发明涉及一种具有衬底（11）和半导体本体（12）的半导体器件（10），该半导体器件包括分别具有发射极区，基极区和集电极区（1,2,3）的垂直双极晶体管，第一导电类型，与第一导电类型和第一导电类型相反的第二导电类型，其中集电极区域（3）包括与基极区域（2）接壤的第一子区域（3A）与第二子区域（3A）接合的第一子区域（3A）的区域（3B），其具有比第二子区域（3B）低的掺杂浓度，并且晶体管设置有与第一子区域横向相邻的栅电极（5） 3A），并且借助于此可以使第一子区域（3A）耗尽。根据本发明，集电极区域（3）与半导体本体（12）的表面相接触，而发射极区域（1）凹入半导体本体（12）中，并且集电极区域（3）形成台面的一部分结构（6）形成在半导体本体（12）的表面。这种装置（10）在高频和高电压下具有非常有利的特性，而且易于制造。在优选实施例中，收集器（3）包括形成台面结构（6）的纳米线（30）。

6. 发明授权

US07915709B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07915709B2
公开(公告)日：2011-03-29
申请号：US11658228
申请日：2005-07-07
申请人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Abraham Rudolf Balkenende , Petrus Hubertus Cornelis Magnee , Melanie Maria Hubertina Wagemans , Erik Petrus Antonius Maria Bakkers , Erwin Hijzen
发明人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Abraham Rudolf Balkenende , Petrus Hubertus Cornelis Magnee , Melanie Maria Hubertina Wagemans , Erik Petrus Antonius Maria Bakkers , Erwin Hijzen
IPC分类号： H01L29/66 , H01L21/8222
CPC分类号： H01L29/0804 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/0821 , H01L29/7378 , Y10S977/936
摘要： The invention relates to a semiconductor device (10) with a semiconductor body (12) comprising a bipolar transistor with an emitter region, a base region and a collector region (1, 2, 3) of, respectively, a first conductivity type, a second conductivity type opposite to the first conductivity type, and the first conductivity type. One of the emitter or collector regions (1, 3) comprises a nanowire (30). The base region (2) has been formed from a layer (20) at the surface of the semiconductor body (12); the other one (3, 1) of the emitter or collector regions (1, 3) has been formed in the semiconductor body (12) below the base region (2). The emitter or collector region (1, 3) comprising the nanowire (30) has been provided on the surface of the semiconductor body (12) such that its longitudinal axis extends perpendicularly to the surface.
摘要翻译：本发明涉及具有半导体本体（12）的半导体器件（10），该半导体器件（12）包括分别具有第一导电类型的发射极区，基极区和集电极区（1,2,3）的双极晶体管，与第一导电类型相反的第二导电类型和第一导电类型。发射极或集电极区域（1,3）中的一个包括纳米线（30）。基底区域（2）由半导体本体（12）表面的层（20）形成; 发射极或集电极区域（1,3）中的另一个（3,1）已经形成在基极区域（2）下方的半导体本体（12）中。包括纳米线（30）的发射极或集电极区域（1,3）已经设置在半导体本体（12）的表面上，使得其纵向轴线垂直于该表面延伸。

7. 发明授权

US08476675B2 Semiconductor device and method of manufacture thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08476675B2
公开(公告)日：2013-07-02
申请号：US12918524
申请日：2009-02-26
申请人： Philippe Meunier-Beillard , Johannes J. T. M. Donkers , Erwin Hijzen
发明人： Philippe Meunier-Beillard , Johannes J. T. M. Donkers , Erwin Hijzen
IPC分类号： H01L29/66
CPC分类号： H01L21/8249 , H01L27/0623 , H01L29/0649 , H01L29/0821 , H01L29/1004 , H01L29/165 , H01L29/42304 , H01L29/456 , H01L29/66242 , H01L29/7378
摘要： A semiconductor device (10) comprising a bipolar transistor and a field 5 effect transistor within a semiconductor body (1) comprising a projecting mesa (5) within which are at least a portion of a collector region (22c and 22d) and a base region (33c) of the bipolar transistor. The bipolar transistor is provided with an insulating cavity (92b) provided in the collector region (22c and 22d). The insulating cavity (92b) may be provided by providing a layer (33a) in the collector region (22c), creating an access path, for example by selectively etching polysilicon towards monocrystalline, and removing a portion of the layer (33a) to provide the cavity using the access path. The layer (33a) provided in the collector region may be of SiGe:C. By blocking diffusion from the base region the insulating cavity (92b) provides a reduction in the base collector capacitance and can be described as defining the base contact.
摘要翻译：一种半导体器件（10），包括在半导体本体（1）内的双极晶体管和场效应晶体管，包括突出的台面（5），其中集电极区域（22c和22d）的至少一部分和基极区域（33c）。双极晶体管设置有设置在集电区域（22c和22d）中的绝缘腔（92b）。可以通过在集电极区域（22c）中设置层（33a）来提供绝缘腔（92b），从而产生存取路径，例如通过选择性地将多晶硅蚀刻成单晶，并去除层（33a）的一部分以提供使用进入路径的空腔。设置在集电区域中的层（33a）可以是SiGe：C。通过阻挡从基极区域的扩散，绝缘腔（92b）提供基极集电极电容的减小，并且可以被描述为限定基极接触。

8. 发明授权

US07939416B2 Method of making bipolar transistor 有权
标题翻译：制造双极晶体管的方法
公开(公告)号：US07939416B2
公开(公告)日：2011-05-10
申请号：US12935924
申请日：2009-03-30
申请人： Sebastien Nuttinck , Erwin Hijzen , Johannes J. T. M. Donkers , Guillaume L. R. Boccardi
发明人： Sebastien Nuttinck , Erwin Hijzen , Johannes J. T. M. Donkers , Guillaume L. R. Boccardi
IPC分类号： H01L21/8222
CPC分类号： H01L29/66242 , H01L21/8249 , H01L29/0634 , H01L29/0692 , H01L29/66287 , H01L29/66795 , H01L29/732 , H01L29/7371
摘要： A method of manufacturing a bipolar transistor is compatible with FinFET processing. A collector region (18) is formed and patterned, base contact regions (26) formed on either side, and a gap formed between the base contact region. A base (28), spacers (30) and an emitter (32) are formed in the gap.
摘要翻译：制造双极晶体管的方法与FinFET处理兼容。形成集电极区域（18）并构图，形成在两侧的基极接触区域（26）和形成在基极接触区域之间的间隙。在间隙中形成基座（28），间隔件（30）和发射极（32）。

9. 发明授权

US07867864B2 Method of manufacturing a semiconductor device and semiconductor device obtained with such a method 有权
标题翻译：利用这种方法制造半导体器件和半导体器件的制造方法
公开(公告)号：US07867864B2
公开(公告)日：2011-01-11
申请号：US12160210
申请日：2007-01-04
申请人： Sebastien Nuttinck , Giberto Curatola , Erwin Hijzen , Philippe Meunier-Beillard
发明人： Sebastien Nuttinck , Giberto Curatola , Erwin Hijzen , Philippe Meunier-Beillard
IPC分类号： H01L21/336
CPC分类号： H01L29/0653 , H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L29/66545 , H01L29/66628 , H01L29/66636 , H01L29/7834
摘要： The invention relates to a method of manufacturing a semiconductor device comprising a field effect transistor, in which method a semiconductor body of silicon with a substrate is provided at a surface thereof with a source region and a drain region of a first conductivity type which are situated above a buried isolation region and with a channel region, between the source and drain regions, of a second conductivity type, opposite to the first conductivity type, and with a gate region separated from the surface of the semiconductor body by a gate dielectric and situated above the channel region, wherein a mesa is formed in the semiconductor body in which the channel region is formed and wherein the source and drain regions are formed on both sides of the mesa in a semiconductor region that is formed using epitaxial growth, the source and drain regions thereby contacting the channel region.
摘要翻译：本发明涉及一种制造半导体器件的方法，该半导体器件包括场效应晶体管，其中在其表面上提供具有衬底的硅半导体本体，其具有位于第一导电类型的源区和漏区位于源极和漏极区之间的与第一导电类型相反的第二导电类型的沟道区，以及通过栅极电介质与半导体本体的表面分离的栅极区，位于在沟道区域的上方，其中在形成沟道区的半导体本体中形成台面，并且其中源极和漏极区域形成在使用外延生长形成的半导体区域中的台面的两侧，源极和漏极区域漏区，从而接触沟道区。

10. 发明申请

US20100289022A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE OBTAINED WITH SUCH A METHOD 有权
标题翻译：制造半导体器件的方法和采用这种方法获得的半导体器件
公开(公告)号：US20100289022A1
公开(公告)日：2010-11-18
申请号：US12094303
申请日：2006-10-29
申请人： Joost Melai , Erwin Hijzen , Philippe Meunier-Beillard , Johannes J.T.M. Donkers
发明人： Joost Melai , Erwin Hijzen , Philippe Meunier-Beillard , Johannes J.T.M. Donkers
IPC分类号： H01L29/73 , H01L21/331 , H01L29/02
CPC分类号： H01L29/66242 , H01L29/66287
摘要： The invention relates to a method of manufacturing a semiconductor device (10) with a substrate (11) and a semiconductor body (12) which is provided with at least one bipolar transistor having an emitter region (1), a base region (2) and a collector region (3), wherein in the semiconductor body (12) a first semiconductor region (13) is formed that forms one (3) of the collector and emitter regions (1,3) and on the surface of the semiconductor body (12) a stack of layers is formed comprising a first insulating layer (4), a polycrystalline semiconductor layer (5) and a second insulating layer (6) in which stack an opening (7) is formed, after which by non-selective epitaxial growth a further semiconductor layer (22) is deposited of which a monocrystalline horizontal part on the bottom of the opening (7) forms the base region (2) and of which a polycrystalline vertical part (2A) on a side face of the opening (7) is connected to the polycrystalline semiconductor layer (5), after which spacers (S) are formed parallel to the side face of the opening (7) and a second semiconductor region (31) is formed between said spacers (S) forming the other one (1) of the emitter and collector regions (1,3). According to the invention the above method is characterized in that before the further semiconductor layer (22) is deposited, the second insulating layer (6) is provided with an end portion (6A) that viewed in projection overhangs an end portion (5A) of the underlying semiconductor layer (5). In this way bipolar transistor devices can be obtained with good high frequency properties in a cost effective manner.
摘要翻译：本发明涉及一种制造半导体器件（10）的方法，所述半导体器件（10）具有衬底（11）和半导体本体（12），所述半导体器件（12）具有至少一个具有发射极区域（1），基极区域（2）和集电极区域（3），其中在所述半导体本体（12）中形成第一半导体区域（13），所述第一半导体区域形成所述集电极和发射极区域（1,3）中的一个（3）并且在所述半导体主体（12）形成一叠层，其包括形成有开口（7）的第一绝缘层（4），多晶半导体层（5）和第二绝缘层（6），之后通过非选择性外延生长沉积另外的半导体层（22），其中开口（7）的底部上的单晶水平部分形成基部区域（2），并且在该开口的侧面上具有多晶垂直部分（2A）（7）连接到多晶半导体层（5），之后是间隔（S）形成为平行于开口（7）的侧面，并且在形成发射极和集电极区域（1,3）的另一个（1）的所述间隔物（S）之间形成第二半导体区域（31））。根据本发明，上述方法的特征在于，在沉积另外的半导体层（22）之前，第二绝缘层（6）设置有端部（6A），其从突出部分观察到突出部分底层半导体层（5）。以这种方式，可以以成本有效的方式获得具有良好高频特性的双极晶体管器件。

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