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1. 发明授权

US08102633B2 Power supply equalization circuit using distributed high-voltage and low-voltage shunt circuits 有权
标题翻译：电源均衡电路采用分布式高压和低压分流电路
公开(公告)号：US08102633B2
公开(公告)日：2012-01-24
申请号：US12406705
申请日：2009-03-18
申请人： Yikai Liang , Arvind Bomdica , Samudyatha Suryanarayana , Gayatri Gopalan , Min Xu , Xin Liu , Ming-Ju Edward Lee
发明人： Yikai Liang , Arvind Bomdica , Samudyatha Suryanarayana , Gayatri Gopalan , Min Xu , Xin Liu , Ming-Ju Edward Lee
IPC分类号： H02H9/00 , H01C7/12 , H02H1/00 , H02H1/04 , H02H3/22
CPC分类号： H03K19/00315
摘要： Embodiments of an IC protection circuit that protects low voltage supply transistors and circuits within the IC from excessive power supply levels and ESD events are described. A protection circuit situated between the IO pins of the IC and the internal circuitry of the IC includes a voltage drop network and a plurality of shunt circuits to protect the IC against excessive supply voltages and ESD voltages, or other excessive current conditions. Each shunt circuit includes an RC trigger stage and an NMOS shunt stage that are made using low-voltage devices. A protection circuit of the embodiments includes a high voltage IO pin, a voltage drop network to drop a high voltage on the IO pin to a low voltage level on a floating voltage rail, a first shunt circuit coupled between the floating supply rail and ground, an equalizer circuit coupled between the floating supply rail and a low voltage supply rail, and a second shunt circuit coupled to the equalizer circuit through the low voltage supply rail.
摘要翻译：描述了保护IC内的低压电源晶体管和电路免受过多电源电平和ESD事件的IC保护电路的实施例。位于IC的IO引脚和IC内部电路之间的保护电路包括一个压降网络和多个分流电路，以保护IC免受过多的电源电压和ESD电压或其他过大的电流条件的影响。每个并联电路包括使用低电压器件制造的RC触发级和NMOS分流级。实施例的保护电路包括高电压IO引脚，降压网络，以将IO引脚上的高电压降低到浮置电压轨上的低电压电平;耦合在浮动电源轨和地之间的第一分流电路，耦合在浮动电源轨和低电压电源轨之间的均衡器电路，以及通过低压供电轨耦合到均衡器电路的第二分流电路。

2. 发明申请

US20100238599A1 Power Supply Equalization Circuit Using Distributed High-Voltage and Low-Voltage Shunt Circuits 有权
标题翻译：使用分布式高压和低压分流电路的电源均衡电路
公开(公告)号：US20100238599A1
公开(公告)日：2010-09-23
申请号：US12406705
申请日：2009-03-18
申请人： Yikai Liang , Arvind Bomdica , Samudyatha Suryanarayana , Gayatri Gopalan , Min Xu , Xin Liu , Ming-Ju Edward Lee
发明人： Yikai Liang , Arvind Bomdica , Samudyatha Suryanarayana , Gayatri Gopalan , Min Xu , Xin Liu , Ming-Ju Edward Lee
IPC分类号： H02H9/04
CPC分类号： H03K19/00315
摘要： Embodiments of an IC protection circuit that protects low voltage supply transistors and circuits within the IC from excessive power supply levels and ESD events are described. A protection circuit situated between the IO pins of the IC and the internal circuitry of the IC includes a voltage drop network and a plurality of shunt circuits to protect the IC against excessive supply voltages and ESD voltages, or other excessive current conditions. Each shunt circuit includes an RC trigger stage and an NMOS shunt stage that are made using low-voltage devices. A protection circuit of the embodiments includes a high voltage IO pin, a voltage drop network to drop a high voltage on the IO pin to a low voltage level on a floating voltage rail, a first shunt circuit coupled between the floating supply rail and ground, an equalizer circuit coupled between the floating supply rail and a low voltage supply rail, and a second shunt circuit coupled to the equalizer circuit through the low voltage supply rail.
摘要翻译：描述了保护IC内的低压电源晶体管和电路免受过多电源电平和ESD事件的IC保护电路的实施例。位于IC的IO引脚和IC内部电路之间的保护电路包括一个压降网络和多个分流电路，以保护IC免受过多的电源电压和ESD电压或其他过大的电流条件的影响。每个并联电路包括使用低电压器件制造的RC触发级和NMOS分流级。实施例的保护电路包括高电压IO引脚，降压网络，以将IO引脚上的高电压降低到浮置电压轨上的低电压电平;耦合在浮动电源轨和地之间的第一分流电路，耦合在浮动电源轨和低电压电源轨之间的均衡器电路，以及通过低压供电轨耦合到均衡器电路的第二分流电路。

3. 发明授权

US08829941B2 Low-power high-gain multistage comparator circuit 有权
标题翻译：低功耗高增益多级比较电路
公开(公告)号：US08829941B2
公开(公告)日：2014-09-09
申请号：US13316488
申请日：2011-12-10
申请人： Xin Liu , Arvind Bomdica , Yikai Liang
发明人： Xin Liu , Arvind Bomdica , Yikai Liang
IPC分类号： H03K5/22
CPC分类号： H03F3/3022 , H03F3/45183 , H03F2203/45644 , H03F2203/45674 , H03F2203/45676
摘要： A method is provided for receiving a differential signal pair input at a first circuit stage and converting the differential signal pair input to a single-ended signal at a second circuit stage. The method also provides for receiving an output of the first circuit stage and an output of the second stage at a third circuit stage and transmitting an amplified signal output from the third circuit stage. The method allows for a 60 dB signal gain or more. A circuit is also provided that includes multiple circuit stages that can provide signal gain to an input differential signal pair. The circuit converts the differential pair into a single-ended signal and transmits the amplified signal as an output. The circuit provides the signal gain without using a current mirror. A computer readable storage device encoded with data for adapting a manufacturing facility to create an apparatus is also provided.
摘要翻译：提供一种用于接收在第一电路级输入的差分信号对，并在第二电路级将差分信号对输入转换为单端信号的方法。该方法还提供在第三电路级接收第一电路级的输出和第二级的输出，并且传输从第三电路级输出的放大信号。该方法允许60dB的信号增益或更多。还提供了一种电路，其包括可向输入差分信号对提供信号增益的多个电路级。电路将差分对转换为单端信号，并将放大的信号作为输出发送。该电路在不使用电流镜的情况下提供信号增益。还提供了一种用于适配制造设备以创建设备的数据编码的计算机可读存储设备。

4. 发明授权

US08102632B2 Electrostatic discharge power clamp trigger circuit using low stress voltage devices 有权
标题翻译：静电放电电源钳位触发电路采用低应力电压器件
公开(公告)号：US08102632B2
公开(公告)日：2012-01-24
申请号：US12406684
申请日：2009-03-18
申请人： Yikai Liang , Arvind Bomdica , Samudyatha Suryanarayana , Gayatri Gopalan , Min Xu , Xin Liu , Ming-Ju Edward Lee
发明人： Yikai Liang , Arvind Bomdica , Samudyatha Suryanarayana , Gayatri Gopalan , Min Xu , Xin Liu , Ming-Ju Edward Lee
IPC分类号： H02H9/00 , H01C7/12 , H02H1/00 , H02H1/04 , H02H3/22 , H02H9/06
CPC分类号： H03K19/00315
摘要： Embodiments of an IC protection circuit that protects low voltage supply transistors and circuits within the IC from excessive power supply levels and ESD events are described. A protection circuit situated between the IO pins of the IC and the internal circuitry of the IC includes a voltage drop network and a plurality of shunt circuits to protect the IC against excessive supply voltages and ESD voltages. Each shunt circuit includes an RC trigger stage and an NMOS shunt stage that are made using low-voltage devices. A protection circuit of the embodiments includes a high voltage IO pin interface, a voltage drop network coupled to the IO pin and comprising a plurality of forward-biased diodes connected in series to drop a high voltage on the IO pin to a low voltage level, an NMOS shunt transistor coupled between the voltage drop network and a ground terminal, and a trigger circuit coupled to the NMOS shunt transistor to activate the shunt transistor when a sensed input voltage rise time is shorter than a defined supply voltage rise time.
摘要翻译：描述了保护IC内的低压电源晶体管和电路免受过多电源电平和ESD事件的IC保护电路的实施例。位于IC的IO引脚和IC内部电路之间的保护电路包括一个压降网络和多个分流电路，以保护IC免受过多的电源电压和ESD电压的影响。每个并联电路包括使用低电压器件制造的RC触发级和NMOS分流级。实施例的保护电路包括高电压IO引脚接口，耦合到IO引脚的电压降网络，并且包括串联连接的多个正向偏置二极管以将IO引脚上的高电压降低到低电压电平，耦合在所述电压降网络和接地端子之间的NMOS分流晶体管，以及耦合到所述NMOS分流晶体管的触发电路，以在感测到的输入电压上升时间短于限定的电源电压上升时间时激活所述并联晶体管。

5. 发明申请

US20100238598A1 Electrostatic Discharge Power Clamp Trigger Circuit Using Low Stress Voltage Devices 有权
标题翻译：使用低应力电压器件的静电放电电源钳位触发电路
公开(公告)号：US20100238598A1
公开(公告)日：2010-09-23
申请号：US12406684
申请日：2009-03-18
申请人： Yikai Liang , Arvind Bomdica , Samudyatha Suryanarayana , Gayatri Gopalan , Min Xu , Xin Liu , Ming-Ju Edward Lee
发明人： Yikai Liang , Arvind Bomdica , Samudyatha Suryanarayana , Gayatri Gopalan , Min Xu , Xin Liu , Ming-Ju Edward Lee
IPC分类号： H02H9/04 , G06F17/00
CPC分类号： H03K19/00315
摘要： Embodiments of an IC protection circuit that protects low voltage supply transistors and circuits within the IC from excessive power supply levels and ESD events are described. A protection circuit situated between the IO pins of the IC and the internal circuitry of the IC includes a voltage drop network and a plurality of shunt circuits to protect the IC against excessive supply voltages and ESD voltages. Each shunt circuit includes an RC trigger stage and an NMOS shunt stage that are made using low-voltage devices. A protection circuit of the embodiments includes a high voltage IO pin interface, a voltage drop network coupled to the IO pin and comprising a plurality of forward-biased diodes connected in series to drop a high voltage on the IO pin to a low voltage level, an NMOS shunt transistor coupled between the voltage drop network and a ground terminal, and a trigger circuit coupled to the NMOS shunt transistor to activate the shunt transistor when a sensed input voltage rise time is shorter than a defined supply voltage rise time.
摘要翻译：描述了保护IC内的低压电源晶体管和电路免受过多电源电平和ESD事件的IC保护电路的实施例。位于IC的IO引脚和IC内部电路之间的保护电路包括一个压降网络和多个分流电路，以保护IC免受过多的电源电压和ESD电压的影响。每个并联电路包括使用低电压器件制造的RC触发级和NMOS分流级。实施例的保护电路包括高电压IO引脚接口，耦合到IO引脚的电压降网络，并且包括串联连接的多个正向偏置二极管以将IO引脚上的高电压降低到低电压电平，耦合在所述电压降网络和接地端子之间的NMOS分流晶体管，以及耦合到所述NMOS分流晶体管的触发电路，以在感测到的输入电压上升时间短于限定的电源电压上升时间时激活所述并联晶体管。

6. 发明申请

US20130147554A1 LOW-POWER HIGH-GAIN MULTISTAGE COMPARATOR CIRCUIT 有权
标题翻译：低功耗高增益多电路比较器电路
公开(公告)号：US20130147554A1
公开(公告)日：2013-06-13
申请号：US13316488
申请日：2011-12-10
申请人： Xin Liu , Arvind Bomdica , Yikai Liang
发明人： Xin Liu , Arvind Bomdica , Yikai Liang
IPC分类号： H03F3/45
CPC分类号： H03F3/3022 , H03F3/45183 , H03F2203/45644 , H03F2203/45674 , H03F2203/45676
摘要： A method is provided for receiving a differential signal pair input at a first circuit stage and converting the differential signal pair input to a single-ended signal at a second circuit stage. The method also provides for receiving an output of the first circuit stage and an output of the second stage at a third circuit stage and transmitting an amplified signal output from the third circuit stage. The method allows for a 60 dB signal gain or more. A circuit is also provided that includes multiple circuit stages that can provide signal gain to an input differential signal pair. The circuit converts the differential pair into a single-ended signal and transmits the amplified signal as an output. The circuit provides the signal gain without using a current mirror. A computer readable storage device encoded with data for adapting a manufacturing facility to create an apparatus is also provided.
摘要翻译：提供一种用于接收在第一电路级输入的差分信号对，并在第二电路级将差分信号对输入转换为单端信号的方法。该方法还提供在第三电路级接收第一电路级的输出和第二级的输出，并且传输从第三电路级输出的放大信号。该方法允许60dB的信号增益或更多。还提供了一种电路，其包括可向输入差分信号对提供信号增益的多个电路级。电路将差分对转换为单端信号，并将放大的信号作为输出发送。该电路在不使用电流镜的情况下提供信号增益。还提供了一种用于适配制造设备以创建设备的数据编码的计算机可读存储设备。

7. 发明授权

US08149024B2 Dual function voltage and current mode differential driver 有权
标题翻译：双功能电压和电流模式差分驱动器
公开(公告)号：US08149024B2
公开(公告)日：2012-04-03
申请号：US12633174
申请日：2009-12-08
申请人： Xin Liu , Arvind Bomdica , Yikai Liang , Ming-Ju Edward Lee , Rohit Rathi , Jinyung Namkoong
发明人： Xin Liu , Arvind Bomdica , Yikai Liang , Ming-Ju Edward Lee , Rohit Rathi , Jinyung Namkoong
IPC分类号： H03K3/00
CPC分类号： H03K19/018528 , H03K19/018585
摘要： A dual function differential driver includes a voltage mode differential driver portion and a current mode differential driver portion. Control circuitry is connected to the voltage mode differential driver portion and the current mode differential driver portion. The control circuitry switches the dual function differential driver between operation as a voltage mode differential driver and operation as a current mode differential driver.
摘要翻译：双功能差分驱动器包括电压模式差分驱动器部分和电流模式差分驱动器部分。控制电路连接到电压模式差分驱动器部分和电流模式差分驱动器部分。控制电路将双功能差分驱动器作为电压模式差分驱动器操作，并作为电流模式差分驱动器进行操作。

8. 发明申请

US20110133788A1 DUAL FUNCTION VOLTAGE AND CURRENT MODE DIFFERENTIAL DRIVER 有权
标题翻译：双功能电压和电流模式差分驱动器
公开(公告)号：US20110133788A1
公开(公告)日：2011-06-09
申请号：US12633174
申请日：2009-12-08
申请人： Xin Liu , Arvind Bomdica , Yikai Liang , Ming-Ju Edward Lee , Rohit Rathi , Jinyung Namkoong
发明人： Xin Liu , Arvind Bomdica , Yikai Liang , Ming-Ju Edward Lee , Rohit Rathi , Jinyung Namkoong
IPC分类号： H03K3/00
CPC分类号： H03K19/018528 , H03K19/018585
摘要： A dual function differential driver includes a voltage mode differential driver portion and a current mode differential driver portion. Control circuitry is connected to the voltage mode differential driver portion and the current mode differential driver portion. The control circuitry switches the dual function differential driver between operation as a voltage mode differential driver and operation as a current mode differential driver.
摘要翻译：双功能差分驱动器包括电压模式差分驱动器部分和电流模式差分驱动器部分。控制电路连接到电压模式差分驱动器部分和电流模式差分驱动器部分。控制电路将双功能差分驱动器作为电压模式差分驱动器操作，并作为电流模式差分驱动器进行操作。

9. 发明申请

US20090168854A1 De-Emphasis Circuit for a Voltage Mode Driver Used to Communicate Via a Differential Communication Link 有权
标题翻译：用于通过差分通信链路进行通信的电压模式驱动器的去加重电路
公开(公告)号：US20090168854A1
公开(公告)日：2009-07-02
申请号：US12032741
申请日：2008-02-18
申请人： Yikai Liang , Arvind Bomdica , Min Xu , Ming-Ju Ml. Lee
发明人： Yikai Liang , Arvind Bomdica , Min Xu , Ming-Ju Ml. Lee
IPC分类号： H04B1/40 , H04L27/04
CPC分类号： H03K19/0019 , H04L1/08 , H04L25/0272 , H04L25/0286
摘要： A circuit for de-emphasizing information transmitted via a differential communication link includes a voltage mode differential circuit and a bi-directional current source circuit. The voltage mode differential circuit includes a first and second output terminal. The voltage mode differential circuit provides a first voltage via the first output terminal and second voltage via the second output terminal in response to a differential input voltage. The bi-directional current source circuit is operatively coupled between the first and second terminals. The bi-directional current source circuit selectively provides current in a first and second direction between the first and second terminals based on the first and second voltage.
摘要翻译：用于去强调通过差分通信链路发送的信息的电路包括电压模式差分电路和双向电流源电路。电压模式差分电路包括第一和第二输出端子。电压模式差分电路响应于差分输入电压经由第一输出端子经由第二输出端子提供第一电压和第二电压。双向电流源电路可操作地耦合在第一和第二端子之间。双向电流源电路基于第一和第二电压选择性地在第一和第二端子之间的第一和第二方向上提供电流。

10. 发明授权

US07659768B2 Reduced leakage voltage level shifting circuit 有权
标题翻译：降低泄漏电压电平移位电路
公开(公告)号：US07659768B2
公开(公告)日：2010-02-09
申请号：US12339800
申请日：2008-12-19
申请人： Samu Suryanarayana , Arvind Bomdica , Yikai Liang
发明人： Samu Suryanarayana , Arvind Bomdica , Yikai Liang
IPC分类号： H03L5/00
CPC分类号： H03K3/35613 , H03K3/012
摘要： A level shifting circuit includes a first stage and a second stage. The first stage and second stage are operatively coupled to a first and second power supply. The first stage translates a differential input voltage into an intermediate differential voltage. The second stage translates the intermediate differential voltage into a differential output voltage and provides feedback to the first stage in response to translating the intermediate differential voltage. The first stage reduces current flow between the first and second power supply through the second stage in response to the feedback.
摘要翻译：电平移位电路包括第一级和第二级。第一级和第二级可操作地耦合到第一和第二电源。第一级将差分输入电压转换成中间差分电压。第二级将中间差分电压转换成差分输出电压，并响应于平移中间差分电压而向第一级提供反馈。响应于反馈，第一级减少通过第二级的第一和第二电源之间的电流。

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