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2. 发明授权

US07323911B2 Differential sense amplifier circuit and method triggered by a clock signal through a switch circuit 有权
标题翻译：差分放大器电路和方法由时钟信号通过开关电路触发
公开(公告)号：US07323911B2
公开(公告)日：2008-01-29
申请号：US11285526
申请日：2005-11-21
申请人： Jer Hao Hsu , Tein Yen Wang
发明人： Jer Hao Hsu , Tein Yen Wang
IPC分类号： G11C7/06
CPC分类号： G11C7/065 , G11C7/02 , G11C7/062 , G11C7/1051 , G11C7/106
摘要： A differential sense amplifier is described that can be configured as a preamplifier or a latch circuit as triggered by a clock signal connected to a switch circuit. When the clock signal is set at a first signal level, the switch circuit in the differential sense amplifier is activated so that the differential sense amplifier is configured as a preamplifier with a positive feedback circuit. When the clock signal is set at a second signal level, the switch circuit in the differential sense amplifier is deactivated so that the differential sense amplifier is configured as the latch circuit. For one read cycle, the differential sense amplifier operates first as the preamplifier and then as the latch circuit.
摘要翻译：描述了可以被配置为由连接到开关电路的时钟信号触发的前置放大器或锁存电路的差分读出放大器。当时钟信号被设置在第一信号电平时，差分读出放大器中的开关电路被激活，使得差分读出放大器被配置为具有正反馈电路的前置放大器。当时钟信号被设置在第二信号电平时，差分读出放大器中的开关电路被去激活，使得差分读出放大器被配置为锁存电路。对于一个读周期，差分读出放大器首先作为前置放大器工作，然后作为锁存电路。

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