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11. 发明申请

US20090312037A1 APPARATUS AND SYSTEM FOR ESTIMATING LOCATION OF TERMINAL 审中-公开
标题翻译：用于估计终端位置的装置和系统
公开(公告)号：US20090312037A1
公开(公告)日：2009-12-17
申请号：US12145645
申请日：2008-06-25
申请人： Daehyung Jo , Jeongkeun Lee , Jinyoung Han , Taekyoung Kwon , Tae Il Kim , Tae Joon Ha
发明人： Daehyung Jo , Jeongkeun Lee , Jinyoung Han , Taekyoung Kwon , Tae Il Kim , Tae Joon Ha
IPC分类号： H04Q7/20
CPC分类号： G01S5/08 , G01S5/0252
摘要： A method and an apparatus for estimating a location of a terminal are provided. The method includes: receiving at least one base station signal from each of at least one base station; computing received signal information with respect to the received signal; and estimating the location of the terminal based on signal transmission direction information associated with the base station and the computed received signal information. The present invention can accurately estimate the location of the terminal based on directional information of base station signals.
摘要翻译：提供了一种用于估计终端的位置的方法和装置。该方法包括：从至少一个基站中的每一个接收至少一个基站信号; 计算关于接收信号的接收信号信息; 以及基于与所述基站相关联的信号传输方向信息和所计算的接收信号信息来估计所述终端的位置。本发明可以基于基站信号的方向信息来准确估计终端的位置。

12. 发明授权

US6117688A Method for constructing ferroelectric based capacitor for use in memory systems 失效
标题翻译：用于存储系统中使用的铁电电容器的方法
公开(公告)号：US6117688A
公开(公告)日：2000-09-12
申请号：US75011
申请日：1998-05-08
申请人： Joseph T. Evans, Jr. , Richard Womack
发明人： Joseph T. Evans, Jr. , Richard Womack
IPC分类号： H01L21/02 , H01L21/8246 , H01L27/115 , H01L29/92 , H01L21/8242 , H01G7/06
CPC分类号： H01L27/11502 , H01L27/11585 , H01L27/1159 , H01L28/55 , H01L28/60 , H01L28/75
摘要： A ferroelectric based capacitor structure and method for making the same. The capacitor includes a bottom electrode having a layer of Pt in contact with a first layer of an ohmic material. The capacitor dielectric is constructed from a layer of lead zirconium titanate doped with an element having an oxidation state greater than +4. The top electrode of the capacitor is constructed from a second layer of ohmic material in contact with a layer of Pt. The preferred ohmic material is LSCO; although RuO.sub.2 may also be utilized. The capacitor is preferably constructed over the drain of a FET such that the bottom electrode of the capacitor is connected to the drain of the FET. The resulting capacitor structure has both low imprint and low fatigue.
摘要翻译：一种铁电体电容器结构及其制造方法。电容器包括具有与第一欧姆材料层接触的Pt层的底部电极。电容器电介质由掺杂有大于+4的氧化态的元素的钛酸铅锆层构成。电容器的顶部电极由与Pt层接触的第二层欧姆材料构成。优选的欧姆材料是LSCO; 尽管也可以使用RuO 2。电容器优选地构造在FET的漏极上，使得电容器的底部电极连接到FET的漏极。所得到的电容器结构具有低压印和低疲劳。

13. 发明授权

US6066868A Ferroelectric based memory devices utilizing hydrogen barriers and getters 有权
标题翻译：采用氢屏障和吸气剂的铁电存储器件
公开(公告)号：US6066868A
公开(公告)日：2000-05-23
申请号：US282309
申请日：1999-03-31
申请人： Joseph T. Evans, Jr.
发明人： Joseph T. Evans, Jr.
IPC分类号： H01L21/02 , H01L21/8246 , H01L27/115 , H01L29/51 , H01L29/76
CPC分类号： H01L27/11502 , G11C11/221 , H01L27/11507 , H01L28/55 , H01L28/75 , H01L29/516
摘要： A ferroelectric memory cell for storing information. The information is stored in the remnant polarization of a ferroelectric dielectric layer by setting the direction of the remnant polarization. The ferroelectric memory cell is designed to store the information at a temperature less than a first temperature. The memory cell includes top and bottom contacts that sandwich the dielectric layer which includes a ferroelectric material having a Curie point greater than the first temperature and less than 400.degree. C. The dielectric layer is encapsulated in an oxygen impermeable material such that the encapsulating layer prevents oxygen from entering or leaving the dielectric layer. The memory also includes a hydrogen barrier layer that inhibits the flow of oxygen to the top and bottom electrodes when the memory cell is placed in a gaseous environment containing hydrogen. In one embodiment of the invention, a hydrogen absorbing layer is included. In the preferred embodiment of the present invention, the hydrogen barrier layer is constructed from a material that will also bind hydrogen ions.
摘要翻译：用于存储信息的铁电存储单元。通过设定残留极化的方向，将信息存储在铁电介质层的剩余极化中。铁电存储器单元被设计成在小于第一温度的温度下存储信息。存储单元包括夹住介电层的顶部和底部触点，其包括具有大于第一温度且小于400℃的居里点的铁电材料。电介质层被封装在不透氧材料中，使得封装层防止氧气进入或离开电介质层。存储器还包括当将存储单元放置在含有氢气的气体环境中时，阻止氧气流向顶部和底部电极的氢气阻挡层。在本发明的一个实施方案中，包括吸氢层。在本发明的优选实施方案中，氢阻挡层由也会结合氢离子的材料构成。

14. 发明授权

US5963466A Ferroelectric memory having a common plate electrode 失效
标题翻译：铁电存储器具有公共板电极
公开(公告)号：US5963466A
公开(公告)日：1999-10-05
申请号：US059606
申请日：1998-04-13
申请人： Joseph T. Evans, Jr.
发明人： Joseph T. Evans, Jr.
IPC分类号： G11C11/22 , H01L21/02 , H01L27/115 , H01L29/92 , H01L29/76
CPC分类号： H01L27/11502 , G11C11/22 , H01L28/40
摘要： A memory for storing a plurality of words of data. The memory is constructed from one or more storage blocks. Each storage block includes a plurality of storage words, each storage word storing one of the words of data. Each storage word includes a plurality of single bit storage cells. The single bit storage cells include a ferroelectric capacitor and a pass transistor having a gate, source, and drain. The ferroelectric capacitor includes a bottom electrode, a layer of ferroelectric material, and a top electrode, the layer of ferroelectric material being sandwiched between the top and bottom electrodes. One bit of data is stored in the direction of polarization of the ferroelectric material in contact with the bottom electrode. The bottom electrode is connected to the source of the pass transistor. The top electrode of each single bit storage cell is part of a continuous conducting layer covering all of the ferroelectric capacitors in the storage block. Similarly, the ferroelectric layer is part of a continuous layer of ferroelectric material that is shared by all of the ferroelectric capacitors in the storage block.
摘要翻译：用于存储多个数据字的存储器。存储器由一个或多个存储块构成。每个存储块包括多个存储字，每个存储字存储数据字中的一个。每个存储字包括多个单位存储单元。单位存储单元包括铁电电容器和具有栅极，源极和漏极的通过晶体管。铁电电容器包括底电极，铁电体材料层和顶电极，铁电体层被夹在顶电极和底电极之间。将一位数据存储在与底部电极接触的铁电材料的极化方向上。底部电极连接到传输晶体管的源极。每个单位存储单元的顶电极是覆盖存储块中的所有铁电电容器的连续导电层的一部分。类似地，铁电层是由存储块中的所有铁电电容器共享的铁电材料的连续层的一部分。

15. 发明授权

US5757042A High density ferroelectric memory with increased channel modulation and double word ferroelectric memory cell for constructing the same 失效
标题翻译：高密度铁电存储器具有增加的通道调制和双字铁电存储单元的构造
公开(公告)号：US5757042A
公开(公告)日：1998-05-26
申请号：US663675
申请日：1996-06-14
申请人： Joseph T. Evans, Jr. , Richard Womack
发明人： Joseph T. Evans, Jr. , Richard Womack
IPC分类号： G11C11/22 , H01L27/115 , H01L29/78 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113
CPC分类号： H01L27/11502 , G11C11/22 , H01L29/78391
摘要： A memory based on a ferroelectric FET, the ferroelectric FET includes a gate electrode, a layer of ferroelectric material, layer of semiconducting material, a source electrode and a drain electrode. The layer of ferroelectric material is sandwiched between the gate electrode and the layer of semiconducting material, the source and drain electrodes being in contact with the layer of semiconducting material and spaced apart from one another. The memory includes a circuit for setting the ferroelectric FET to one of two states. The first state is set by applying a first voltage to the source and drain electrodes and a second voltage to the gate electrode. The second state is set by applying a third voltage to the gate and drain electrodes and fourth voltage to the source electrode. This arrangement reduces the number of pass transistors needed per ferroelectric FET to one plus a simple pulsing circuit that must be included with each word of memory.
摘要翻译：基于铁电FET的存储器，铁电FET包括栅电极，铁电材料层，半导体材料层，源电极和漏电极。铁电材料层夹在栅电极和半导体材料层之间，源电极和漏电极与半导体材料层接触并彼此间隔开。存储器包括用于将铁电FET设置为两种状态之一的电路。通过向源极和漏极施加第一电压并将第二电压施加到栅电极来设定第一状态。通过向栅极和漏极施加第三电压并将第四电压施加到源电极来设定第二状态。这种布置将每个铁电FET所需的通过晶体管的数量减少到一个必须包含在每个字存储器中的简单脉冲电路。

16. 发明授权

US08787063B2 Analog memories utilizing ferroelectric capacitors 有权
标题翻译：使用铁电电容器的模拟存储器
公开(公告)号：US08787063B2
公开(公告)日：2014-07-22
申请号：US13559531
申请日：2012-07-26
申请人： Joseph T. Evans, Jr. , Calvin B. Ward
发明人： Joseph T. Evans, Jr. , Calvin B. Ward
IPC分类号： G11C11/22
CPC分类号： G11C11/221 , G11C11/2259 , G11C11/2273 , G11C11/2275 , G11C11/2293 , G11C11/5657 , G11C27/005
摘要： A ferroelectric memory having a plurality of ferroelectric memory cells, each ferroelectric memory cell including a ferroelectric capacitor is disclosed. The ferroelectric memory includes read and write lines and a plurality of ferroelectric memory cell select buses, one select bus corresponding to each of the ferroelectric memory cells. Each of the ferroelectric memory cells includes first and second gates for connecting the ferroelectric memory cell to the read line and the write line, respectively, in response to signals on the ferroelectric memory cell select bus corresponding to that ferroelectric memory cell. A write circuit causes a value determined by a data value having at least three states to be stored in the ferroelectric memory cell currently connected to the write line. A read circuit measures the charge stored in the ferroelectric memory cell currently connected to the read line.
摘要翻译：公开了具有多个铁电存储单元的铁电存储器，每个强电介质存储单元包括铁电电容器。铁电存储器包括读写线和多个铁电存储器单元选择总线，每个铁电存储单元相应的一个选择总线。每个铁电存储单元包括用于响应于与该铁电存储单元相对应的强电介质存储单元选择总线上的信号而分别将铁电存储单元连接到读取线和写入线的第一和第二栅极。写入电路使由具有至少三个状态的数据值确定的值存储在当前连接到写入线的铁电存储单元中。读取电路测量存储在当前连接到读取线的铁电存储器单元中的电荷。

17. 发明授权

US07640027B2 Mobile communication terminal capable of determining position and method of determining position in the mobile communication terminal 失效
标题翻译：能够确定在移动通信终端中确定位置的位置和方法的移动通信终端
公开(公告)号：US07640027B2
公开(公告)日：2009-12-29
申请号：US11485502
申请日：2006-07-12
申请人： Tae Il Kim , Tae Joon Ha , Eun Young Kim , Hyuk Jin Sohn
发明人： Tae Il Kim , Tae Joon Ha , Eun Young Kim , Hyuk Jin Sohn
IPC分类号： H04W24/00
CPC分类号： H04W64/00
摘要： A mobile communication terminal capable of position determination, including: a base station information recorder recording detailed base station information corresponding to at least one base station; a base station signal receiver receiving base station signal information from a reference base station at a predetermined interval; a base station information reader reading the detailed base station information with respect to a base station corresponding to the received base station signal information, from the base station information recorder; and a position determiner determining a position of the mobile communication terminal by using the received base station signal information and the read detailed base station information.
摘要翻译：一种能够进行位置确定的移动通信终端，包括：基站信息记录器，记录与至少一个基站对应的详细的基站信息; 基站信号接收机以预定间隔从参考基站接收基站信号信息; 基站信息读取器，从基站信息记录器读取相对于与所接收的基站信号信息对应的基站的详细基站信息; 以及位置确定器，其通过使用所接收的基站信号信息和所读取的详细基站信息来确定移动通信终端的位置。

18. 发明授权

US5804850A Ferroelectric based capacitor cell for use in memory systems 失效
标题翻译：用于存储器系统的基于铁电的电容器单元
公开(公告)号：US5804850A
公开(公告)日：1998-09-08
申请号：US633853
申请日：1996-04-16
申请人： Joseph T. Evans, Jr. , Richard Womack
发明人： Joseph T. Evans, Jr. , Richard Womack
IPC分类号： H01L21/02 , H01L21/8246 , H01L27/115 , H01L29/92 , H01L31/119
CPC分类号： H01L27/11502 , H01L27/11585 , H01L27/1159 , H01L28/55 , H01L28/60 , H01L28/75
摘要： A ferroelectric based capacitor structure and method for making the same. The capacitor includes a bottom electrode having a layer of Pt in contact with a first layer of an ohmic material. The capacitor dielectric is constructed from a layer of lead zirconium titanate doped with an element having an oxidation state greater than +4. The top electrode of the capacitor is constructed from a second layer of ohmic material in contact with a layer of Pt. The preferred ohmic material is LSCO; although RuO.sub.2 may also be utilized. The capacitor is preferably constructed over the drain of an FET such that the bottom electrode of the capacitor is connected to the drain of the FET. The resulting capacitor structure has both low imprint and low fatigue.
摘要翻译：一种铁电体电容器结构及其制造方法。电容器包括具有与第一欧姆材料层接触的Pt层的底部电极。电容器电介质由掺杂有大于+4的氧化态的元素的钛酸铅锆层构成。电容器的顶部电极由与Pt层接触的第二层欧姆材料构成。优选的欧姆材料是LSCO; 尽管也可以使用RuO 2。电容器优选地构造在FET的漏极上，使得电容器的底部电极连接到FET的漏极。所得到的电容器结构具有低压印和低疲劳。

19. 发明授权

US5593914A Method for constructing ferroelectric capacitor-like structures on silicon dioxide surfaces 失效
标题翻译：在二氧化硅表面上构造铁电电容器状结构的方法
公开(公告)号：US5593914A
公开(公告)日：1997-01-14
申请号：US616526
申请日：1996-03-19
申请人： Joseph T. Evans, Jr. , Leonard O. Boyer
发明人： Joseph T. Evans, Jr. , Leonard O. Boyer
IPC分类号： H01L21/02 , H01L27/115 , H01L21/70
CPC分类号： H01L27/11502 , H01L28/55 , Y10S148/014
摘要： A method for fabricating an integrated circuit having at least one integrated circuit component fabricated in a silicon substrate and a second device that is to be fabricated on a silicon oxide layer that covers the integrated circuit component. The integrated circuit component has a terminal that is to be connected a corresponding terminal on the second device. The second device includes an electrode structure in contact with a dielectric component that includes a layer of ferroelectric material. In the method of the present invention, a boundary layer comprising non-conducting polysilicon is deposited over the silicon oxide layer. The electrode structure is then fabricated by depositing one or more layers over the boundary layer. The ferroelectric layer is then deposited over the electrode structure and etched to provide the dielectric component. The boundary layer is then removed utilizing an etchant that etches silicon oxide much slower than polysilicon.
摘要翻译：一种用于制造集成电路的方法，所述集成电路具有制造在硅衬底中的至少一个集成电路部件和将被制造在覆盖所述集成电路部件的氧化硅层上的第二器件。集成电路部件具有要连接到第二装置上的相应端子的端子。第二装置包括与包括铁电材料层的电介质部件接触的电极结构。在本发明的方法中，在氧化硅层上沉积包含非导电多晶硅的边界层。然后通过在边界层上沉积一个或多个层来制造电极结构。然后将铁电层沉积在电极结构上并被蚀刻以提供电介质成分。然后利用蚀刻氧化硅比多晶硅慢的蚀刻剂去除边界层。

20. 发明授权

US08964446B2 Analog memories utilizing ferroelectric capacitors 有权
标题翻译：使用铁电电容器的模拟存储器
公开(公告)号：US08964446B2
公开(公告)日：2015-02-24
申请号：US14274616
申请日：2014-05-09
申请人： Radiant Technologies, Inc.
发明人： Joseph T. Evans , Calvin B. Ward
IPC分类号： G11C11/22
CPC分类号： G11C11/221 , G11C11/2259 , G11C11/2273 , G11C11/2275 , G11C11/2293 , G11C11/5657 , G11C27/005
摘要： A ferroelectric memory having a plurality of ferroelectric memory cells, each ferroelectric memory cell including a ferroelectric capacitor is disclosed. The ferroelectric memory includes read and write lines and a plurality of ferroelectric memory cell select buses, one select bus corresponding to each of the ferroelectric memory cells. Each of the ferroelectric memory cells includes first and second gates for connecting the ferroelectric memory cell to the read line and the write line, respectively, in response to signals on the ferroelectric memory cell select bus corresponding to that ferroelectric memory cell. A write circuit causes a charge to be stored in the ferroelectric capacitor of the ferroelectric memory cell currently connected to the write line, the charge having a value determined by a data value having at least three states. A read circuit measures the charge stored in the ferroelectric capacitor of the ferroelectric memory cell currently connected to the read line to generate an output value, the output value corresponding to one of the states.
摘要翻译：公开了具有多个铁电存储单元的铁电存储器，每个强电介质存储单元包括铁电电容器。铁电存储器包括读写线和多个铁电存储器单元选择总线，每个铁电存储单元相应的一个选择总线。每个铁电存储单元包括用于响应于与该铁电存储单元相对应的强电介质存储单元选择总线上的信号而分别将铁电存储单元连接到读取线和写入线的第一和第二栅极。写入电路使电荷存储在当前连接到写入线的强电介质存储单元的铁电电容器中，电荷具有由具有至少三个状态的数据值确定的值。读取电路测量存储在当前连接到读取线的铁电存储器单元的铁电电容器中的电荷，以产生与其中一个状态对应的输出值。

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