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11. 发明授权

US08244962B2 Command processor for a data storage device 有权
标题翻译：用于数据存储设备的命令处理器
公开(公告)号：US08244962B2
公开(公告)日：2012-08-14
申请号：US12537722
申请日：2009-08-07
申请人： Andrew T. Swing , Albert T. Borchers , Robert S. Sprinkle , Justin Kennington
发明人： Andrew T. Swing , Albert T. Borchers , Robert S. Sprinkle , Justin Kennington
IPC分类号： G06F12/00 , G06F12/02 , G06F3/00
CPC分类号： G06F3/0679 , G06F3/0613 , G06F3/0619 , G06F3/0644 , G06F3/0659 , G06F12/0246
摘要： An apparatus for queuing and ordering commands for a data storage device may include a slot tracker module that is arranged and configured to track available slots for commands from a host, a command transfer module that is operably coupled to the slot tracker module and that is arranged and configured to retrieve commands from the host based on a number of the available slots, a pending command module that is operably coupled to the command transfer module and that is arranged and configured to queue and order the commands from the host for processing using an ordered list that is based on an age of the commands and a task dispatch module that is operably coupled to the pending command module and that is arranged and configured to dispatch the commands for processing using the ordered list from the pending command module and an availability of storage locations.
摘要翻译：用于为数据存储设备排队和排序命令的设备可以包括槽跟踪器模块，其被布置和配置为跟踪来自主机的命令的可用时隙，命令传输模块，其可操作地耦合到时隙跟踪器模块并且被布置并且被配置为基于多个可用时隙从主机检索命令，即可以命名的命令模块，其可操作地耦合到命令传送模块，并且被配置和配置为从主机排队和排序命令以使用订购的处理列表，其基于命令的年龄和可操作地耦合到待命命令模块的任务分派模块，并且被布置和配置为使用来自挂起命令模块的有序列表来分派用于处理的命令以及存储器的可用性位置。

12. 发明授权

US08239729B2 Data storage device with copy command 有权
标题翻译：具有复制命令的数据存储设备
公开(公告)号：US08239729B2
公开(公告)日：2012-08-07
申请号：US13269183
申请日：2011-10-07
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
IPC分类号： H03M13/00 , G11C29/00
CPC分类号： G06F12/0813 , G06F12/0246 , G06F2212/7205 , G11C29/52 , G11C29/88 , G11C2029/0409
摘要： A data storage device includes an interface that is configured to interface with a host, a command bus, multiple memory devices that are operably coupled to the command bus and a controller that is operably coupled to the interface and to the command bus. The controller is configured to receive a copy command from the host using the interface, read data from a source memory device in response to the copy command, write the data to a destination memory device in response to the copy command and communicate results to the host using the interface.
摘要翻译：数据存储设备包括被配置为与主机，命令总线，可操作地耦合到命令总线的多个存储器设备以及可操作地耦合到接口和命令总线的控制器的接口。控制器被配置为使用接口从主机接收复制命令，响应于复制命令从源存储器设备读取数据，响应于复制命令将数据写入目的地存储设备，并将结果传达给主机使用界面。

13. 发明授权

US08205037B2 Data storage device capable of recognizing and controlling multiple types of memory chips operating at different voltages 有权
标题翻译：能够识别和控制在不同电压下工作的多种类型的存储器芯片的数据存储装置
公开(公告)号：US08205037B2
公开(公告)日：2012-06-19
申请号：US12537709
申请日：2009-08-07
申请人： Andrew T. Swing , Robert S. Sprinkle , Albert T. Borchers
发明人： Andrew T. Swing , Robert S. Sprinkle , Albert T. Borchers
IPC分类号： G06F12/00 , G06F12/02 , G06F13/00
CPC分类号： G06F3/0679 , G06F3/0613 , G06F3/0619 , G06F3/0644 , G06F3/0659 , G06F12/0246
摘要： A data storage device may include a first memory board including multiple memory chips and a controller board that is arranged and configured to operably connect to the first memory board. The controller board may include an interface to a host and a controller that includes a power module and that is arranged and configured to control command processing for multiple memory chips having different voltages, automatically recognize a voltage of the memory chips on the first memory board, configure the power module to operate at the recognized voltage of the memory chips, receive commands from the host using the interface and execute the commands using the memory chips.
摘要翻译：数据存储设备可以包括包括多个存储器芯片的第一存储器板和布置和配置为可操作地连接到第一存储器板的控制器板。控制器板可以包括与主机的接口和包括电源模块的控制器，其被布置和配置为控制具有不同电压的多个存储器芯片的命令处理，自动识别第一存储器板上的存储器芯片的电压，将电源模块配置为在存储芯片的识别电压下工作，使用接口从主机接收命令，并使用存储器芯片执行命令。

14. 发明申请

US20100262762A1 RAID CONFIGURATION IN A FLASH MEMORY DATA STORAGE DEVICE 有权
标题翻译：闪存存储数据存储设备中的RAID配置
公开(公告)号：US20100262762A1
公开(公告)日：2010-10-14
申请号：US12537748
申请日：2009-08-07
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F3/0679 , G06F3/0613 , G06F3/0619 , G06F3/0644 , G06F3/0659 , G06F12/0246
摘要： A method of storing data in a flash memory data storage device that includes a plurality of memory chips is disclosed. The method includes determining a number of memory chips in the data storage device, defining, via a host coupled to the data storage device, a first partition of the data storage device, where the first partition includes a first subset of the plurality of memory chips and defining a second partition of the data storage device via a host coupled to the data storage device, where the second partition includes a second subset of the plurality of memory chips. First data is written to the first partition while reading data from the second partition, and first data is written to the second partition while reading data from the first partition.
摘要翻译：公开了一种在包括多个存储器芯片的闪存数据存储装置中存储数据的方法。该方法包括确定数据存储设备中的多个存储器芯片，经由耦合到数据存储设备的主机定义数据存储设备的第一分区，其中第一分区包括多个存储器芯片的第一子集以及经由耦合到所述数据存储设备的主机定义所述数据存储设备的第二分区，其中所述第二分区包括所述多个存储器芯片的第二子集。当从第二分区读取数据时，将第一数据写入第一分区，并且在从第一分区读取数据的同时将第一数据写入第二分区。

15. 发明申请

US20100262757A1 DATA STORAGE DEVICE 有权
标题翻译：数据存储设备
公开(公告)号：US20100262757A1
公开(公告)日：2010-10-14
申请号：US12537704
申请日：2009-08-07
申请人： Robert S. Sprinkle , Andrew T. Swing , Albert T. Borchers
发明人： Robert S. Sprinkle , Andrew T. Swing , Albert T. Borchers
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F3/0679 , G06F3/0613 , G06F3/0619 , G06F3/0644 , G06F3/0659 , G06F12/0246
摘要： A data storage device may include a first memory board having multiple memory chips and a controller board that is arranged and configured to operably connect to the first memory board. The controller board may include an interface to a host and a controller that is arranged and configured to control command processing for multiple different types of memory chips, automatically recognize a type of the memory chips on the first memory board, receive commands from the host using the interface, and execute the commands using the memory chips.
摘要翻译：数据存储设备可以包括具有多个存储器芯片的第一存储器板和布置和配置为可操作地连接到第一存储器板的控制器板。控制器板可以包括与主机的接口和被配置和配置为控制多种不同类型的存储器芯片的命令处理的控制器，自动识别第一存储器板上的存储器芯片的类型，从主机接收命令使用界面，并使用内存芯片执行命令。

16. 发明申请

US20100262740A1 MULTIPLE COMMAND QUEUES HAVING SEPARATE INTERRUPTS 有权
标题翻译：具有单独中断的多个指令队列
公开(公告)号：US20100262740A1
公开(公告)日：2010-10-14
申请号：US12537733
申请日：2009-08-07
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Grant Grundler
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Grant Grundler
IPC分类号： G06F13/24
CPC分类号： G06F3/0679 , G06F3/0613 , G06F3/0619 , G06F3/0644 , G06F3/0659 , G06F12/0246
摘要： A host device may include a driver that is arranged and configured to communicate commands to a data storage device and multiple pairs of queues, where each of the pairs of queues may include a command queue that is populated with commands for retrieval by the data storage device and a response queue that is populated with responses by the data storage device for retrieval by the host device, where each response queue is associated with an interrupt and an interrupt handler.
摘要翻译：主机设备可以包括被布置和配置为向数据存储设备和多对队列传送命令的驱动器，其中每对队列可以包括命令队列，该命令队列中填充有数据存储设备检索的命令以及响应队列，其被数据存储设备的响应填充以被主机设备检索，其中每个响应队列与中断和中断处理程序相关联。

17. 发明授权

US08566508B2 RAID configuration in a flash memory data storage device 有权
标题翻译：闪存数据存储设备中的RAID配置
公开(公告)号：US08566508B2
公开(公告)日：2013-10-22
申请号：US12537748
申请日：2009-08-07
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F3/0679 , G06F3/0613 , G06F3/0619 , G06F3/0644 , G06F3/0659 , G06F12/0246
摘要： A method of storing data in a flash memory data storage device that includes a plurality of memory chips is disclosed. The method includes determining a number of memory chips in the data storage device, defining, via a host coupled to the data storage device, a first partition of the data storage device, where the first partition includes a first subset of the plurality of memory chips and defining a second partition of the data storage device via a host coupled to the data storage device, where the second partition includes a second subset of the plurality of memory chips. First data is written to the first partition while reading data from the second partition, and first data is written to the second partition while reading data from the first partition.
摘要翻译：公开了一种在包括多个存储器芯片的闪存数据存储装置中存储数据的方法。该方法包括确定数据存储设备中的多个存储器芯片，经由耦合到数据存储设备的主机定义数据存储设备的第一分区，其中第一分区包括多个存储器芯片的第一子集以及经由耦合到所述数据存储设备的主机定义所述数据存储设备的第二分区，其中所述第二分区包括所述多个存储器芯片的第二子集。当从第二分区读取数据时，将第一数据写入第一分区，并且在从第一分区读取数据的同时将第一数据写入第二分区。

18. 发明授权

US08447918B2 Garbage collection for failure prediction and repartitioning 有权
标题翻译：垃圾收集用于故障预测和重新分配
公开(公告)号：US08447918B2
公开(公告)日：2013-05-21
申请号：US12755964
申请日：2010-04-07
申请人： Robert S. Sprinkle , Albert T. Borchers , Andrew T. Swing
发明人： Robert S. Sprinkle , Albert T. Borchers , Andrew T. Swing
IPC分类号： G06F12/00 , G06F11/30
CPC分类号： G06F12/0813 , G06F12/0246 , G06F2212/7205 , G11C29/52 , G11C29/88 , G11C2029/0409
摘要： A method of formatting a data storage device that includes a plurality of flash memory chips includes monitoring a failure rate of memory blocks of one or more flash memory chips of a storage device that has a first usable size for user space applications, estimating a future usable size of the data storage device based on the monitored failure rate, and defining, via a host coupled to the data storage device, a second usable size of the data storage device for user space applications based on the monitored failure rate.
摘要翻译：格式化包括多个闪速存储器芯片的数据存储设备的方法包括监视具有用于用户空间应用的第一可用尺寸的存储设备的一个或多个闪存芯片的存储块的故障率，估计未来可用基于所监视的故障率的数据存储设备的大小，以及基于所监视的故障率，经由耦合到数据存储设备的主机定义用于用户空间应用的数据存储设备的第二可用大小。

19. 发明授权

US08239724B2 Error correction for a data storage device 有权
标题翻译：数据存储设备的纠错
公开(公告)号：US08239724B2
公开(公告)日：2012-08-07
申请号：US12537725
申请日：2009-08-07
申请人： Andrew T. Swing , Albert T. Borchers , Robert S. Sprinkle , Jason W. Klaus , Thomas J. Norrie , Benjamin S. Gelb
发明人： Andrew T. Swing , Albert T. Borchers , Robert S. Sprinkle , Jason W. Klaus , Thomas J. Norrie , Benjamin S. Gelb
IPC分类号： H03M13/00
CPC分类号： G06F3/0679 , G06F3/0613 , G06F3/0619 , G06F3/0644 , G06F3/0659 , G06F12/0246
摘要： An apparatus for error correction for a data storage device may include an input interface that is configured to receive individual error correction requests to correct data from multiple channel controllers and that is configured to receive error correction information corresponding to the error correction requests, where each of the channel controllers is arranged and configured to control operations associated with one or more memory chips. The apparatus may include a corrector module that is operably coupled to the input interface and that is arranged and configured to perform error correction using an error correction algorithm and the error correction information to generate correction solutions, where the corrector module is a shared resource for the multiple channel controllers. The apparatus may include an output interface that is operably coupled to the corrector module and that is arranged and configured to communicate the correction solutions to the channel controllers.
摘要翻译：用于数据存储设备的用于纠错的装置可以包括输入接口，其被配置为接收单个纠错请求以从多个信道控制器校正数据，并且被配置为接收对应于纠错请求的纠错信息，其中每个通道控制器被布置和配置为控制与一个或多个存储器芯片相关联的操作。该装置可以包括校正器模块，其可操作地耦合到输入接口，并且被布置和配置为使用纠错算法和纠错信息执行纠错，以产生校正解，其中校正器模块是用于多通道控制器该装置可以包括可操作地耦合到校正器模块的输出接口，并且被配置和配置为将校正解决方案传送到通道控制器。

20. 发明申请

US20120030507A1 DATA STORAGE DEVICE 有权
标题翻译：数据存储设备
公开(公告)号：US20120030507A1
公开(公告)日：2012-02-02
申请号：US13269985
申请日：2011-10-10
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
IPC分类号： G06F11/08
CPC分类号： G06F12/0813 , G06F12/0246 , G06F2212/7205 , G11C29/52 , G11C29/88 , G11C2029/0409
摘要： A data storage device includes an interface that is configured to interface with a host, a command bus, multiple memory devices that are operably coupled to the command bus and a controller that is operably coupled to the interface and to the command bus. The controller is configured to receive a verify on write command from the host using the interface, write data to one of the memory devices, read the data from the memory device, calculate an error correction code for the data as the data is being read, verify the data was written correctly to the memory device using the error correction code and communicate results to the host using the interface.
摘要翻译：数据存储设备包括被配置为与主机，命令总线，可操作地耦合到命令总线的多个存储器设备以及可操作地耦合到接口和命令总线的控制器的接口。控制器被配置为使用接口从主机接收写命令验证，将数据写入存储器件之一，从存储器件读取数据，在数据被读取时计算数据的纠错码，使用纠错码验证数据是否正确写入存储设备，并使用该接口将结果传达给主机。

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