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1. 发明授权

US08380909B2 Multiple command queues having separate interrupts 有权
标题翻译：多个命令队列具有单独的中断
公开(公告)号：US08380909B2
公开(公告)日：2013-02-19
申请号：US12537733
申请日：2009-08-07
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Grant Grundler
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Grant Grundler
IPC分类号： G06F13/24
CPC分类号： G06F3/0679 , G06F3/0613 , G06F3/0619 , G06F3/0644 , G06F3/0659 , G06F12/0246
摘要： A host device may include a driver that is arranged and configured to communicate commands to a data storage device and multiple pairs of queues, where each of the pairs of queues may include a command queue that is populated with commands for retrieval by the data storage device and a response queue that is populated with responses by the data storage device for retrieval by the host device, where each response queue is associated with an interrupt and an interrupt handler.
摘要翻译：主机设备可以包括被布置和配置为向数据存储设备和多对队列传送命令的驱动器，其中每对队列可以包括命令队列，该命令队列中填充有数据存储设备检索的命令以及响应队列，其被数据存储设备的响应填充以被主机设备检索，其中每个响应队列与中断和中断处理程序相关联。

2. 发明申请

US20100262740A1 MULTIPLE COMMAND QUEUES HAVING SEPARATE INTERRUPTS 有权
标题翻译：具有单独中断的多个指令队列
公开(公告)号：US20100262740A1
公开(公告)日：2010-10-14
申请号：US12537733
申请日：2009-08-07
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Grant Grundler
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Grant Grundler
IPC分类号： G06F13/24
CPC分类号： G06F3/0679 , G06F3/0613 , G06F3/0619 , G06F3/0644 , G06F3/0659 , G06F12/0246
摘要： A host device may include a driver that is arranged and configured to communicate commands to a data storage device and multiple pairs of queues, where each of the pairs of queues may include a command queue that is populated with commands for retrieval by the data storage device and a response queue that is populated with responses by the data storage device for retrieval by the host device, where each response queue is associated with an interrupt and an interrupt handler.
摘要翻译：主机设备可以包括被布置和配置为向数据存储设备和多对队列传送命令的驱动器，其中每对队列可以包括命令队列，该命令队列中填充有数据存储设备检索的命令以及响应队列，其被数据存储设备的响应填充以被主机设备检索，其中每个响应队列与中断和中断处理程序相关联。

3. 发明申请

US20100262979A1 CIRCULAR COMMAND QUEUES FOR COMMUNICATION BETWEEN A HOST AND A DATA STORAGE DEVICE 审中-公开
标题翻译：主机和数据存储设备之间通信的通用指令队列
公开(公告)号：US20100262979A1
公开(公告)日：2010-10-14
申请号：US12756477
申请日：2010-04-08
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Grant Grundler , Christopher L. Johnson
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Grant Grundler , Christopher L. Johnson
IPC分类号： G06F9/44 , G06F3/00
CPC分类号： G06F9/544
摘要： A method for communicating commands between a host and a flash memory data storage device includes populating a circular command queue of a driver on the host with commands for retrieval by the data storage device, transferring commands from the circular command queue to the data storage device via a device initiated direct memory access operation, populating, via a direct memory access operation initiated by the data storage device, a circular response queue of the host with responses by the data storage device for retrieval by the host device, where each response acknowledges the reception of a command from the host by the data storage device, and consuming responses from the circular response queue at the host.
摘要翻译：一种用于在主机和闪速存储器数据存储装置之间传送命令的方法包括：在主机上填充驱动程序的循环命令队列，以便由数据存储装置检索命令，将命令从循环命令队列传送到数据存储装置，经由设备启动的直接存储器访问操作，通过由数据存储设备发起的直接存储器访问操作填充主机的循环响应队列，其具有数据存储设备的响应以供主机设备检索，其中每个响应确认接收数据存储设备来自主机的命令，并且消耗来自主机的循环响应队列的响应。

4. 发明授权

US08566507B2 Data storage device capable of recognizing and controlling multiple types of memory chips 有权
标题翻译：能够识别和控制多种类型的存储芯片的数据存储装置
公开(公告)号：US08566507B2
公开(公告)日：2013-10-22
申请号：US12537704
申请日：2009-08-07
申请人： Robert S. Sprinkle , Andrew T. Swing , Albert T. Borchers
发明人： Robert S. Sprinkle , Andrew T. Swing , Albert T. Borchers
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F3/0679 , G06F3/0613 , G06F3/0619 , G06F3/0644 , G06F3/0659 , G06F12/0246
摘要： A data storage device may include a first memory board having multiple memory chips and a controller board that is arranged and configured to operably connect to the first memory board. The controller board may include an interface to a host and a controller that is arranged and configured to control command processing for multiple different types of memory chips, automatically recognize a type of the memory chips on the first memory board, receive commands from the host using the interface, and execute the commands using the memory chips.
摘要翻译：数据存储设备可以包括具有多个存储器芯片的第一存储器板和布置和配置为可操作地连接到第一存储器板的控制器板。控制器板可以包括与主机的接口和被配置和配置为控制多种不同类型的存储器芯片的命令处理的控制器，自动识别第一存储器板上的存储器芯片的类型，从主机接收命令使用界面，并使用内存芯片执行命令。

5. 发明授权

US08433845B2 Data storage device which serializes memory device ready/busy signals 有权
标题翻译：数据存储设备，用于串行化存储设备就绪/忙信号
公开(公告)号：US08433845B2
公开(公告)日：2013-04-30
申请号：US12756009
申请日：2010-04-07
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
IPC分类号： G06F12/00
CPC分类号： G06F12/0813 , G06F12/0246 , G06F2212/7205 , G11C29/52 , G11C29/88 , G11C2029/0409
摘要： A data storage device may include a command bus, a status bus, multiple memory devices that are operably coupled to the command bus and to the status bus, and a controller including multiple channel controllers, where the channel controllers are operably coupled to the command bus and to the status bus and each of the channel controllers is arranged and configured to control one or more of the memory devices. The data storage device may include multiple programmable logic devices that are operably coupled to the status bus, where each of the programmable logic devices is configured to retrieve a ready/busy signal from each of the memory devices under control of one of the channel controllers using the status bus, serialize the ready/busy signals and communicate the serialized ready/busy signals to the channel controllers.
摘要翻译：数据存储设备可以包括命令总线，状态总线，可操作地耦合到命令总线和状态总线的多个存储器设备，以及包括多个通道控制器的控制器，其中通道控制器可操作地耦合到命令总线并且状态总线和每个通道控制器被布置和配置为控制一个或多个存储器件。数据存储设备可以包括可操作地耦合到状态总线的多个可编程逻辑器件，其中每个可编程逻辑器件被配置为在其中一个通道控制器的控制下从每个存储器器件中检索就绪/忙信号，状态总线，串行化就绪/忙信号，并将串行的就绪/忙信号传送给通道控制器。

6. 发明申请

US20100262767A1 DATA STORAGE DEVICE 有权
标题翻译：数据存储设备
公开(公告)号：US20100262767A1
公开(公告)日：2010-10-14
申请号：US12756009
申请日：2010-04-07
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F12/0813 , G06F12/0246 , G06F2212/7205 , G11C29/52 , G11C29/88 , G11C2029/0409
摘要： A data storage device may include a command bus, a status bus, multiple memory devices that are operably coupled to the command bus and to the status bus, and a controller including multiple channel controllers, where the channel controllers are operably coupled to the command bus and to the status bus and each of the channel controllers is arranged and configured to control one or more of the memory devices. The data storage device may include multiple programmable logic devices that are operably coupled to the status bus, where each of the programmable logic devices is configured to retrieve a ready/busy signal from each of the memory devices under control of one of the channel controllers using the status bus, serialize the ready/busy signals and communicate the serialized ready/busy signals to the channel controllers.
摘要翻译：数据存储设备可以包括命令总线，状态总线，可操作地耦合到命令总线和状态总线的多个存储器设备，以及包括多个通道控制器的控制器，其中通道控制器可操作地耦合到命令总线并且状态总线和每个通道控制器被布置和配置为控制一个或多个存储器件。数据存储设备可以包括可操作地耦合到状态总线的多个可编程逻辑器件，其中每个可编程逻辑器件被配置为在其中一个通道控制器的控制下从每个存储器器件中检索就绪/忙信号，状态总线，串行化就绪/忙信号，并将串行的就绪/忙信号传送给通道控制器。

7. 发明授权

US08578084B2 Data storage device having multiple removable memory boards 有权
标题翻译：数据存储设备具有多个可移动存储器板
公开(公告)号：US08578084B2
公开(公告)日：2013-11-05
申请号：US12537719
申请日：2009-08-07
申请人： Albert T. Borchers , Robert S. Sprinkle , Andrew T. Swing , Jason W. Klaus
发明人： Albert T. Borchers , Robert S. Sprinkle , Andrew T. Swing , Jason W. Klaus
IPC分类号： G06F12/02 , G06F13/00
CPC分类号： G06F3/0679 , G06F3/0613 , G06F3/0619 , G06F3/0644 , G06F3/0659 , G06F12/0246
摘要： A data storage device may include a first memory board and a second memory board, where the first memory board and the second memory board each comprise multiple memory chips. The data storage device may include a controller board that is arranged and configured to operably connect to the first memory board and the second memory board, where the controller board includes a high speed interface and a controller that is arranged and configured to receive commands from a host using the high speed interface and to execute the commands, where the first memory board and the second memory board are each separately removable from the controller board.
摘要翻译：数据存储设备可以包括第一存储器板和第二存储器板，其中第一存储器板和第二存储器板各自包括多个存储器芯片。数据存储设备可以包括控制器板，其被布置和配置为可操作地连接到第一存储器板和第二存储器板，其中控制器板包括高速接口和控制器，其被布置和配置为从主机使用高速接口并执行命令，其中第一存储器板和第二存储器板分别可从控制器板移除。

8. 发明授权

US08327220B2 Data storage device with verify on write command 有权
标题翻译：具有写命令验证的数据存储设备
公开(公告)号：US08327220B2
公开(公告)日：2012-12-04
申请号：US13269985
申请日：2011-10-10
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
IPC分类号： G11C29/00 , H03M13/00
CPC分类号： G06F12/0813 , G06F12/0246 , G06F2212/7205 , G11C29/52 , G11C29/88 , G11C2029/0409
摘要： A data storage device includes an interface that is configured to interface with a host, a command bus, multiple memory devices that are operably coupled to the command bus and a controller that is operably coupled to the interface and to the command bus. The controller is configured to receive a verify on write command from the host using the interface, write data to one of the memory devices, read the data from the memory device, calculate an error correction code for the data as the data is being read, verify the data was written correctly to the memory device using the error correction code and communicate results to the host using the interface.
摘要翻译：数据存储设备包括被配置为与主机，命令总线，可操作地耦合到命令总线的多个存储器设备以及可操作地耦合到接口和命令总线的控制器的接口。控制器被配置为使用接口从主机接收写命令验证，将数据写入存储器件之一，从存储器件读取数据，在数据被读取时计算数据的纠错码，使用纠错码验证数据是否正确写入存储设备，并使用该接口将结果传达给主机。

9. 发明授权

US08239713B2 Data storage device with bad block scan command 有权
标题翻译：具有坏块扫描命令的数据存储设备
公开(公告)号：US08239713B2
公开(公告)日：2012-08-07
申请号：US13269972
申请日：2011-10-10
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
IPC分类号： G11C29/00
CPC分类号： G06F12/0813 , G06F12/0246 , G06F2212/7205 , G11C29/52 , G11C29/88 , G11C2029/0409
摘要： A data storage device includes an interface that is configured to interface with a host, a command bus, multiple memory devices that are operably coupled to the command bus and a controller that is operably coupled to the interface and to the command bus. The controller is configured to receive a bad block scan command for a specified one of the memory devices from the host using the interface, scan the specified memory device for bad blocks, generate a map of the bad blocks and communicate the map to the host using the interface.
摘要翻译：数据存储设备包括被配置为与主机，命令总线，可操作地耦合到命令总线的多个存储器设备以及可操作地耦合到接口和命令总线的控制器的接口。控制器被配置为使用接口从主机接收指定的一个存储器设备的坏块扫描命令，扫描指定的存储器件以获得坏块，生成坏块的映射并使用界面。

10. 发明申请

US20120030416A1 DATA STORAGE DEVICE 有权
标题翻译：数据存储设备
公开(公告)号：US20120030416A1
公开(公告)日：2012-02-02
申请号：US13269972
申请日：2011-10-10
申请人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
发明人： Albert T. Borchers , Andrew T. Swing , Robert S. Sprinkle , Jason W. Klaus
IPC分类号： G06F12/00
CPC分类号： G06F12/0813 , G06F12/0246 , G06F2212/7205 , G11C29/52 , G11C29/88 , G11C2029/0409
摘要： A data storage device includes an interface that is configured to interface with a host, a command bus, multiple memory devices that are operably coupled to the command bus and a controller that is operably coupled to the interface and to the command bus. The controller is configured to receive a bad block scan command for a specified one of the memory devices from the host using the interface, scan the specified memory device for bad blocks, generate a map of the bad blocks and communicate the map to the host using the interface.
摘要翻译：数据存储设备包括被配置为与主机，命令总线，可操作地耦合到命令总线的多个存储器设备以及可操作地耦合到接口和命令总线的控制器的接口。控制器被配置为使用接口从主机接收指定的一个存储器设备的坏块扫描命令，扫描指定的存储器件以获得坏块，生成坏块的映射并使用界面。

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