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11. 发明授权

US10312928B2 Successive approximation register analog-to-digital converter 有权
公开(公告)号：US10312928B2
公开(公告)日：2019-06-04
申请号：US15983764
申请日：2018-05-18
申请人： MaxLinear, Inc.
发明人： Kaveh Moazzami , Pawan Tiwari , Gaurav Chandra
IPC分类号： H03M1/08 , H03M1/12 , H03M1/46
摘要： Aspects of a method and apparatus for converting an analog input value to a digital output code are provided. One embodiment of the apparatus includes a digital-to-analog converter, a comparator, and control logic circuitry. The digital-to-analog converter is configured to generate an analog reference value based on a received digital reference value. The comparator is configured to compare an analog input value to the analog reference value after expiration of an allotted settling time for the digital-to-analog converter and generate a comparison result indicative a relationship between the analog input value and the analog reference value. The control logic circuitry is configured to select the allotted settling time for the digital-to-analog converter based on a bit position of a digital output code to be determined, and update the bit position of the digital output code based on the comparison result.

12. 发明授权

US10224946B2 Digital-to-analog converter (DAC) with enhanced dynamic element matching (DEM) and calibration 有权
公开(公告)号：US10224946B2
公开(公告)日：2019-03-05
申请号：US15949395
申请日：2018-04-10
申请人： MaxLinear, Inc.
发明人： Gaurav Chandra , Tao Zeng , Shantha Murthy Prem Swaroop
IPC分类号： H03M1/06 , H03M1/10 , H03M1/66
摘要： Systems and methods are provided for managing dynamic element matching (DEM) in digital-to-analog converters (DACs). One or more parameters associated with the DAC and/or a signal being converted via the DAC; and based on the one or more parameters, conditions affecting dynamic element matching in the DAC may be assessed. Based on the assessing of the conditions, one or more adjustments may be determined and dynamically applied to the dynamic element matching in the DAC.

13. 发明申请

US20190044524A1 DIGITAL-TO-ANALOG CONVERTER (DAC) WITH ENHANCED DYNAMIC ELEMENT MATCHING (DEM) AND CALIBRATION 审中-公开
公开(公告)号：US20190044524A1
公开(公告)日：2019-02-07
申请号：US16155482
申请日：2018-10-09
申请人： MaxLinear, Inc.
发明人： Gaurav Chandra , Tao Zeng , Shantha Murthy Prem Swaroop
IPC分类号： H03M1/06 , H03M1/10
摘要： In a digital-to-analog converter (DAC) that includes one or more conversion circuits, with each conversion circuit configured to handle one or more bits in an input signal to the DAC, one or more types of errors that occur during operation of the DAC may be detected, and one or more adjustments may be determined for correcting the one or more types of errors that occur during operation of the DAC and/or for reducing effects resulting from the one or more types of errors. At least one of the one or more adjustments may applied, with the at least one of the one or more adjustments is applied to only a subset of one or more conversion circuits. The DAC may be adaptive switched among a plurality of modes, and adjustments may be applied only in one or more of the modes but not in all of the modes.

14. 发明申请

US20170359080A1 DIGITAL-TO-ANALOG CONVERTER (DAC) WITH DIGITAL OFFSETS 审中-公开
公开(公告)号：US20170359080A1
公开(公告)日：2017-12-14
申请号：US15633157
申请日：2017-06-26
申请人： MaxLinear, Inc.
发明人： Gaurav Chandra , Tao Zeng , Shantha Murthy Prem Swaroop , Jianyu Zhu
IPC分类号： H03M1/10 , H03M1/06 , H03M1/68
CPC分类号： H03M1/1023 , H03M1/0607 , H03M1/68
摘要： Systems and methods are provided for digital-to-analog conversions with adaptive digital offsets. A digital offset may be determined and applied to a digital input to a digital-to-analog converter (DAC), and digital-to-analog conversions are then applied via the DAC to the digital input with the digital offset. The digital offset may be set to account for one or more conditions relating to inputs to the DAC, with the one or more conditions affecting switching characteristics of one or more of a plurality of conversion elements in the DAC. The digital offset may be determined dynamically and adaptively, such as based on the input and/or conditions relating to the input. The adjustments may be selectively applied to the digital offset for particular input conditions.

15. 发明申请

US20160329908A1 SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTER 有权
公开(公告)号：US20160329908A1
公开(公告)日：2016-11-10
申请号：US15149827
申请日：2016-05-09
申请人： MaxLinear, Inc.
发明人： Kaveh Moazzami , Pawan Tiwari , Gaurav Chandra
IPC分类号： H03M1/12 , H03M1/46
CPC分类号： H03M1/1245 , H03M1/0836 , H03M1/12 , H03M1/46 , H03M1/468
摘要： Aspects of a method and apparatus for converting an analog input value to a digital output code are provided. One embodiment of the apparatus includes a digital-to-analog converter, a comparator, and control logic circuitry. The digital-to-analog converter is configured to generate an analog reference value based on a received digital reference value. The comparator is configured to compare an analog input value to the analog reference value after expiration of an allotted settling time for the digital-to-analog converter and generate a comparison result indicative a relationship between the analog input value and the analog reference value. The control logic circuitry is configured to select the allotted settling time for the digital-to-analog converter based on a bit position of a digital output code to be determined, and update the bit position of the digital output code based on the comparison result.

16. 发明申请

US20160308545A1 DIGITAL-TO-ANALOG CONVERTER (DAC) WITH ENHANCED DYNAMIC ELEMENT MATCHING (DEM) AND CALIBRATION 有权
标题翻译：具有增强动态元件匹配（DEM）和校准的数字到模拟转换器（DAC）
公开(公告)号：US20160308545A1
公开(公告)日：2016-10-20
申请号：US15130617
申请日：2016-04-15
申请人： MaxLinear, Inc.
发明人： Gaurav Chandra , Tao Zeng , Shantha Murthy Prem Swaroop
IPC分类号： H03M1/06 , H03M1/68 , H03M1/10
CPC分类号： H03M1/066 , H03M1/1038 , H03M1/66
摘要： Systems and methods are provided for digital-to-analog converters (DACs) with enhanced dynamic element matching (DEM) and calibration. DEM may be adapted based on assessment of one or more conditions that may affect the DACs or DEM functions thereof. The one or more condition may comprise amount of signal backoff. The adaption may comprise switching the DEM function (as a whole, or partially—e.g., individual DEM elements) on or off based on the assess conditions. The DACs may incorporate use of calibration. The DEM and/or the calibration may be applied to only a portion of the DAC, such as a particular segment (e.g., a middle segment comprising bits between the MSBs and the LSBs).
摘要翻译：为具有增强的动态元素匹配（DEM）和校准的数模转换器（DAC）提供了系统和方法。可以基于可能影响DAC或其DEM功能的一个或多个条件的评估来调整DEM。一个或多个条件可以包括信号回退量。适应可以包括基于评估条件来打开或关闭DEM功能（整体上，或部分地，例如，单独的DEM元件）。 DAC可以使用校准。 DEM和/或校准可以仅应用于DAC的一部分，例如特定段（例如，包括MSB和LSB之间的位的中间段）。

17. 发明授权

US09362941B2 Successive approximation register analog-to-digital converter 有权
公开(公告)号：US09362941B2
公开(公告)日：2016-06-07
申请号：US14738143
申请日：2015-06-12
申请人： MaxLinear, Inc.
发明人： Kaveh Moazzami , Pawan Tiwari , Gaurav Chandra
IPC分类号： H03M1/12 , H03M1/46 , H03M1/08
CPC分类号： H03M1/1245 , H03M1/0836 , H03M1/12 , H03M1/46 , H03M1/468
摘要： Aspects of a method and apparatus for converting an analog input value to a digital output code are provided. One embodiment of the apparatus includes a digital-to-analog converter, a comparator, and control logic circuitry. The digital-to-analog converter is configured to generate an analog reference value based on a received digital reference value. The comparator is configured to compare an analog input value to the analog reference value after expiration of an allotted settling time for the digital-to-analog converter and generate a comparison result indicative a relationship between the analog input value and the analog reference value. The control logic circuitry is configured to select the allotted settling time for the digital-to-analog converter based on a bit position of a digital output code to be determined, and update the bit position of the digital output code based on the comparison result.

18. 发明申请

US20150280731A1 SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTER 有权
标题翻译：随机逼近寄存器模拟数字转换器
公开(公告)号：US20150280731A1
公开(公告)日：2015-10-01
申请号：US14738143
申请日：2015-06-12
申请人： MaxLinear, Inc.
发明人： Kaveh Moazzami , Pawan Tiwari , Gaurav Chandra
IPC分类号： H03M1/46
CPC分类号： H03M1/1245 , H03M1/0836 , H03M1/12 , H03M1/46 , H03M1/468
摘要： Aspects of a method and apparatus for converting an analog input value to a digital output code are provided. One embodiment of the apparatus includes a digital-to-analog converter, a comparator, and control logic circuitry. The digital-to-analog converter is configured to generate an analog reference value based on a received digital reference value. The comparator is configured to compare an analog input value to the analog reference value after expiration of an allotted settling time for the digital-to-analog converter and generate a comparison result indicative a relationship between the analog input value and the analog reference value. The control logic circuitry is configured to select the allotted settling time for the digital-to-analog converter based on a bit position of a digital output code to be determined, and update the bit position of the digital output code based on the comparison result.
摘要翻译：提供了将模拟输入值转换为数字输出代码的方法和装置的方面。该装置的一个实施例包括数模转换器，比较器和控制逻辑电路。数模转换器被配置为基于接收的数字参考值产生模拟参考值。比较器被配置为在数/模转换器的分配的建立时间期满之后将模拟输入值与模拟参考值进行比较，并产生指示模拟输入值和模拟参考值之间的关系的比较结果。控制逻辑电路被配置为基于要确定的数字输出代码的位位置来选择数模转换器的分配建立时间，并且基于比较结果来更新数字输出代码的位位置。

19. 发明授权

US09083376B2 Successive approximation register analog-to-digital converter 有权
标题翻译：逐次逼近寄存器模数转换器
公开(公告)号：US09083376B2
公开(公告)日：2015-07-14
申请号：US14261870
申请日：2014-04-25
申请人： MaxLinear, Inc.
发明人： Kaveh Moazzami , Pawan Tiwari , Gaurav Chandra
IPC分类号： H03M1/12 , H03M1/46
CPC分类号： H03M1/1245 , H03M1/0836 , H03M1/12 , H03M1/46 , H03M1/468
摘要： Aspects of a method and apparatus for converting an analog input value to a digital output code are provided. One embodiment of the apparatus includes a digital-to-analog converter, a comparator, and control logic circuitry. The digital-to-analog converter is configured to generate an analog reference value based on a received digital reference value. The comparator is configured to compare an analog input value to the analog reference value after expiration of an allotted settling time for the digital-to-analog converter and generate a comparison result indicative a relationship between the analog input value and the analog reference value. The control logic circuitry is configured to select the allotted settling time for the digital-to-analog converter based on a bit position of a digital output code to be determined, and update the bit position of the digital output code based on the comparison result.
摘要翻译：提供了将模拟输入值转换为数字输出代码的方法和装置的方面。该装置的一个实施例包括数模转换器，比较器和控制逻辑电路。数模转换器被配置为基于接收的数字参考值产生模拟参考值。比较器被配置为在数/模转换器的分配的建立时间期满之后将模拟输入值与模拟参考值进行比较，并产生指示模拟输入值和模拟参考值之间的关系的比较结果。控制逻辑电路被配置为基于要确定的数字输出代码的位位置来选择数模转换器的分配建立时间，并且基于比较结果来更新数字输出代码的位位置。

20. 发明申请

US20140320328A1 SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTER 有权
标题翻译：随机逼近寄存器模拟数字转换器
公开(公告)号：US20140320328A1
公开(公告)日：2014-10-30
申请号：US14261870
申请日：2014-04-25
申请人： MaxLinear, Inc.
发明人： Kaveh Moazzami , Pawan Tiwari , Gaurav Chandra
IPC分类号： H03M1/46
CPC分类号： H03M1/1245 , H03M1/0836 , H03M1/12 , H03M1/46 , H03M1/468
摘要： Aspects of a method and apparatus for converting an analog input value to a digital output code are provided. One embodiment of the apparatus includes a digital-to-analog converter, a comparator, and control logic circuitry. The digital-to-analog converter is configured to generate an analog reference value based on a received digital reference value. The comparator is configured to compare an analog input value to the analog reference value after expiration of an allotted settling time for the digital-to-analog converter and generate a comparison result indicative a relationship between the analog input value and the analog reference value. The control logic circuitry is configured to select the allotted settling time for the digital-to-analog converter based on a bit position of a digital output code to be determined, and update the bit position of the digital output code based on the comparison result.
摘要翻译：提供了将模拟输入值转换为数字输出代码的方法和装置的方面。该装置的一个实施例包括数模转换器，比较器和控制逻辑电路。数模转换器被配置为基于接收的数字参考值产生模拟参考值。比较器被配置为在数/模转换器的分配的建立时间期满之后将模拟输入值与模拟参考值进行比较，并产生指示模拟输入值和模拟参考值之间的关系的比较结果。控制逻辑电路被配置为基于要确定的数字输出代码的位位置来选择数模转换器的分配建立时间，并且基于比较结果来更新数字输出代码的位位置。

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