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11. 外观设计

USD704608S1 Instrument panel 有权
公开(公告)号：USD704608S1
公开(公告)日：2014-05-13
申请号：US29425152
申请日：2012-06-20
申请人： Kiminori Kanda , Ai Okawa , Atsushi Narita , Mayumi Hirokawa
设计人： Kiminori Kanda , Ai Okawa , Atsushi Narita , Mayumi Hirokawa

12. 发明申请

US20080124706A1 Nucleic acid probe, nucleic acid chip, method for detecting target nucleic acid, method for screening drug, apparatus for detecting target nucleic acid, and, gene diagnosis method 审中-公开
标题翻译：核酸探针，核酸芯片，靶核酸检测方法，药物筛选方法，靶核酸检测装置，基因诊断方法
公开(公告)号：US20080124706A1
公开(公告)日：2008-05-29
申请号：US11384858
申请日：2006-03-21
申请人： Yasuhiro Aoyama , Shinsuke Sando , Toshinori Sasaki , Atsushi Narita
发明人： Yasuhiro Aoyama , Shinsuke Sando , Toshinori Sasaki , Atsushi Narita
IPC分类号： C12Q1/68 , C07H21/04 , C12M1/00
CPC分类号： C12Q1/683 , C12Q2525/301 , C12Q2525/161 , C12Q2521/337
摘要： The nucleic acid probe of the invention is a nucleic acid probe for detecting a trace amount of target nucleic acid highly sensitively, highly accurately, and highly quickly, and is designed so that the nucleic acid probe undergoes a conformational change after hybridization to the target nucleic acid and that the nucleic acid probe, which underwent the conformational change, has a decreased binding strength of hybridization and dissociates from the target nucleic acid, where the conformational change comprises forming a self-cleaving nucleic acid enzyme intramolecularly and the self-cleaving nucleic acid enzyme has cleavage activity toward a cleavage portion within the nucleic acid probe's own molecule.
摘要翻译：本发明的核酸探针是用于高灵敏度，高度精确和高度快速检测微量靶核酸的核酸探针，其设计使得核酸探针在与靶核酸杂交后经历构象变化并且经历构象变化的核酸探针具有降低的杂交结合强度并与靶核酸解离，其中构象变化包括分子内形成自切割核酸酶，并且自切割核酸酶对核酸探针自身分子内的切割部分具有切割活性。

13. 发明申请

US20050167089A1 Multi-tube heat exchanger 审中-公开
标题翻译：多管换热器
公开(公告)号：US20050167089A1
公开(公告)日：2005-08-04
申请号：US11048896
申请日：2005-02-03
申请人： Yoshihisa Ozeki , Atsushi Narita , Hidekazu Isogai , Ichiro Kunai , Rinzo Kayano , Sakio Inoue
发明人： Yoshihisa Ozeki , Atsushi Narita , Hidekazu Isogai , Ichiro Kunai , Rinzo Kayano , Sakio Inoue
IPC分类号： F28F9/02 , F28D7/16 , F28F9/013 , F28F9/22 , F28F9/24 , F28F9/00
CPC分类号： F28D7/16 , F28F9/22
摘要： The multi-tube heat exchanger includes a bundle of tubes which form fluid passages of first heat exchanging fluid, an outer shell which covers the bundle of tubes and form a fluid passage of second heat exchanging fluid, and a baffle plate which is arranged inside the outer shell in a direction intersecting an axial direction of the bundle of tubes and provided with a plurality of through holes through which respective tubes of the bundle are passed. Each of the through holes has such a shape that a portion of an outer peripheral face of the tube comes into contact with a portion of an inner peripheral face of the through hole, and a gap for passing the second heat exchanging fluid is formed between the other portion of the inner peripheral face and the outer peripheral face of the tube. It is possible to support the tubes with high dimensional accuracy, and to enhance heat exchanging efficiency by decreasing fluid resistance. It is also possible to make pitch of the through holes smaller and to make the heat exchanger compact.
摘要翻译：多管式热交换器包括形成第一热交换流体的流体通道的管束，覆盖管束并形成第二热交换流体的流体通道的外壳，以及布置在内部的挡板外壳沿与所述管束的轴向相交的方向设置有多个通孔，所述束的各个管通过所述通孔。每个通孔具有这样的形状：管的外周面的一部分与通孔的内周面的一部分接触，并且在第二热交换流体之间形成用于使第二热交换流体通过的间隙内周面的另一部分和管的外周面。可以以高尺寸精度支撑管，并通过降低流体阻力来提高热交换效率。也可以使贯通孔的间距变小，使热交换器紧凑化。

14. 发明授权

US06727905B1 Image data processing apparatus 有权
标题翻译：图像数据处理装置
公开(公告)号：US06727905B1
公开(公告)日：2004-04-27
申请号：US09638218
申请日：2000-08-14
申请人： Atsushi Narita
发明人： Atsushi Narita
IPC分类号： G06F1206
CPC分类号： G06T15/503 , G06T1/60
摘要： An image data processing apparatus capable of performing processing at a high speed comprising a DRAM for storing display data including a plurality of first pixel data respectively indicating colors of a plurality of pixels arranged in a matrix and able to be simultaneously written with a plurality of first pixel data. Memory controllers are provided with a plurality of pixel data generation circuits provided corresponding to the plurality of first pixel data to be simultaneously written for performing color blending using the second pixel data and the third pixel data for blending a color indicated by corresponding second pixel data and a color indicated by third pixel data stored in the write address by a predetermined blending ratio to generate a new color so as to generate the first pixel data indicating the new color.
摘要翻译：一种能够进行高速处理的图像数据处理装置，包括DRAM，用于存储显示数据，该显示数据包括分别表示以矩阵排列的多个像素的颜色的多个第一像素数据，并且能够同时写入多个第一像素数据。存储器控制器设置有与要同时写入的多个第一像素数据相对应地设置的多个像素数据生成电路，用于使用第二像素数据和第三像素数据混合由相应的第二像素数据指示的颜色，以及由存储在写地址中的预定混合比例的第三像素数据指示的颜色，以产生新颜色，以便产生指示新颜色的第一像素数据。

15. 发明授权

US5761304A Video signal format converting circuit 失效
标题翻译：视频信号格式转换电路
公开(公告)号：US5761304A
公开(公告)日：1998-06-02
申请号：US838358
申请日：1997-04-08
申请人： Yasuhide Mogi , Etsuro Yamauchi , Atsushi Narita
发明人： Yasuhide Mogi , Etsuro Yamauchi , Atsushi Narita
IPC分类号： G06F21/10 , H04N5/91 , H04N5/913 , H04N7/01 , H04N7/16 , H04N7/167 , H04N9/79 , H04N9/793 , H04N9/804 , H04N21/2347
CPC分类号： H04N7/0135 , H04N5/913 , H04N7/165 , H04N9/79 , H04N9/7925 , H04N9/804 , H04N2005/91314 , H04N2005/91321 , H04N2005/91371
摘要： A video signal format converting circuit is disclosed, comprising a signal converting matrix circuit and a filter circuit that is constructed of a time delaying device for a video signal corresponding to a standard television format. When a digital video signal corresponding to a first video signal format is converted into a second video signal format that is different from the first video signal format and then output, the time delaying device of the filter circuit is used as a delaying circuit. The output signal of the delaying circuit or the video signal corresponding to the standard television signal format is selectively output. While or after the video signal corresponding to the first video signal format is converted into the video signal corresponding to the second signal format, the video signal is modified so as to protect it from being copied.
摘要翻译：公开了一种视频信号格式转换电路，包括信号转换矩阵电路和由用于与标准电视格式对应的视频信号的延时装置构成的滤波器电路。当对应于第一视频信号格式的数字视频信号被转换成与第一视频信号格式不同的第二视频信号格式然后输出时，滤波器电路的延时装置被用作延迟电路。选择性地输出延迟电路的输出信号或对应于标准电视信号格式的视频信号。在对应于第一视频信号格式的视频信号被转换成对应于第二信号格式的视频信号之前或之后，修改视频信号以防止其被复制。

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