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1. 发明授权

US5761304A Video signal format converting circuit 失效
标题翻译：视频信号格式转换电路
公开(公告)号：US5761304A
公开(公告)日：1998-06-02
申请号：US838358
申请日：1997-04-08
申请人： Yasuhide Mogi , Etsuro Yamauchi , Atsushi Narita
发明人： Yasuhide Mogi , Etsuro Yamauchi , Atsushi Narita
IPC分类号： G06F21/10 , H04N5/91 , H04N5/913 , H04N7/01 , H04N7/16 , H04N7/167 , H04N9/79 , H04N9/793 , H04N9/804 , H04N21/2347
CPC分类号： H04N7/0135 , H04N5/913 , H04N7/165 , H04N9/79 , H04N9/7925 , H04N9/804 , H04N2005/91314 , H04N2005/91321 , H04N2005/91371
摘要： A video signal format converting circuit is disclosed, comprising a signal converting matrix circuit and a filter circuit that is constructed of a time delaying device for a video signal corresponding to a standard television format. When a digital video signal corresponding to a first video signal format is converted into a second video signal format that is different from the first video signal format and then output, the time delaying device of the filter circuit is used as a delaying circuit. The output signal of the delaying circuit or the video signal corresponding to the standard television signal format is selectively output. While or after the video signal corresponding to the first video signal format is converted into the video signal corresponding to the second signal format, the video signal is modified so as to protect it from being copied.
摘要翻译：公开了一种视频信号格式转换电路，包括信号转换矩阵电路和由用于与标准电视格式对应的视频信号的延时装置构成的滤波器电路。当对应于第一视频信号格式的数字视频信号被转换成与第一视频信号格式不同的第二视频信号格式然后输出时，滤波器电路的延时装置被用作延迟电路。选择性地输出延迟电路的输出信号或对应于标准电视信号格式的视频信号。在对应于第一视频信号格式的视频信号被转换成对应于第二信号格式的视频信号之前或之后，修改视频信号以防止其被复制。

2. 发明授权

US5657387A Video signal format converting circuit 失效
标题翻译：视频信号格式转换电路
公开(公告)号：US5657387A
公开(公告)日：1997-08-12
申请号：US545033
申请日：1995-10-19
申请人： Yasuhide Mogi , Etsuro Yamauchi , Atsushi Narita
发明人： Yasuhide Mogi , Etsuro Yamauchi , Atsushi Narita
IPC分类号： G06F21/10 , H04N5/91 , H04N5/913 , H04N7/01 , H04N7/16 , H04N7/167 , H04N9/79 , H04N9/793 , H04N9/804 , H04N21/2347
CPC分类号： H04N7/0135 , H04N5/913 , H04N7/165 , H04N9/79 , H04N9/7925 , H04N9/804 , H04N2005/91314 , H04N2005/91321 , H04N2005/91371
摘要： A video signal format converting circuit is disclosed, comprising a signal converting matrix circuit and a filter circuit that is constructed of a time delaying device for a video signal corresponding to a standard television format. When a digital video signal corresponding to a first video signal format is converted into a second video signal format that is different from the first video signal format and then output, the time delaying device of the filter circuit is used as a delaying circuit. The output signal of the delaying circuit or the video signal corresponding to the standard television signal format is selectively output. While or after the video signal corresponding to the first video signal format is converted into the video signal corresponding to the second signal format, the video signal is modified so as to protect it from being copied.
摘要翻译：公开了一种视频信号格式转换电路，包括信号转换矩阵电路和由用于与标准电视格式对应的视频信号的延时装置构成的滤波器电路。当对应于第一视频信号格式的数字视频信号被转换成与第一视频信号格式不同的第二视频信号格式然后输出时，滤波器电路的延时装置被用作延迟电路。选择性地输出延迟电路的输出信号或对应于标准电视信号格式的视频信号。在对应于第一视频信号格式的视频信号被转换成对应于第二信号格式的视频信号之前或之后，修改视频信号以防止其被复制。

3. 发明授权

US5668873A Video signal processor with copy prevention function 失效
标题翻译：视频信号处理器具有防复制功能
公开(公告)号：US5668873A
公开(公告)日：1997-09-16
申请号：US404998
申请日：1995-03-16
申请人： Etsuro Yamauchi
发明人： Etsuro Yamauchi
IPC分类号： H04N5/91 , G11B20/10 , H04N5/913 , H04N7/167
CPC分类号： H04N5/913 , H04N2005/91314 , H04N2005/91371
摘要： A video signal processor is capable of executing on/off control of a copy inhibiting process and rendering extremely difficult any illegal cancellation of the copy inhibiting process by a third person. This video signal processor includes an obstructor for obstructing proper recording of a video signal; a memory for storing a specific code inputted when enabling the obstructor, and also for storing a disable request code inputted in response to a request for disabling the obstructor; a judge device for judging the relationship between the value of the specific code and the value of the disable request code outputted from the memory; and a decider for deciding an operation to disable the obstructor in accordance with the output of the judge means. The memory has a plurality of registers, and at least one of the bit components of the specific code and the disable request code is stored dispersedly in the plural registers in the memory.
摘要翻译：视频信号处理器能够执行复制禁止处理的开/关控制，并且非常困难地由第三人非法取消复制禁止处理。该视频信号处理器包括用于阻止视频信号的正确记录的阻挡器; 存储器，用于存储在启用阻塞器时输入的特定代码，并且还用于存储响应于禁用阻塞器的请求而输入的禁用请求代码; 用于判断特定码的值与从存储器输出的禁用请求码的值之间的关系的判断装置; 以及用于根据判断装置的输出来决定禁用阻塞器的操作的判定器。存储器具有多个寄存器，并且特定代码的位组件和禁用请求代码中的至少一个分散地存储在存储器中的多个寄存器中。

4. 发明授权

US5805231A Phase synchronizing method and circuit 失效
标题翻译：相位同步方法和电路
公开(公告)号：US5805231A
公开(公告)日：1998-09-08
申请号：US750903
申请日：1996-12-19
申请人： Yasuhide Mogi , Etsuro Yamauchi
发明人： Yasuhide Mogi , Etsuro Yamauchi
IPC分类号： H03L7/06 , H03L7/085 , H03L7/093 , H03L7/099 , H04N5/073 , H04N9/45 , H04N5/06
CPC分类号： H04N5/073 , H03L7/085 , H03L7/093 , H03L7/0991 , H03L7/0994 , H04N5/0736 , H04N9/45
摘要： A digital sine wave signal is read form a memory storage of a phase synchronizing apparatus and is converted into an analog signal through a digital to analog converter. This converted analog sine wave is phase compared to an input analog sine wave supplied to an input terminal of the synchronization apparatus. The phase of the digital sine wave is synchronized with that of the input analog sine wave by controlling a read address signal of the memory storage based upon a detected phase error signal between the input analog sine wave and the converted analog sine wave. Thus, a desired digital signal synchronized with the phase of an input signal can be generated by a simple arrangement by digital processing.
摘要翻译： PCT No.PCT / JP96 / 01072 Sec。 371 1996年12月19日第 102（e）日期1996年12月19日PCT PCT 1996年4月19日PCT公布。出版物WO96 / 33557 日期1996年10月24日数字正弦波信号从相位同步装置的存储器存储器读取，并通过数模转换器转换为模拟信号。该转换的模拟正弦波与提供给同步装置的输入端的输入模拟正弦波进行相位比较。基于输入的模拟正弦波和转换的模拟正弦波之间的检测到的相位误差信号，通过控制存储器存储器的读取地址信号，数字正弦波的相位与输入的模拟正弦波的相位同步。因此，可以通过数字处理的简单布置来产生与输入信号的相位同步的期望的数字信号。

5. 发明授权

US5764764A Video signal format converting circuit 失效
公开(公告)号：US5764764A
公开(公告)日：1998-06-09
申请号：US835272
申请日：1997-04-08
申请人： Yasuhide Mogi , Etsuro Yamauchi , Atsushi Narita
发明人： Yasuhide Mogi , Etsuro Yamauchi , Atsushi Narita
IPC分类号： G06F21/10 , H04N5/91 , H04N5/913 , H04N7/01 , H04N7/16 , H04N7/167 , H04N9/79 , H04N9/793 , H04N9/804 , H04N21/2347
CPC分类号： H04N7/0135 , H04N5/913 , H04N7/165 , H04N9/79 , H04N9/7925 , H04N9/804 , H04N2005/91314 , H04N2005/91321 , H04N2005/91371
摘要： A video signal format converting circuit is disclosed, comprising a signal converting matrix circuit and a filter circuit that is constructed of a time delaying device for a video signal corresponding to a standard television format. When a digital video signal corresponding to a first video signal format is converted into a second video signal format that is different from the first video signal format and then output, the time delaying device of the filter circuit is used as a delaying circuit. The output signal of the delaying circuit or the video signal corresponding to the standard television signal format is selectively output. While or after the video signal corresponding to the first video signal format is converted into the video signal corresponding to the second signal format, the video signal is modified so as to protect it from being copied.

6. 发明授权

US5784118A Video signal phase synchronizing method, circuit and synthesizing apparatus 失效
标题翻译：视频信号相位同步方法，电路和合成装置
公开(公告)号：US5784118A
公开(公告)日：1998-07-21
申请号：US750902
申请日：1996-12-19
申请人： Etsuro Yamauchi , Yasuhide Mogi , Tokuya Fukuda
发明人： Etsuro Yamauchi , Yasuhide Mogi , Tokuya Fukuda
IPC分类号： H04N9/475 , H04N9/76 , H04N9/45
CPC分类号： H04N9/475 , H04N9/76
摘要： When a continuous wave signal synchronized with a first color subcarrier signal is generated by a color subcarrier extracting circuit, a phase error detecting circuit, an A/D converting circuit, and a digital oscillating circuit from an analog video signal containing a first color sub carrier signal supplied to a first input terminal and a digital video signal containing a color signal component supplied to a second input terminal is converted by a digital video signal converting circuit into a composite video signal containing a carrier chrominance signal, a color signal component is converted into a carrier chrominance signal by using the continuous wave signal and a phase of a first color subcarrier signal contained in the analog video signal and a phase of a second color subcarrier signal of a composite video signal formed from the digital video signal are synchronized with each other. According to this arrangement, a phase of the carrier chrominance signal of the analog video signal and a phase of a carrier chrominance signal contained in the composite video signal formed from the digital video signal can be synchronized with each other by the simple arrangement, for example, and hence an image expressed by the digital video signal and an image expressed by the analog video signal can be easily synthesized with each other.
摘要翻译： PCT No.PCT / JP96 / 01071 Sec。 371 1996年12月19日第 102（e）日期1996年12月19日PCT PCT 1996年4月19日PCT公布。第WO96 / 33577号公报日期1996年10月24日当由彩色副载波提取电路产生与第一彩色副载波信号同步的连续波信号时，从包含模拟视频信号的相位误差检测电路，A / D转换电路和数字振荡电路产生提供给第一输入端的第一颜色副载波信号和包含提供给第二输入端的彩色信号分量的数字视频信号由数字视频信号转换电路转换成包含载波色度信号的复合视频信号，颜色信号分量通过使用连续波信号和包含在模拟视频信号中的第一彩色副载波信号的相位和由数字视频信号形成的复合视频信号的第二彩色副载波信号的相位而被转换为载波色度信号彼此同步。根据这种配置，模拟视频信号的载波色度信号的相位和包含在由数字视频信号形成的复合视频信号中的载波色度信号的相位可以通过简单的布置彼此同步，例如，因此可以容易地合成由数字视频信号表示的图像和由模拟视频信号表示的图像。

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