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21. 发明授权

US08053827B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08053827B2
公开(公告)日：2011-11-08
申请号：US12926957
申请日：2010-12-20
申请人： Daisuke Matsushita , Yuuichiro Mitani
发明人： Daisuke Matsushita , Yuuichiro Mitani
IPC分类号： H01L29/66
CPC分类号： H01L29/518 , H01L21/28273 , H01L21/28282 , H01L21/3145 , H01L27/115 , H01L27/11517 , H01L27/11521 , H01L27/11568 , H01L29/4234 , H01L29/4916 , H01L29/513 , H01L29/78 , H01L29/788 , H01L29/792
摘要： It is made possible to provide a method for manufacturing a semiconductor device that has a high-quality insulating film in which defects are not easily formed, and experiences less leakage current. A method for manufacturing a semiconductor device, includes: forming an amorphous silicon layer on an insulating layer; introducing oxygen into the amorphous silicon layer; and forming a silicon oxynitride layer by nitriding the amorphous silicon layer having oxygen introduced thereinto.
摘要翻译：可以提供一种制造半导体器件的方法，该半导体器件具有不容易形成缺陷的高品质绝缘膜，并且经受较少的漏电流。一种制造半导体器件的方法，包括：在绝缘层上形成非晶硅层; 将氧引入非晶硅层; 以及通过氮化导入其中的氧的非晶硅层形成氮氧化硅层。

22. 发明申请

US20110003481A1 Method for manufacturing a semiconductor device 失效
标题翻译：半导体器件的制造方法
公开(公告)号：US20110003481A1
公开(公告)日：2011-01-06
申请号：US12801912
申请日：2010-07-01
申请人： Daisuke Matsushita , Koichi Muraoka , Koichi Kato , Yasushi Nakasaki , Yuichiro Mitani
发明人： Daisuke Matsushita , Koichi Muraoka , Koichi Kato , Yasushi Nakasaki , Yuichiro Mitani
IPC分类号： H01L21/314
CPC分类号： H01L27/11568 , C23C8/02 , C23C8/24 , C23C8/80 , H01L21/2652 , H01L21/28202 , H01L21/28238 , H01L21/28273 , H01L21/3144 , H01L21/3145 , H01L21/3185 , H01L27/115 , H01L27/11521 , H01L29/105 , H01L29/513
摘要： It is made possible to restrain generation of defects at the time of insulating film formation. A method for manufacturing a semiconductor device, includes: placing a semiconductor substrate into an atmosphere, thereby forming a nitride film on a surface of the semiconductor substrate, the atmosphere containing a first nitriding gas nitriding the surface of the semiconductor substrate and a first diluent gas not actually reacting with the semiconductor substrate, the ratio of the sum of the partial pressure of the first diluent gas and the partial pressure of the first nitriding gas to the partial pressure of the first nitriding gas being 5 or higher, and the total pressure of the atmosphere being 40 Torr or lower.
摘要翻译：可以抑制成膜时的缺陷的产生。一种制造半导体器件的方法，包括：将半导体衬底放置在大气中，从而在所述半导体衬底的表面上形成氮化物膜，所述气氛包含氮化所述半导体衬底的表面的第一氮化气体和第一稀释气体实际上不与半导体衬底反应，第一稀释气体的分压和第一氮化气体的分压与第一氮化气体的分压之和的比率为5以上，气氛为40乇或更低。

23. 发明授权

US07749919B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07749919B2
公开(公告)日：2010-07-06
申请号：US11896860
申请日：2007-09-06
申请人： Kiwamu Sakuma , Daisuke Matsushita , Koichi Kato , Yasushi Nakasaki , Izumi Hirano , Kouichi Muraoka , Yuichiro Mitani , Shigeto Fukatsu , Toshihide Ito
发明人： Kiwamu Sakuma , Daisuke Matsushita , Koichi Kato , Yasushi Nakasaki , Izumi Hirano , Kouichi Muraoka , Yuichiro Mitani , Shigeto Fukatsu , Toshihide Ito
IPC分类号： H01L21/321
CPC分类号： H01L21/28273
摘要： A semiconductor device includes: a semiconductor substrate; a source region and a drain region formed at a distance from each other in the semiconductor substrate; a first insulating film formed on a portion of the semiconductor substrate, the portion being located between the source region and the drain region; a charge storage film formed on the first insulating film; a second insulating film formed above the charge storage film and made of a high-permittivity material; a control gate electrode formed above the second insulating film; and a silicon nitride layer including nitrogen atoms having three-coordinate nitrogen bonds, at least one of second-nearest neighbor atoms of the nitrogen atoms being a nitrogen atom. At least one of the charge storage film and the control gate electrode contains silicon, the silicon nitride layer is located between the second insulating film and the at least one of the charge storage film and the control gate electrode.
摘要翻译：半导体器件包括：半导体衬底; 在半导体衬底中形成为彼此间隔一定距离的源极区域和漏极区域; 形成在半导体衬底的一部分上的第一绝缘膜，该部分位于源区和漏区之间; 形成在所述第一绝缘膜上的电荷存储膜; 形成在电荷存储膜上方并由高介电常数材料制成的第二绝缘膜; 形成在所述第二绝缘膜上方的控制栅电极; 和包含具有三配位氮键的氮原子的氮化硅层，氮原子的第二最近邻原子中的至少一个为氮原子。电荷存储膜和控制栅电极中的至少一个包含硅，氮化硅层位于第二绝缘膜和电荷存储膜和控制栅电极中的至少一个之间。

24. 发明授权

US07538013B2 Method of manufacturing a field effect transistor comprising an insulating film including metal oxide having crystallinity and different in a lattice distance from semiconductor substrate 有权
标题翻译：制造场效应晶体管的方法，该场效应晶体管包括具有结晶度并且与半导体衬底的晶格距离不同的金属氧化物的绝缘膜
公开(公告)号：US07538013B2
公开(公告)日：2009-05-26
申请号：US11472329
申请日：2006-06-22
申请人： Daisuke Matsushita , Yukie Nishikawa , Hideki Satake , Noburu Fukushima
发明人： Daisuke Matsushita , Yukie Nishikawa , Hideki Satake , Noburu Fukushima
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： H01L29/785 , H01L21/84 , H01L27/1203 , H01L29/66795 , H01L29/7842 , H01L29/78603 , H01L2924/0002 , H01L2924/00
摘要： There is provided a field effect transistor including: a first insulating film formed on a semiconductor substrate, and including at least a metal oxide having a crystallinity and different in a lattice distance of a crystal on an interface from the semiconductor substrate; a channel region formed above the first insulating film, and different in the lattice distance from the semiconductor substrate; a source region and a drain region formed above the first insulating film on side surfaces of the channel region, respectively; a second insulating film formed right above the channel region; a gate insulating film formed on a side surface of the channel region different from the side surfaces of the channel region on which the source region and the drain regions are formed; and a gate electrode formed through the gate insulating film on at least the side surface of the channel region different from the side surfaces of the channel region on which the source region and the drain region are formed.
摘要翻译：提供了一种场效应晶体管，包括：第一绝缘膜，形成在半导体衬底上，并且至少包括具有与半导体衬底的界面上的晶体的晶格距离不同的结晶度的金属氧化物; 形成在第一绝缘膜上方的沟道区，与半导体衬底的晶格距离不同; 源极区域和漏极区域，分别在沟道区域的侧表面上形成在第一绝缘膜的上方; 在通道区域正上方形成的第二绝缘膜; 形成在与形成有源极区域和漏极区域的沟道区域的侧面不同的沟道区域的侧面的栅极绝缘膜; 以及在与形成有源极区域和漏极区域的沟道区域的侧面不同的沟道区域的至少侧面上通过栅极绝缘膜形成的栅极电极。

25. 发明授权

US07091561B2 Field effect transistor and method of manufacturing the same 失效
标题翻译：场效应晶体管及其制造方法
公开(公告)号：US07091561B2
公开(公告)日：2006-08-15
申请号：US10863226
申请日：2004-06-09
申请人： Daisuke Matsushita , Yukie Nishikawa , Hideki Satake , Noburu Fukushima
发明人： Daisuke Matsushita , Yukie Nishikawa , Hideki Satake , Noburu Fukushima
IPC分类号： H01L27/01 , H01L27/12 , H01L31/0392
CPC分类号： H01L29/785 , H01L21/84 , H01L27/1203 , H01L29/66795 , H01L29/7842 , H01L29/78603 , H01L2924/0002 , H01L2924/00
摘要： There is provided a field effect transistor including: a first insulating film formed on a semiconductor substrate, and including at least a metal oxide having a crystallinity and different in a lattice distance of a crystal on an interface from the semiconductor substrate; a convex channel region formed above the first insulating film, and different in the lattice distance from the semiconductor substrate; a source region and a drain region formed above the first insulating film on side surfaces of the channel region, respectively; a second insulating film formed right above the channel region; a gate insulating film formed on a side surface of the channel region different from the side surfaces of the channel region on which the source region and the drain regions are formed; and a gate electrode formed through the gate insulating film on at least the side surface of the channel region different from the side surfaces of the channel region on which the source region and the drain region are formed.
摘要翻译：提供了一种场效应晶体管，包括：第一绝缘膜，形成在半导体衬底上，并且至少包括具有与半导体衬底的界面上的晶体的晶格距离不同的结晶度的金属氧化物; 形成在所述第一绝缘膜的上方的与所述半导体基板的晶格距离不同的凸状沟道区域; 源极区域和漏极区域，分别在沟道区域的侧表面上形成在第一绝缘膜的上方; 在通道区域正上方形成的第二绝缘膜; 形成在与形成有源极区域和漏极区域的沟道区域的侧面不同的沟道区域的侧面的栅极绝缘膜; 以及在与形成有源极区域和漏极区域的沟道区域的侧面不同的沟道区域的至少侧面上通过栅极绝缘膜形成的栅极电极。

26. 发明授权

US08779503B2 Nonvolatile semiconductor memory 失效
标题翻译：非易失性半导体存储器
公开(公告)号：US08779503B2
公开(公告)日：2014-07-15
申请号：US13424544
申请日：2012-03-20
申请人： Daisuke Matsushita , Akira Takashima
发明人： Daisuke Matsushita , Akira Takashima
IPC分类号： H01L29/792
CPC分类号： H01L21/28273 , H01L21/28282 , H01L21/764 , H01L27/11521 , H01L27/11568
摘要： According to one embodiment, a nonvolatile semiconductor memory includes a semiconductor layer, a first insulating layer on the semiconductor layer, a charge storage layer on the first insulating layer, a second insulating layer on the charge storage layer, and a control gate electrode on the second insulating layer. The second insulating layer comprises a stacked structure provided in order of a first lanthanum aluminate layer, a lanthanum aluminum silicate layer and a second lanthanum aluminate layer from the charge storage layer side to the control gate electrode side.
摘要翻译：根据一个实施例，非易失性半导体存储器包括半导体层，半导体层上的第一绝缘层，第一绝缘层上的电荷存储层，电荷存储层上的第二绝缘层，以及控制栅电极第二绝缘层。第二绝缘层包括按照从电荷存储层侧到控制栅电极侧的第一铝酸镧层，硅酸铝镧层和第二铝酸镧层的顺序提供的叠层结构。

27. 发明申请

US20130037776A1 VARIABLE RESISTANCE MEMORY 有权
标题翻译：可变电阻记忆
公开(公告)号：US20130037776A1
公开(公告)日：2013-02-14
申请号：US13425687
申请日：2012-03-21
申请人： Yoshifumi NISHI , Hidenori MIYAGAWA , Daisuke MATSUSHITA , Jun FUJIKI , Takeshi IMAMURA
发明人： Yoshifumi NISHI , Hidenori MIYAGAWA , Daisuke MATSUSHITA , Jun FUJIKI , Takeshi IMAMURA
IPC分类号： H01L45/00
CPC分类号： H01L45/085 , H01L27/2472 , H01L45/1233 , H01L45/1266 , H01L45/148 , H01L45/149
摘要： A variable resistance memory according to an embodiment includes: a first wiring; a second wiring intersecting with the first wiring; a first electrode provided in an intersection region between the first wiring and the second wiring, the first electrode being connected to the first wiring; a second electrode connected to the second wiring, the second electrode facing to the first electrode; a variable resistance layer provided between the first electrode and the second electrode; and one of a first insulating layer and a first semiconductor layer formed at side portions of the second electrode. The one of the first insulating layer and the first semiconductor layer, and the second electrode form voids at the side portions of the second electrode.
摘要翻译：根据实施例的可变电阻存储器包括：第一布线; 与第一布线相交的第二布线; 设置在所述第一布线和所述第二布线之间的交叉区域中的第一电极，所述第一电极连接到所述第一布线; 连接到第二布线的第二电极，第二电极面对第一电极; 设置在所述第一电极和所述第二电极之间的可变电阻层; 以及形成在第二电极的侧部的第一绝缘层和第一半导体层中的一个。第一绝缘层和第一半导体层中的一个，第二电极形状在第二电极的侧部空隙。

28. 发明申请

US20120292685A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120292685A1
公开(公告)日：2012-11-22
申请号：US13559770
申请日：2012-07-27
申请人： Daisuke Matsushita , Yuuichiro Mitani
发明人： Daisuke Matsushita , Yuuichiro Mitani
IPC分类号： H01L29/788 , H01L29/792
CPC分类号： H01L29/518 , H01L21/28273 , H01L21/28282 , H01L21/3145 , H01L27/115 , H01L27/11517 , H01L27/11521 , H01L27/11568 , H01L29/4234 , H01L29/4916 , H01L29/513 , H01L29/78 , H01L29/788 , H01L29/792
摘要： It is made possible to provide a method for manufacturing a semiconductor device that has a high-quality insulating film in which defects are not easily formed, and experiences less leakage current. A method for manufacturing a semiconductor device, includes: forming an amorphous silicon layer on an insulating layer; introducing oxygen into the amorphous silicon layer; and forming a silicon oxynitride layer by nitriding the amorphous silicon layer having oxygen introduced thereinto.
摘要翻译：可以提供一种制造半导体器件的方法，该半导体器件具有不容易形成缺陷的高品质绝缘膜，并且经受较少的漏电流。一种制造半导体器件的方法，包括：在绝缘层上形成非晶硅层; 将氧引入非晶硅层; 以及通过氮化导入其中的氧的非晶硅层形成氮氧化硅层。

29. 发明申请

US20120068159A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US20120068159A1
公开(公告)日：2012-03-22
申请号：US13070108
申请日：2011-03-23
申请人： Jun FUJIKI , Naoki Yasuda , Daisuke Matsushita
发明人： Jun FUJIKI , Naoki Yasuda , Daisuke Matsushita
IPC分类号： H01L29/08 , H01L29/792 , B82Y99/00
CPC分类号： H01L29/792 , G11C16/04 , G11C16/0466 , G11C16/0483 , H01L27/1157 , H01L27/11582 , H01L29/7926
摘要： According to one embodiment, a nonvolatile semiconductor memory device includes a first memory portion. The first memory portion includes a first base semiconductor layer, a first electrode, a first channel semiconductor layer, a first base tunnel insulating film, a first channel tunnel insulating, a first charge retention layer and a first block insulating film. The first channel semiconductor layer is provided between the first base semiconductor layer and the first electrode, and includes a first channel portion. The first base tunnel insulating film is provided between the first base semiconductor layer and the first channel semiconductor layer. The first channel tunnel insulating film is provided between the first electrode and the first channel portion. The first charge retention layer is provided between the first electrode and the first channel tunnel insulating film. The first block insulating film is provided between the first electrode and the first charge retention layer.
摘要翻译：根据一个实施例，非易失性半导体存储器件包括第一存储器部分。第一存储部分包括第一基极半导体层，第一电极，第一沟道半导体层，第一基极隧道绝缘膜，第一沟道隧道绝缘，第一电荷保持层和第一块绝缘膜。第一沟道半导体层设置在第一基底半导体层和第一电极之间，并且包括第一沟道部分。第一基极隧道绝缘膜设置在第一基极半导体层和第一沟道半导体层之间。第一通道隧道绝缘膜设置在第一电极和第一沟道部分之间。第一电荷保持层设置在第一电极和第一沟道隧道绝缘膜之间。第一块绝缘膜设置在第一电极和第一电荷保持层之间。

30. 发明申请

US20120018792A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20120018792A1
公开(公告)日：2012-01-26
申请号：US13146312
申请日：2010-01-21
申请人： Daisuke Matsushita , Ryuji Ohba , Yuichiro Mitani
发明人： Daisuke Matsushita , Ryuji Ohba , Yuichiro Mitani
IPC分类号： H01L29/788 , H01L21/28
CPC分类号： H01L27/11521 , G11C16/0466 , H01L27/11568 , H01L27/11578 , H01L27/11582 , H01L29/4234 , H01L29/792
摘要： A method of manufacturing a nonvolatile semiconductor memory device according to an embodiment, includes: forming a first insulating film on a semiconductor substrate; forming a charge trapping film on the first insulating film, the forming of the charge trapping film including; forming a first nitride layer on the first insulating film at a heat treatment temperature of 550° C. or higher, forming a first oxynitride layer on the first nitride layer by oxidizing a surface of the first nitride layer, and forming a second nitride layer on the first oxynitride layer; forming a second insulating film on the charge trapping film; and forming a control gate on the second insulating film.
摘要翻译：根据实施例的制造非易失性半导体存储器件的方法包括：在半导体衬底上形成第一绝缘膜; 在所述第一绝缘膜上形成电荷捕获膜，形成所述电荷俘获膜，包括：在550℃或更高的热处理温度下在第一绝缘膜上形成第一氮化物层，通过氧化第一氮化物层的表面，在第一氮化物层上形成第一氮氧化物层，并在第一氮化物层上形成第二氮化物层第一氧氮化物层; 在电荷捕获膜上形成第二绝缘膜; 以及在所述第二绝缘膜上形成控制栅极。

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