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1. 发明授权

US09040949B2 Information recording device and method of manufacturing the same 有权
标题翻译：信息记录装置及其制造方法
公开(公告)号：US09040949B2
公开(公告)日：2015-05-26
申请号：US13051636
申请日：2011-03-18
申请人： Yuichiro Mitani , Daisuke Matsushita , Shosuke Fujii
发明人： Yuichiro Mitani , Daisuke Matsushita , Shosuke Fujii
IPC分类号： H01L45/00 , G11C11/56 , H01L27/24
CPC分类号： H01L45/1641 , G11C11/56 , G11C11/5614 , G11C11/5664 , G11C11/5685 , G11C2213/33 , H01L27/2436 , H01L27/2463 , H01L45/085 , H01L45/1233
摘要： According to one embodiment, an information recording device includes first and second electrodes, a variable resistance layer between the first and second electrodes, and a control circuit which controls the variable resistance layer to n (n is a natural number except 1) kinds of resistance. The variable resistance layer comprises a material filled between the first and second electrodes, and particles arranged in a first direction from the first electrode to the second electrode in the material, and each of the particles has a resistance lower than that of the material. A resistance of the variable resistance layer is decided by a short between the first electrode and at least one of the particles.
摘要翻译：根据一个实施例，信息记录装置包括第一和第二电极，第一和第二电极之间的可变电阻层，以及将可变电阻层控制为n（n是除了1之外的自然数）的控制电路，。可变电阻层包括填充在第一和第二电极之间的材料，以及在材料中从第一电极到第二电极的第一方向排列的颗粒，并且每个颗粒的电阻都低于材料的电阻。可变电阻层的电阻由第一电极和至少一个颗粒之间的短路决定。

2. 发明申请

US20130056819A1 NONVOLATILE SEMICONDUCTOR MEMORY 失效
标题翻译：非易失性半导体存储器
公开(公告)号：US20130056819A1
公开(公告)日：2013-03-07
申请号：US13424544
申请日：2012-03-20
申请人： Daisuke MATSUSHITA , Akira Takashima
发明人： Daisuke MATSUSHITA , Akira Takashima
IPC分类号： H01L29/792 , H01L21/336
CPC分类号： H01L21/28273 , H01L21/28282 , H01L21/764 , H01L27/11521 , H01L27/11568
摘要： According to one embodiment, a nonvolatile semiconductor memory includes a semiconductor layer, a first insulating layer on the semiconductor layer, a charge storage layer on the first insulating layer, a second insulating layer on the charge storage layer, and a control gate electrode on the second insulating layer. The second insulating layer comprises a stacked structure provided in order of a first lanthanum aluminate layer, a lanthanum aluminum silicate layer and a second lanthanum aluminate layer from the charge storage layer side to the control gate electrode side.
摘要翻译：根据一个实施例，非易失性半导体存储器包括半导体层，半导体层上的第一绝缘层，第一绝缘层上的电荷存储层，电荷存储层上的第二绝缘层，以及控制栅电极第二绝缘层。第二绝缘层包括按照从电荷存储层侧到控制栅电极侧的第一铝酸镧层，硅酸铝镧层和第二铝酸镧层的顺序提供的叠层结构。

3. 发明申请

US20120319077A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 失效
标题翻译：非易失性半导体存储器件
公开(公告)号：US20120319077A1
公开(公告)日：2012-12-20
申请号：US13560557
申请日：2012-07-27
申请人： Naoki YASUDA , Daisuke MATSUSHITA , Koichi MURAOKA
发明人： Naoki YASUDA , Daisuke MATSUSHITA , Koichi MURAOKA
IPC分类号： H01L47/00
CPC分类号： H01L27/101 , H01L27/1021 , H01L27/2418 , H01L27/2481
摘要： According to one embodiment, a nonvolatile semiconductor memory device includes a plurality of first interconnections arranged parallel, a plurality of second interconnections arranged parallel to intersect the first interconnections, and memory cell portions respectively arranged at intersecting portions between the first and second interconnections and each configured by laminating a variable-resistance element and a diode element. The diode element has a laminated structure having a first insulating film, a conductive fine grain layer and a second insulating film. The physical film thickness of the second insulating film is greater than the first insulating film and the dielectric constant of the second insulating film is greater than the first insulating film.
摘要翻译：根据一个实施例，非易失性半导体存储器件包括平行布置的多个第一互连，并行布置成与第一互连相交的多个第二互连，以及分别布置在第一和第二互连之间的相交部分处的每个配置的存储单元部分通过层叠可变电阻元件和二极管元件。二极管元件具有具有第一绝缘膜，导电细晶粒层和第二绝缘膜的层叠结构。第二绝缘膜的物理膜厚度大于第一绝缘膜，并且第二绝缘膜的介电常数大于第一绝缘膜。

4. 发明申请

US20120319074A1 RESISTANCE CHANGE DEVICE AND MEMORY CELL ARRAY 有权
标题翻译：电阻变化器件和存储器单元阵列
公开(公告)号：US20120319074A1
公开(公告)日：2012-12-20
申请号：US13598305
申请日：2012-08-29
申请人： Shosuke FUJII , Daisuke Matsushita , Yuichiro Mitani
发明人： Shosuke FUJII , Daisuke Matsushita , Yuichiro Mitani
IPC分类号： H01L45/00
CPC分类号： H01L45/08 , G11C13/0007 , G11C2213/79 , H01L27/2409 , H01L27/2436 , H01L27/2463 , H01L45/085 , H01L45/1233 , H01L45/1253 , H01L45/1266 , H01L45/145
摘要： According to one embodiment, a resistance change device includes a first electrode including a metal, a second electrode, and an amorphous oxide layer including Si and O between the first and second electrode, the layer having a concentration gradient of O and a first peak thereof in a direction from the first electrode to the second electrode.
摘要翻译：根据一个实施例，电阻改变装置包括在第一和第二电极之间包括金属，第二电极和包括Si和O的无定形氧化物层的第一电极，具有浓度梯度为O的层和其第一峰值在从第一电极到第二电极的方向上。

5. 发明授权

US08211811B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08211811B2
公开(公告)日：2012-07-03
申请号：US12508234
申请日：2009-07-23
申请人： Daisuke Matsushita , Yuichiro Mitani
发明人： Daisuke Matsushita , Yuichiro Mitani
IPC分类号： H01L21/31
CPC分类号： H01L27/11568 , H01L21/28282 , H01L21/31612 , H01L21/3185 , H01L27/11578 , H01L27/11582 , H01L29/4234 , H01L29/66833 , H01L29/792 , H01L29/7926
摘要： A semiconductor device of an embodiment can prevent nitriding of the lower-layer insulating film and oxygen diffusion from the upper-layer insulating film, so as to minimize the decrease in charge capture density. This semiconductor device includes a semiconductor layer, a first insulating film provided on the semiconductor layer, a nitrogen-added amorphous silicon layer formed on the first insulating film, a first silicon nitride layer formed on the amorphous silicon layer, and a second insulating film formed above the first silicon nitride layer.
摘要翻译：实施例的半导体器件可以防止下层绝缘膜的氮化和上层绝缘膜的氧扩散，从而最小化电荷俘获密度的降低。该半导体器件包括半导体层，设置在半导体层上的第一绝缘膜，形成在第一绝缘膜上的氮附加非晶硅层，形成在非晶硅层上的第一氮化硅层和形成在第一绝缘膜上的第二绝缘膜在第一氮化硅层之上。

6. 发明申请

US20110241101A1 SEMICONDUCTOR MEMORY ELEMENT AND SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：半导体存储器元件和半导体存储器件
公开(公告)号：US20110241101A1
公开(公告)日：2011-10-06
申请号：US12880748
申请日：2010-09-13
申请人： Tsunehiro INO , Daisuke MATSUSHITA , Yasushi NAKASAKI , Masao SHINGU
发明人： Tsunehiro INO , Daisuke MATSUSHITA , Yasushi NAKASAKI , Masao SHINGU
IPC分类号： H01L29/792
CPC分类号： H01L21/28282 , B82Y10/00 , B82Y30/00 , H01L27/11578 , H01L27/11582 , H01L29/42348 , H01L29/7923 , H01L29/7926
摘要： According to one embodiment, a semiconductor memory element includes a semiconductor layer, a tunnel insulator provided on the semiconductor layer, a charge accumulation film provided on the tunnel insulator having a film thickness of 0.9 nm or more and 2.8 nm or less and the charge accumulation film containing cubic HfO2 particles, a block insulator provided on the charge accumulation film, and a control electrode provided on the block insulator.
摘要翻译：根据一个实施例，半导体存储元件包括半导体层，设置在半导体层上的隧道绝缘体，设置在隧道绝缘体上的电荷累积膜，其膜厚度为0.9nm以上且2.8nm以下，电荷积累含有立方HfO 2颗粒的膜，设置在电荷累积膜上的块绝缘体，以及设置在块绝缘体上的控制电极。

7. 发明申请

US20110240949A1 INFORMATION RECORDING DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：信息记录装置及其制造方法
公开(公告)号：US20110240949A1
公开(公告)日：2011-10-06
申请号：US13051636
申请日：2011-03-18
申请人： Yuichiro MITANI , Daisuke Matsushita , Shosuke Fujii
发明人： Yuichiro MITANI , Daisuke Matsushita , Shosuke Fujii
IPC分类号： H01L45/00
CPC分类号： H01L45/1641 , G11C11/56 , G11C11/5614 , G11C11/5664 , G11C11/5685 , G11C2213/33 , H01L27/2436 , H01L27/2463 , H01L45/085 , H01L45/1233
摘要： According to one embodiment, an information recording device includes first and second electrodes, a variable resistance layer between the first and second electrodes, and a control circuit which controls the variable resistance layer to n (n is a natural number except 1) kinds of resistance. The variable resistance layer comprises a material filled between the first and second electrodes, and particles arranged in a first direction from the first electrode to the second electrode in the material, and each of the particles has a resistance lower than that of the material. A resistance of the variable resistance layer is decided by a short between the first electrode and at least one of the particles.
摘要翻译：根据一个实施例，信息记录装置包括第一和第二电极，第一和第二电极之间的可变电阻层，以及将可变电阻层控制为n（n是除了1之外的自然数）的控制电路，。可变电阻层包括填充在第一和第二电极之间的材料，以及在材料中从第一电极到第二电极的第一方向排列的颗粒，并且每个颗粒的电阻都低于材料的电阻。可变电阻层的电阻由第一电极和至少一个颗粒之间的短路决定。

8. 发明授权

US07985650B2 Nonvolatile semiconductor memory device and method of manufacturing the same 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US07985650B2
公开(公告)日：2011-07-26
申请号：US12604950
申请日：2009-10-23
申请人： Yuichiro Mitani , Daisuke Matsushita
发明人： Yuichiro Mitani , Daisuke Matsushita
IPC分类号： H01L21/336 , H01L21/3205
CPC分类号： H01L21/28202 , H01L21/28273 , H01L29/513 , H01L29/518 , H01L29/66825 , H01L29/7885
摘要： A nonvolatile semiconductor memory device includes a floating gate electrode which is selectively formed on a main surface of a first conductivity type with a first gate insulating film interposed therebetween, a control gate electrode formed on the floating gate electrode with a second gate insulating film interposed therebetween, and source/drain regions of a second conductivity type which are formed in the main surface of the substrate in correspondence with the respective gate electrodes. The first gate electrode has a three-layer structure in which a silicon nitride film is held between silicon oxide films, and the silicon nitride film includes triple coordinate nitrogen bonds.
摘要翻译：非易失性半导体存储器件包括：浮置栅极，其选择性地形成在第一导电类型的主表面上，其间插入有第一栅极绝缘膜;控制栅电极，形成在浮置栅电极上，并具有介于其间的第二栅极绝缘膜，以及形成在与各个栅电极对应的基板的主表面中的第二导电类型的源极/漏极区域。第一栅电极具有氮化硅膜保持在氧化硅膜之间的三层结构，并且氮化硅膜包括三配位氮键。

9. 发明授权

US07863119B2 Semiconductor device and method for manufacturing the same 有权
公开(公告)号：US07863119B2
公开(公告)日：2011-01-04
申请号：US12200467
申请日：2008-08-28
申请人： Daisuke Matsushita , Yuuichiro Mitani
发明人： Daisuke Matsushita , Yuuichiro Mitani
IPC分类号： H01L21/00
CPC分类号： H01L29/518 , H01L21/28273 , H01L21/28282 , H01L21/3145 , H01L27/115 , H01L27/11517 , H01L27/11521 , H01L27/11568 , H01L29/4234 , H01L29/4916 , H01L29/513 , H01L29/78 , H01L29/788 , H01L29/792
摘要： It is made possible to provide a method for manufacturing a semiconductor device that has a high-quality insulating film in which defects are not easily formed, and experiences less leakage current. A method for manufacturing a semiconductor device, includes: forming an amorphous silicon layer on an insulating layer; introducing oxygen into the amorphous silicon layer; and forming a silicon oxynitride layer by nitriding the amorphous silicon layer having oxygen introduced thereinto.

10. 发明授权

US07816215B2 Semiconductor device manufacturing method 失效
标题翻译：半导体器件制造方法
公开(公告)号：US07816215B2
公开(公告)日：2010-10-19
申请号：US10941814
申请日：2004-09-16
申请人： Daisuke Matsushita , Koichi Muraoka , Seiji Inumiya , Koichi Kato , Kazuhiro Eguchi , Mariko Takayanagi , Yasushi Nakasaki
发明人： Daisuke Matsushita , Koichi Muraoka , Seiji Inumiya , Koichi Kato , Kazuhiro Eguchi , Mariko Takayanagi , Yasushi Nakasaki
IPC分类号： H01L21/336
CPC分类号： H01L21/28202 , H01L21/022 , H01L21/02329 , H01L21/0234 , H01L21/3144 , H01L29/513 , H01L29/518
摘要： A semiconductor device manufacturing method comprises: forming a gate insulative film on a semiconductor substrate by: forming a first nitride film on the substrate; forming a first oxide film and a second oxide film, the first oxide film being between the substrate and the first nitride film, the second oxide film being on the first nitride film; and nitriding the second oxide film to form, on the first nitride film, one of either: a second nitride film or an SiON film; and forming a gate electrode on the gate insulative film; wherein the equivalent oxide thickness of the gate insulative film is equal to or less than 1 nm.
摘要翻译：一种半导体器件制造方法，包括：在半导体衬底上形成栅极绝缘膜，方法是在衬底上形成第一氮化物膜; 形成第一氧化物膜和第二氧化物膜，所述第一氧化膜位于所述衬底和所述第一氮化物膜之间，所述第二氧化物膜位于所述第一氮化物膜上; 并且对所述第二氧化物膜进行氮化以在所述第一氮化物膜上形成以下之一：第二氮化物膜或SiON膜; 并在所述栅极绝缘膜上形成栅电极; 其中所述栅绝缘膜的等效氧化物厚度等于或小于1nm。

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