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    • 21. 发明授权
    • Replenishing data descriptors in a DMA injection FIFO buffer
    • 在DMA注入FIFO缓冲区中补充数据描述符
    • US08037213B2
    • 2011-10-11
    • US11755501
    • 2007-05-30
    • Charles J. ArcherMichael A. BlocksomeBob R. CernohousPhilip HeidelbergerSameer KumarJeffrey J. Parker
    • Charles J. ArcherMichael A. BlocksomeBob R. CernohousPhilip HeidelbergerSameer KumarJeffrey J. Parker
    • G06F3/00H04L12/28
    • G06F13/28
    • Methods, apparatus, and products are disclosed for replenishing data descriptors in a Direct Memory Access (‘DMA’) injection first-in-first-out (‘FIFO’) buffer that include: determining, by a messaging module on an origin compute node, whether a number of data descriptors in a DMA injection FIFO buffer exceeds a predetermined threshold, each data descriptor specifying an application message for transmission to a target compute node; queuing, by the messaging module, a plurality of new data descriptors in a pending descriptor queue if the number of the data descriptors in the DMA injection FIFO buffer exceeds the predetermined threshold; establishing, by the messaging module, interrupt criteria that specify when to replenish the injection FIFO buffer with the plurality of new data descriptors in the pending descriptor queue; and injecting, by the messaging module, the plurality of new data descriptors into the injection FIFO buffer in dependence upon the interrupt criteria.
    • 公开了用于在直接存储器访问(“DMA”)注入先进先出('FIFO')缓冲器中补充数据描述符的方法,装置和产品,其包括:由原始计算节点 无论DMA注入FIFO缓冲器中的多个数据描述符是否超过预定阈值,每个数据描述符指定用于传输到目标计算节点的应用消息; 如果DMA注入FIFO缓冲器中的数据描述符的数量超过预定阈值,则由消息接发模块排队等待描述符队列中的多个新数据描述符; 由所述消息传递模块建立中断标准,所述中断标准指定何时用所述待处理描述符队列中的所述多个新数据描述符补充所述注入FIFO缓冲器; 以及根据所述中断标准,由所述消息收发模块将所述多个新数据描述符注入到所述注入FIFO缓冲器中。
    • 23. 发明授权
    • Line-plane broadcasting in a data communications network of a parallel computer
    • 并行计算机的数据通信网络中的线路平面广播
    • US07734706B2
    • 2010-06-08
    • US11843090
    • 2007-08-22
    • Charles J. ArcherJeremy E. BergMichael A. BlocksomeBrian E. Smith
    • Charles J. ArcherJeremy E. BergMichael A. BlocksomeBrian E. Smith
    • G06F15/16
    • G06F15/173
    • Methods, apparatus, and products are disclosed for line-plane broadcasting in a data communications network of a parallel computer, the parallel computer comprising a plurality of compute nodes connected together through the network, the network optimized for point to point data communications and characterized by at least a first dimension, a second dimension, and a third dimension, that include: initiating, by a broadcasting compute node, a broadcast operation, including sending a message to all of the compute nodes along an axis of the first dimension for the network; sending, by each compute node along the axis of the first dimension, the message to all of the compute nodes along an axis of the second dimension for the network; and sending, by each compute node along the axis of the second dimension, the message to all of the compute nodes along an axis of the third dimension for the network.
    • 公开了用于并行计算机的数据通信网络中的线路平面广播的方法,装置和产品,并行计算机包括通过网络连接在一起的多个计算节点,针对点对点数据通信而优化的网络, 至少第一维度,第二维度和第三维度,其包括:由广播计算节点发起广播操作,包括沿着网络的第一维度的轴向所有计算节点发送消息 ; 每个计算节点沿着第一维度的轴沿着网络的第二维度的轴向所有计算节点发送消息; 以及沿着所述第二维度的轴的每个计算节点沿着所述网络的所述第三维度的轴向所述计算节点发送所述消息。
    • 30. 发明申请
    • Low Latency, High Bandwidth Data Communications Between Compute Nodes in a Parallel Computer
    • 并行计算机中计算节点之间的低延迟,高带宽数据通信
    • US20090019190A1
    • 2009-01-15
    • US11776718
    • 2007-07-12
    • Michael A. Blocksome
    • Michael A. Blocksome
    • G06F13/28G06F13/18
    • G06F13/36G06F9/546
    • Methods, systems, and products are disclosed for data transfers between nodes in a parallel computer that include: receiving, by an origin DMA on an origin node, a buffer identifier for a buffer containing data for transfer to a target node; sending, by the origin DMA to the target node, a RTS message; transferring, by the origin DMA, a data portion to the target node using a memory FIFO operation that specifies one end of the buffer from which to begin transferring the data; receiving, by the origin DMA, an acknowledgement of the RTS message from the target node; and transferring, by the origin DMA in response to receiving the acknowledgement, any remaining data portion to the target node using a direct put operation that specifies the other end of the buffer from which to begin transferring the data, including initiating the direct put operation without invoking an origin processing core.
    • 公开了用于并行计算机中的节点之间的数据传输的方法,系统和产品,其包括:通过源节点上的原始DMA接收包含用于传送到目标节点的数据的缓冲器的缓冲器标识符; 通过原点DMA向目标节点发送RTS消息; 使用存储器FIFO操作将由原始DMA传送到目标节点的数据部分,该存储器FIFO操作指定从其开始传送数据的缓冲器的一端; 由原始DMA接收来自目标节点的RTS消息的确认; 并且通过原点DMA响应于接收到确认将任何剩余数据部分转移到目标节点,该直接放置操作指定从其开始传送数据的缓冲器的另一端,包括启动直接放置操作而没有 调用原始处理核心。