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21. 发明授权

US08000670B2 Removing close-in interferers through a feedback loop 有权
标题翻译：通过反馈回路消除紧密的干扰源
公开(公告)号：US08000670B2
公开(公告)日：2011-08-16
申请号：US11339386
申请日：2006-01-25
申请人： Robert B. Staszewski , Khurram Muhammad , Dirk Leipold
发明人： Robert B. Staszewski , Khurram Muhammad , Dirk Leipold
IPC分类号： H04B1/06
CPC分类号： H04B1/28 , H04B1/1036
摘要： System and method for elimination of close-in interferers through feedback. A preferred embodiment comprises an interferer predictor (for example, interferer predictor 840) coupled to a digital output of a direct RF radio receiver (for example, radio receiver 800). The interferer predictor predicts the presence of interferers and feeds the information back to a sampling unit (for example, sampling unit 805) through a feedback circuit (for example, feedback unit 845) through the use of charge sharing. The interferers are then eliminated in the sampling unit. Additionally, the number and placement of zeroes in a filter in the sampling unit is increased and changed through the implementation of arbitrary-coefficient finite impulse response filters.
摘要翻译：通过反馈消除接近干扰的系统和方法。优选实施例包括耦合到直接RF无线电接收机（例如，无线电接收机800）的数字输出的干扰源预测器（例如，干扰源预测器840）。干扰源预测器预测干扰源的存在，并且通过使用电荷共享通过反馈电路（例如，反馈单元845）将信息反馈给采样单元（例如，采样单元805）。然后在采样单元中消除干扰源。另外，通过执行任意系数有限脉冲响应滤波器来增加和改变采样单元滤波器中的零数和位置。

22. 发明授权

US07822389B2 Methods and apparatus to provide an auxiliary receive path to support transmitter functions 有权
标题翻译：提供辅助接收路径以支持发射机功能的方法和装置
公开(公告)号：US07822389B2
公开(公告)日：2010-10-26
申请号：US11595101
申请日：2006-11-09
申请人： Khurram Muhammad , Dirk Leipold
发明人： Khurram Muhammad , Dirk Leipold
IPC分类号： H04B1/44
CPC分类号： H04B1/52
摘要： Methods and apparatus to provide an auxiliary receive path to support transmitter functions are disclosed. An example transceiver includes an antenna and a duplexer coupled to the antenna. A transmitter is coupled to the duplexer to output a transmit signal at a transmit frequency. A receiver is coupled to the duplexer to receive a received signal at a receiver frequency. A signal processor is coupled to the transmitter and receiver. An auxiliary receiver is communicatively coupled to the signal processor to receive the transmit signal output from the transmitter and send an auxiliary receiver signal to the signal processor. The signal processor adjusts the transmit signal based on the auxiliary receiver signal.
摘要翻译：公开了提供辅助接收路径以支持发射机功能的方法和装置。示例收发器包括耦合到天线的天线和双工器。发射机耦合到双工器以以发射频率输出发射信号。接收机耦合到双工器以在接收机频率处接收接收的信号。信号处理器耦合到发射机和接收机。辅助接收器通信地耦合到信号处理器以接收从发射机输出的发射信号，并向辅助接收机信号发送信号处理器。信号处理器根据辅助接收机信号调整发射信号。

23. 发明授权

US07791407B2 Technique for improving antialiasing and adjacent channel interference filtering using cascaded passive IIR filter stages combined with direct sampling and mixing 有权
标题翻译：使用级联无源IIR滤波器级与直接采样和混合相结合的改进抗混叠和相邻信道干扰滤波的技术
公开(公告)号：US07791407B2
公开(公告)日：2010-09-07
申请号：US11388558
申请日：2006-03-24
申请人： Khurram Muhammad , Robert B. Staszewski , Dirk Leipold
发明人： Khurram Muhammad , Robert B. Staszewski , Dirk Leipold
IPC分类号： H03K5/00
CPC分类号： H04B1/109 , H03H19/004
摘要： A technique of improving antialiasing and adjacent channel interference filtering uses cascaded passive IIR filter stages combined with direct sampling and mixing. The methodology and related architecture allows for increased passive IIR filtering without necessitating use of amplifier stages.
摘要翻译：改进抗混叠和相邻信道干扰滤波的技术使用级联无源IIR滤波器级与直接采样和混合相结合。该方法和相关架构允许增加无源IIR滤波，而不需要使用放大器级。

24. 发明授权

US07382200B2 Type-II all-digital phase-locked loop (PLL) 有权
标题翻译： II型全数字锁相环（PLL）
公开(公告)号：US07382200B2
公开(公告)日：2008-06-03
申请号：US11464420
申请日：2006-08-14
申请人： Robert B. Staszewski , Dirk Leipold , Khurram Muhammad
发明人： Robert B. Staszewski , Dirk Leipold , Khurram Muhammad
IPC分类号： H03L7/00
CPC分类号： H03L7/1075 , H03F1/0211 , H03F1/3282 , H03L7/093 , H03L7/0991 , H03L7/107 , H03L2207/50
摘要： System and method for providing type-II (and higher order) phase-locked loops (PLLs) with a fast signal acquisition mode. A preferred embodiment comprises a loop filter with a proportional loop gain path (proportional loop gain circuit 1115) and an integral loop gain block (integral loop gain block 1120). The proportional loop gain path is used during signal acquisition to provide large loop bandwidth, hence fast signal acquisition of a desired signal. Then, during the PLL's signal tracking phase, the integral loop gain block is enabled and its output is combined with output from the proportional loop gain path to provide higher order filtering of the desired signal. An offset that may be present due to the use of the proportional loop gain path can be measured and subtracted to help improve signal tracking settling times.
摘要翻译：用于提供具有快速信号采集模式的II型（和更高阶）锁相环（PLL）的系统和方法。优选实施例包括具有比例环路增益路径（比例环路增益电路1115）和积分环路增益模块（积分环路增益模块1120）的环路滤波器。在信号采集期间使用比例环路增益路径来提供较大的环路带宽，从而快速获取所需信号的信号。然后，在PLL的信号跟踪阶段期间，使用积分环路增益模块，并将其输出与比例环路增益路径的输出相结合，以提供所需信号的高阶滤波。可以测量和减去由于使用比例环路增益路径而可能存在的偏移量，以帮助改善信号跟踪稳定时间。

25. 发明授权

US07218904B2 Removing close-in interferers through a feedback loop 有权
标题翻译：通过反馈回路消除紧密的干扰源
公开(公告)号：US07218904B2
公开(公告)日：2007-05-15
申请号：US10280156
申请日：2002-10-25
申请人： Robert B. Staszewski , Khurram Muhammad , Dirk Leipold
发明人： Robert B. Staszewski , Khurram Muhammad , Dirk Leipold
IPC分类号： H04B1/06 , H03F1/26
CPC分类号： H04B1/28 , H04B1/1036
摘要： System and method for elimination of close-in interferers through feedback. A preferred embodiment comprises an interferer predictor (for example, interferer predictor 840) coupled to a digital output of a direct RF radio receiver (for example, radio receiver 800). The interferer predictor predicts the presence of interferers and feeds the information back to a sampling unit (for example, sampling unit 805) through a feedback circuit (for example, feedback unit 845) through the use of charge sharing. The interferers are then eliminated in the sampling unit. Additionally, the number and placement of zeroes in a filter in the sampling unit is increased and changed through the implementation of arbitrary-coefficient finite impulse response filters.
摘要翻译：通过反馈消除接近干扰的系统和方法。优选实施例包括耦合到直接RF无线电接收机（例如，无线电接收机800）的数字输出的干扰源预测器（例如，干扰源预测器840）。干扰源预测器预测干扰源的存在，并且通过使用电荷共享通过反馈电路（例如，反馈单元845）将信息反馈给采样单元（例如，采样单元805）。然后在采样单元中消除干扰源。另外，通过执行任意系数有限脉冲响应滤波器来增加和改变采样单元滤波器中的零数和位置。

26. 发明申请

US20060164160A1 Technique for improving antialiasing and adjacent channel interference filtering using cascaded passive IIR filter stages combined with direct sampling and mixing 有权
标题翻译：使用级联无源IIR滤波器级与直接采样和混合相结合的改进抗混叠和相邻信道干扰滤波的技术
公开(公告)号：US20060164160A1
公开(公告)日：2006-07-27
申请号：US11388558
申请日：2006-03-24
申请人： Khurram Muhammad , Robert Staszewski , Dirk Leipold
发明人： Khurram Muhammad , Robert Staszewski , Dirk Leipold
IPC分类号： H03K5/00
CPC分类号： H04B1/109 , H03H19/004
摘要： A technique of improving antialiasing and adjacent channel interference filtering uses cascaded passive IIR filter stages combined with direct sampling and mixing. The methodology and related architecture allows for increased passive IIR filtering without necessitating use of amplifier stages.
摘要翻译：改进抗混叠和相邻信道干扰滤波的技术使用级联无源IIR滤波器级与直接采样和混合相结合。该方法和相关架构允许增加无源IIR滤波，而不需要使用放大器级。

27. 发明授权

US08060027B2 RF transmission leakage mitigator, method of mitigating an RF transmission leakage and CDMA transceiver employing the same 有权
标题翻译： RF传输泄漏缓冲器，减轻RF传输泄漏的方法和使用其的CDMA收发器
公开(公告)号：US08060027B2
公开(公告)日：2011-11-15
申请号：US12721930
申请日：2010-03-11
申请人： Khurram Muhammad , Dirk Leipold
发明人： Khurram Muhammad , Dirk Leipold
IPC分类号： H04B1/38
CPC分类号： H03C5/00 , H04B1/525 , H04B1/707
摘要： The present invention provides an RF transmission leakage mitigator for use with a full-duplex, wireless transceiver. In one embodiment, the RF transmission leakage mitigator includes an inversion generator configured to provide an RF transmission inversion signal of an interfering transceiver RF transmission to a receiving portion of the transceiver thereby creating a residual leakage signal. Additionally, the RF transmission leakage mitigator also includes a residual processor coupled to the inversion generator and configured to adjust the RF transmission inversion signal of the interfering transceiver RF transmission based on reducing the residual leakage signal to a specified level.
摘要翻译：本发明提供了一种与全双工无线收发器一起使用的RF传输泄漏缓解器。在一个实施例中，RF传输泄漏减轻器包括反相发生器，其被配置为将干扰收发器RF传输的RF发射反转信号提供给收发器的接收部分，从而产生残余泄漏信号。此外，RF传输泄漏缓解器还包括耦合到反向发生器并被配置为基于将剩余泄漏信号减小到指定电平来调整干扰收发器RF传输的RF发射反转信号的残余处理器。

28. 发明申请

US20060290435A1 Type-II All-Digital Phase-Locked Loop (PLL) 有权
标题翻译： II型全数字锁相环（PLL）
公开(公告)号：US20060290435A1
公开(公告)日：2006-12-28
申请号：US11464420
申请日：2006-08-14
申请人： Robert Staszewski , Dirk Leipold , Khurram Muhammad
发明人： Robert Staszewski , Dirk Leipold , Khurram Muhammad
IPC分类号： H03L7/00
CPC分类号： H03L7/1075 , H03F1/0211 , H03F1/3282 , H03L7/093 , H03L7/0991 , H03L7/107 , H03L2207/50
摘要： System and method for providing type-II (and higher order) phase-locked loops (PLLs) with a fast signal acquisition mode. A preferred embodiment comprises a loop filter with a proportional loop gain path (proportional loop gain circuit 1115) and an integral loop gain block (integral loop gain block 1120). The proportional loop gain path is used during signal acquisition to provide large loop bandwidth, hence fast signal acquisition of a desired signal. Then, during the PLL's signal tracking phase, the integral loop gain block is enabled and its output is combined with output from the proportional loop gain path to provide higher order filtering of the desired signal. An offset that may be present due to the use of the proportional loop gain path can be measured and subtracted to help improve signal tracking settling times.
摘要翻译：用于提供具有快速信号采集模式的II型（和更高阶）锁相环（PLL）的系统和方法。优选实施例包括具有比例环路增益路径（比例环路增益电路1115）和积分环路增益模块（积分环路增益模块1120）的环路滤波器。在信号采集期间使用比例环路增益路径来提供较大的环路带宽，从而快速获取所需信号的信号。然后，在PLL的信号跟踪阶段期间，使用积分环路增益模块，并将其输出与比例环路增益路径的输出相结合，以提供所需信号的高阶滤波。可以测量和减去由于使用比例环路增益路径而可能存在的偏移量，以帮助改善信号跟踪稳定时间。

29. 发明授权

US07145399B2 Type-II all-digital phase-locked loop (PLL) 有权
标题翻译： II型全数字锁相环（PLL）
公开(公告)号：US07145399B2
公开(公告)日：2006-12-05
申请号：US10464957
申请日：2003-06-19
申请人： Robert B. Staszewski , Dirk Leipold , Khurram Muhammad
发明人： Robert B. Staszewski , Dirk Leipold , Khurram Muhammad
IPC分类号： H03D3/24
CPC分类号： H03L7/1075 , H03F1/0211 , H03F1/3282 , H03L7/093 , H03L7/0991 , H03L7/107 , H03L2207/50
摘要： System and method for providing type-II (and higher order) phase-locked loops (PLLs) with a fast signal acquisition mode. A preferred embodiment comprises a loop filter with a proportional loop gain path (proportional loop gain circuit 1115) and an integral loop gain block (integral loop gain block 1120). The proportional loop gain path is used during signal acquisition to provide large loop bandwidth, hence fast signal acquisition of a desired signal. Then, during the PLL's signal tracking phase, the integral loop gain block is enabled and its output is combined with output from the proportional loop gain path to provide higher order filtering of the desired signal. An offset that may be present due to the use of the proportional loop gain path can be measured and subtracted to help improve signal tracking settling times.
摘要翻译：用于提供具有快速信号采集模式的II型（和更高阶）锁相环（PLL）的系统和方法。优选实施例包括具有比例环路增益路径（比例环路增益电路1115）和积分环路增益模块（积分环路增益模块1120）的环路滤波器。在信号采集期间使用比例环路增益路径来提供较大的环路带宽，从而快速获取所需信号的信号。然后，在PLL的信号跟踪阶段期间，使用积分环路增益模块，并将其输出与比例环路增益路径的输出相结合，以提供所需信号的高阶滤波。可以测量和减去由于使用比例环路增益路径而可能存在的偏移量，以帮助改善信号跟踪稳定时间。

30. 发明授权

US07003276B2 Subsampling communication receiver architecture with gain control and RSSI generation 有权
标题翻译：采样增益控制和RSSI生成的通信接收机架构
公开(公告)号：US07003276B2
公开(公告)日：2006-02-21
申请号：US10132025
申请日：2002-04-25
申请人： Khurram Muhammad , Dirk Leipold , Kenneth J. Maggio
发明人： Khurram Muhammad , Dirk Leipold , Kenneth J. Maggio
IPC分类号： H04B1/26
CPC分类号： H04B1/0025 , H03H15/00 , H03H19/004 , H04B1/0003 , H04B1/28 , H04L27/24
摘要： A first periodic voltage waveform (20) is downconverted into a second periodic voltage waveform (35, 36). A plurality of temporally distinct samples (SA1, SA2, . . . ) respectively indicative of areas under corresponding fractional-cycles of the first voltage waveform are obtained. The samples are combined to produce the second voltage waveform. The samples can be manipulated to provide gain adjustment to the second voltage waveform. The samples are obtained by charging a sampling capacitance in response to a current waveform that corresponds to the first voltage waveform. The use of different sampling capacitances during respective predetermined time intervals permits the signal strength of the first waveform to be determined from observation of the second waveform.
摘要翻译：第一周期性电压波形（20）被下变频成第二周期性电压波形（35,36）。获得分别表示第一电压波形的相应分数周期下的面积的多个时间上不同的样本（SA 1，SA 2 ...）。将样品组合以产生第二电压波形。可以操作样品以对第二电压波形提供增益调整。通过响应于对应于第一电压波形的电流波形对采样电容进行充电来获得样本。在各个预定时间间隔期间使用不同的采样电容允许通过观察第二波形来确定第一波形的信号强度。

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