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21. 发明授权

US09641376B2 Receiver and receiving method for hierarchical modulation in single frequency networks 有权
公开(公告)号：US09641376B2
公开(公告)日：2017-05-02
申请号：US14822455
申请日：2015-08-10
申请人： SONY CORPORATION
发明人： Samuel Asangbeng Atungsiri , Matthew Paul Taylor , Obioma Okehie
IPC分类号： H03H7/30 , H04L27/26 , H04L27/01 , H04L5/00 , H04L27/34
CPC分类号： H04L27/2649 , H04L5/0007 , H04L27/01 , H04L27/2627 , H04L27/3488
摘要： A receiver recovers local service data symbols from first Orthogonal Frequency Division Multiplexed (OFDM) symbols in the presence of second OFDM symbols, the second OFDM symbols carry national broadcast data symbols and modulated on to the sub-carriers of the second OFDM symbols using a first modulation scheme, and the first OFDM symbols carry the national broadcast data symbols and the local service data symbols from a local insertion pipe and modulated on to the sub-carriers of the first OFDM symbols using a second modulation scheme. The receiver comprises an OFDM detector which includes an equalizer for recovering local service modulated sub-carriers of the second modulation scheme by generating an estimate of a combined channel ([Hn(z)+Hl(z)]) via which the first and second OFDM symbols have passed using the pilot sub-carrier symbols of the first and second OFDM symbols; generating an estimate of national broadcast modulation symbols from the modulated data bearing sub-carriers of the first modulation scheme from the second OFDM symbols (Ŝ(z)); generating an estimate of a convolution of the combined channel and the national broadcast modulation symbols (Ŝ(z)[Hn(z)+Hl(z)]); generating an estimate of a component of the received base band signal representing the local service modulation symbols of the first OFDM symbol; generating an estimate of a channel via which the first OFDM symbols were received using the local pilot symbols (Ĥl(z)); and generating an estimate of local service data symbols from a combination of the estimate of the component of the received signal representing the modulation symbols carrying the local service data and the estimate of the channel via which the first OFDM symbols were received ( D ~ ⁡ ( z ) ≈ R ⁡ ( z ) - S ^ ⁡ ( z ) ⁡ [ H n ⁡ ( z ) + H l ⁡ ( z ) ] H ^ l ⁡ ( z ) ) .

22. 发明授权

US09602151B1 Apparatus and method for transmitting and receiving wireless signals subject to a spectral mask 有权
公开(公告)号：US09602151B1
公开(公告)日：2017-03-21
申请号：US14840457
申请日：2015-08-31
申请人： Mahdi Zamani , Ahikam Aharony , Zhuhong Zhang , Chuandong Li , Weikun Hou
发明人： Mahdi Zamani , Ahikam Aharony , Zhuhong Zhang , Chuandong Li , Weikun Hou
IPC分类号： H03H7/30 , H04B1/10 , H04L5/00 , H04L27/26 , H04L27/00
CPC分类号： H04B1/40 , H04L27/0014 , H04L27/32
摘要： Provided is an apparatus and method for transmitting and receiving wireless signals. A transmitting apparatus has a signal processor and a transmitter. The signal processor is configured to generate a signal having a middle channel and at least one side channel. The transmitter is configured to wirelessly transmit the signal subject to a spectral mask that has shoulder regions. According to an embodiment of the invention, the signal processor generates the signal such that each side channel is positioned in one of the shoulder regions of the spectral mask. In this manner, bandwidth from the shoulder regions can be utilized by one or more side channels. Also provided is a receiving apparatus having a receiver configured to wirelessly receive the signal, and a signal processor configured to process the signal.

23. 发明授权

US09479365B2 Method for performing loop unrolled decision feedback equalization in an electronic device with aid of voltage feedforward, and associated apparatus 有权
标题翻译：一种借助于电压前馈在电子设备中执行循环展开判决反馈均衡的方法，以及相关联的装置
公开(公告)号：US09479365B2
公开(公告)日：2016-10-25
申请号：US14737513
申请日：2015-06-12
申请人： MEDIATEK INC.
发明人： Tsung-Hsin Chou , Chih-Hsien Lin , Huai-Te Wang , Bo-Jiun Chen , Yan-Bin Luo
IPC分类号： H03H7/30 , H04L25/03
CPC分类号： H04L25/03057 , H04L25/03885 , H04L2025/03484 , H04L2025/0349 , H04L2025/03777 , H04L2025/03808
摘要： A method for performing loop unrolled decision feedback equalization (DFE) and an associated apparatus are provided. The method includes: receiving a tap control signal and an offset control signal from a digital domain of a DFE receiver in an electronic device, and generating DFE information respectively corresponding to the tap control signal and the offset control signal in an analog domain of the DFE receiver; broadcasting the DFE information respectively corresponding to the tap control signal and the offset control signal toward comparators in the DFE receiver; utilizing the comparators to perform comparison operations according to the DFE information respectively corresponding to the tap control signal and the offset control signal to generate comparison results; and selectively adjusting the tap control signal and the offset control signal according to the comparison results, to optimize the DFE information respectively corresponding to the tap control signal and the offset control signal, respectively.
摘要翻译：提供了一种用于执行循环展开的判决反馈均衡（DFE）和相关联的装置的方法。该方法包括：从电子设备中的DFE接收机的数字域接收抽头控制信号和偏移控制信号，并且在DFE的模拟域中产生分别对应于抽头控制信号和偏移控制信号的DFE信息接收器将分别对应于抽头控制信号和偏移控制信号的DFE信息广播到DFE接收机中的比较器; 利用比较器根据分别对应于抽头控制信号和偏移控制信号的DFE信息执行比较操作，以产生比较结果; 并且根据比较结果选择性地调整抽头控制信号和偏移控制信号，分别优化分别对应于抽头控制信号和偏移控制信号的DFE信息。

24. 发明授权

US09445149B2 Method and apparatus for band separation for multiband communication systems 有权
标题翻译：用于多频段通信系统的频带分离的方法和装置
公开(公告)号：US09445149B2
公开(公告)日：2016-09-13
申请号：US14230058
申请日：2014-03-31
申请人： MaxLinear, Inc.
发明人： Madhukar Reddy , Timothy Gallagher
IPC分类号： H04J1/12 , H04B7/216 , H04L12/28 , H03H7/30 , H04N21/4385 , H04N21/61
CPC分类号： H04N21/6118 , H04L12/2801 , H04N21/4385 , H04N21/6168
摘要： Aspects of a method and apparatus for band separation for multiband communication systems are provided. One or more circuits for use in a transceiver may comprise a triplexer and a leakage processing module. The triplexer may comprise a multiband port, a Multimedia Over Coaxial Alliance (MoCA) port, a television upstream port, and a television downstream port. The leakage processing module may comprise a television downstream input port, a cable television downstream output port, a MoCA port, and a cable television upstream port. The leakage processing module may be operable to (1) process a MoCA signal to generate a first compensation signal; (2) process a cable upstream signal to generate a second compensation signal; (3) process a filtered signal based at least in part on the first and second compensation signals; and (4) output the processed filtered signal via the cable television downstream output port of said leakage processing module.
摘要翻译：提供了用于多频带通信系统的频带分离的方法和装置的方面。在收发器中使用的一个或多个电路可以包括三工器和泄漏处理模块。三工器可以包括多频带端口，多媒体同轴联盟（MoCA）端口，电视上行端口和电视下行端口。泄漏处理模块可以包括电视下游输入端口，有线电视下游输出端口，MoCA端口和有线电视上行端口。泄漏处理模块可操作为（1）处理MoCA信号以产生第一补偿信号; （2）处理电缆上行信号以产生第二补偿信号; （3）至少部分地基于第一和第二补偿信号来处理滤波信号; 和（4）经由所述泄漏处理模块的有线电视下游输出端口输出经处理的滤波信号。

25. 发明授权

US09438409B1 Centering baud-rate CDR sampling phase in a receiver 有权
标题翻译：在接收机中定心波特率CDR采样阶段
公开(公告)号：US09438409B1
公开(公告)日：2016-09-06
申请号：US14789738
申请日：2015-07-01
申请人： Xilinx, Inc.
发明人： Yu Liao , Geoffrey Zhang
IPC分类号： H03H7/30 , H04L7/00 , H04L7/04 , H04L25/03
CPC分类号： H04L25/03057 , H04L7/0062 , H04L7/0087
摘要： In an example, an apparatus for clock data recovery (CDR) includes a data slicer operable to generate data samples derived from a transmitted signal, and an error slicer operable to generate error samples derived from a transmitted signal. The apparatus further includes a CDR circuit operable to generate sampling clock phase for the data slicer and the error slicer from output of the data samples and the error samples. The apparatus further includes a decision adapt circuit operable to set a decision threshold of the error slicer, wherein for each main-cursor data sample of the data samples the decision adapt circuit is operable to adjust the decision threshold based on a function of at least one pre-cursor data sample, at least one post-cursor data sample, or a combination of at least one pre-cursor data sample and at least one post-cursor data sample.
摘要翻译：在一个示例中，用于时钟数据恢复（CDR）的装置包括可操作以产生从发送信号导出的数据样本的数据限幅器，以及用于产生从发送信号导出的误差样本的差错限幅器。该装置还包括CDR电路，可操作以从数据样本和误差样本的输出产生数据限幅器和误差限幅器的采样时钟相位。所述装置还包括判定适配电路，其可操作以设置所述误差限幅器的判定阈值，其中，对于所述数据样本的每个主光标数据采样，所述判定适配电路可操作以基于至少一个前标数据样本，至少一个后标记数据样本或至少一个前置标准数据样本和至少一个后视标数据样本的组合。

26. 发明授权

US09432103B2 Selection of training sequences for Multiple-In Multiple-Out transmissions 有权
标题翻译：多输入多输出传输的训练序列的选择
公开(公告)号：US09432103B2
公开(公告)日：2016-08-30
申请号：US14471655
申请日：2014-08-28
申请人： SONY CORPORATION
发明人： Peter B. Darwood , Vishakan Ponnampalam , Alan Edward Jones
IPC分类号： H03H7/30 , H04B1/00 , H01Q21/00 , H04B7/06 , H04L5/00 , H04L25/02 , H04B1/7105 , H04B7/04
CPC分类号： H04B7/0684 , H04B1/7105 , H04B7/0413 , H04B7/0632 , H04L5/0023 , H04L5/0044 , H04L25/0226
摘要： A cellular communication system comprises a Multiple-In Multiple-Out, MIMO, transmitter and receiver. The MIMO transmitter comprises a message generator for generating MIMO messages comprising selected training sequences and transceivers transmitting the messages on a plurality of antennas. The training sequences are selected by a midamble selector from a set of training sequences in response to an associated antenna on which the message is to be transmitted. The set of training sequences is associated with the cell of the MIMO transmitter and comprises disjoint subsets of training sequences for each of the plurality of antennas. The receiver comprises a transmit antenna detector which determines which antenna of the MIMO transmitter the message is transmitted from in response to the training sequence of the received message.
摘要翻译：蜂窝通信系统包括多输入多输出，MIMO，发射机和接收机。 MIMO发射机包括消息发生器，用于生成包括所选择的训练序列的MIMO消息和在多个天线上发射消息的收发器。训练序列由来自一组训练序列的中置码选择器响应于其上要发送消息的相关天线而选择。所述训练序列集合与所述MIMO发射机的小区相关联，并且包括所述多个天线中的每一个的训练序列的不相交子集。接收机包括发射天线检测器，其响应于接收到的消息的训练序列确定MIMO发射机的哪个天线发送消息。

27. 发明授权

US09407474B2 Phase detecting device and clock data recovery circuit embedded with decision feedback equalizer 有权
标题翻译：相位检测装置和时钟数据恢复电路嵌入判决反馈均衡器
公开(公告)号：US09407474B2
公开(公告)日：2016-08-02
申请号：US14855802
申请日：2015-09-16
申请人： National Chiao Tung University
发明人： Wei-Zen Chen , Yu-Ping Huang , Yau-Chia Liu , Zheng-Hao Hong
IPC分类号： H03H7/30 , H04L25/03 , H04L7/00
CPC分类号： H04L25/03057 , H03L7/089 , H03L7/091 , H04L7/0016 , H04L7/0079 , H04L7/0087 , H04L7/033
摘要： A phase detecting device and a clock data recovery circuit are provided. The phase detecting device includes a decision feedback equalizer having first and second sample-hold sub-circuits, an edge detector having a third sample-hold sub-circuit, a first XOR gate, and a second XOR gate. The first sample-hold sub-circuit, the second sample-hold sub-circuit and the third sample-hold sub-circuit obtain first sample data, second sample data and transition data, respectively. The first XOR gate executes an XOR operation for the first sample data and the transition data to generate first clock phase shift information. The second XOR gate executes the XOR operation for the second sample data and the transition data to generate second clock phase shift information. Therefore, high-frequency noise disturbance generated from conventional clock data recovery circuit and decision feedback equalizer can be avoided.
摘要翻译：提供了相位检测装置和时钟数据恢复电路。相位检测装置包括具有第一和第二采样保持子电路的判决反馈均衡器，具有第三采样保持子电路的边沿检测器，第一异或门和第二异或门。第一采样保持子电路，第二采样保持子电路和第三采样保持子电路分别获得第一采样数据，第二采样数据和转换数据。第一异或门对第一采样数据和转移数据执行异或运算，以产生第一时钟相移信息。第二异或门对第二采样数据和转移数据执行异或运算，以产生第二时钟相移信息。因此，可以避免从传统的时钟数据恢复电路和判决反馈均衡器产生的高频噪声干扰。

28. 发明授权

US09397725B2 Reception circuit and communication system 有权
标题翻译：接收电路和通信系统
公开(公告)号：US09397725B2
公开(公告)日：2016-07-19
申请号：US14482204
申请日：2014-09-10
申请人： Kabushiki Kaisha Toshiba
发明人： Shinsuke Fujii
IPC分类号： H03H7/30 , H04B3/00
CPC分类号： H04B3/00 , H04L25/0272 , H04L25/03885
摘要： According to an embodiment, a reception circuit receives a reception signal according to a signal transmitted from a transmission electrode through a reception electrode capacitively coupled to the transmission electrode. The reception circuit includes an adder, a hysteresis circuit, a shift register and a feedback signal generator. The adder is configured to add one or more feedback signals to the reception signal. The hysteresis circuit has hysteresis in input and output characteristics, and is configured to output output data according to an output signal of the adder. The shift register is configured to sequentially shift the output data of the hysteresis circuit. The feedback signal generator is configured to generate the feedback signal according to each output data of the shift register.
摘要翻译：根据实施例，接收电路根据从发送电极通过电容耦合到发送电极的接收电极发送的信号接收接收信号。接收电路包括加法器，迟滞电路，移位寄存器和反馈信号发生器。加法器被配置为向接收信号添加一个或多个反馈信号。迟滞电路在输入和输出特性方面具有迟滞性，并被配置为根据加法器的输出信号输出输出数据。移位寄存器被配置为顺序地移位滞后电路的输出数据。反馈信号发生器被配置为根据移位寄存器的每个输出数据产生反馈信号。

29. 发明授权

US09397623B1 Dual path double zero continuous time linear equalizer 有权
标题翻译：双路双零连续时间线性均衡器
公开(公告)号：US09397623B1
公开(公告)日：2016-07-19
申请号：US14633866
申请日：2015-02-27
申请人： Huawei Technologies Co., Ltd.
发明人： Marc-Andre Lacroix
IPC分类号： H03H7/30 , H03F3/45 , H03F3/193 , H04L25/03
CPC分类号： H04L25/03885 , H03F3/193 , H03F3/45197 , H03F2203/45112 , H03F2203/45222 , H03F2203/45488 , H03F2203/45494 , H03G5/14
摘要： A transadmittance amplifier stage is coupled to a transimpedance amplifier stage to form a continuous time linear equalizer. The transadmittance amplifier stage has first and second gain paths and is configured to input a first signal and output a second signal. The first gain path is configured to provide a DC gain recovery and a first high frequency gain to the first signal. The second gain path is configured to provide a second high frequency gain to the first signal. The second signal is generated by the transadmittance amplifier stage based on the gain recovery of the first signal and the high frequency gains of the first signal. The transimpedance amplifier stage is configured to input the second signal from the transadmittance amplifier stage and convert the second signal to an output voltage signal.
摘要翻译：跨导放大器级耦合到跨阻放大器级以形成连续时间线性均衡器。互导体放大器级具有第一和第二增益路径，并且被配置为输入第一信号并输出第二信号。第一增益路径被配置为向第一信号提供DC增益恢复和第一高频增益。第二增益路径被配置为向第一信号提供第二高频增益。基于第一信号的增益恢复和第一信号的高频增益，由导纳放大器级产生第二信号。跨阻放大器级被配置为输入来自互导体放大器级的第二信号，并将第二信号转换为输出电压信号。

30. 发明授权

US09379807B2 Data transmission system for asynchronous transmitting data and map information 有权
标题翻译：用于异步传输数据和地图信息的数据传输系统
公开(公告)号：US09379807B2
公开(公告)日：2016-06-28
申请号：US12034751
申请日：2008-02-21
申请人： Rakesh Taori , Ki-Sun Oh , Hyun Jeong Kang , Mi-Sun Do
发明人： Rakesh Taori , Ki-Sun Oh , Hyun Jeong Kang , Mi-Sun Do
IPC分类号： H04B3/36 , H04B7/14 , H04B1/60 , H04B17/02 , H04B7/15 , H04B7/185 , H04J1/10 , H04J3/08 , H04W4/00 , H03H7/30 , H03H7/40 , H03K5/159 , G08C25/02 , H04L1/18 , H04N7/173 , H04B7/26 , H04B7/155
CPC分类号： H04B7/2606 , H04B7/155 , H04B7/15542
摘要： A relay including a receiver to receive from a base station, data, a first data frame, and a second data frame, the first data frame includes data and data transmission time information associated with the data, and the second data frame includes map information corresponding to the data and map information transmission time information associated with the map information; a data frame computation unit to compute a third data frame and a fourth data frame, wherein the third data frame is used to transmit the data to a terminal and the fourth data frame is used to transmit the map information to the terminal; and a transmitter to transmit the data to the terminal using the map information when the third data frame is the same as the fourth data frame.
摘要翻译：一种包括从基站接收数据，第一数据帧和第二数据帧的接收器的中继器，所述第一数据帧包括与所述数据相关联的数据和数据传输时间信息，并且所述第二数据帧包括对应的映射信息涉及与地图信息相关联的数据和地图信息传送时间信息; 数据帧计算单元，用于计算第三数据帧和第四数据帧，其中所述第三数据帧用于将数据发送到终端，并且所述第四数据帧用于将所述映射信息发送到所述终端; 以及当第三数据帧与第四数据帧相同时，使用映射信息将数据发送到终端的发射机。

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