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31. 发明授权

US09773719B2 Semiconductor packages and methods of fabrication thereof 有权
公开(公告)号：US09773719B2
公开(公告)日：2017-09-26
申请号：US13685529
申请日：2012-11-26
申请人： Infineon Technologies Dresden GmbH
发明人： Dirk Meinhold , Frank Daeche , Thorsten Scharf
IPC分类号： H01L21/00 , H01L23/492 , H01L23/00 , H01L23/495 , H01L23/522 , H01L23/31 , H01L21/56
CPC分类号： H01L23/492 , H01L21/561 , H01L23/3121 , H01L23/3135 , H01L23/315 , H01L23/3185 , H01L23/49562 , H01L23/522 , H01L24/05 , H01L24/06 , H01L24/19 , H01L2224/0346 , H01L2224/04105 , H01L2224/05005 , H01L2224/05011 , H01L2224/05013 , H01L2224/05017 , H01L2224/05022 , H01L2224/05026 , H01L2224/05096 , H01L2224/05541 , H01L2224/05552 , H01L2224/05559 , H01L2224/05571 , H01L2224/0615 , H01L2224/291 , H01L2224/2919 , H01L2224/2929 , H01L2224/29294 , H01L2224/29324 , H01L2224/29339 , H01L2224/29344 , H01L2224/29347 , H01L2224/29355 , H01L2224/29364 , H01L2224/29366 , H01L2224/29369 , H01L2224/29371 , H01L2224/32225 , H01L2224/32245 , H01L2224/73104 , H01L2224/73265 , H01L2224/83815 , H01L2224/8382 , H01L2224/8384 , H01L2224/83862 , H01L2924/00014 , H01L2924/01023 , H01L2924/12032 , H01L2924/12042 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13062 , H01L2924/1461 , H01L2924/181 , H01L2924/206 , H01L2924/00 , H01L2924/00012 , H01L2924/014
摘要： In accordance with an embodiment of the present invention, a semiconductor device includes a semiconductor chip having a first side and an opposite second side, and a chip contact pad disposed on the first side of the semiconductor chip. A dielectric liner is disposed over the semiconductor chip. The dielectric liner includes a plurality of openings over the chip contact pad. A interconnect contacts the semiconductor chip through the plurality of openings at the chip contact pad.

32. 发明申请

US20170271319A1 Semiconductor Device 审中-公开
公开(公告)号：US20170271319A1
公开(公告)日：2017-09-21
申请号：US15458265
申请日：2017-03-14
申请人： Infineon Technologies Dresden GmbH
发明人： Markus Schmitt , Armin Tilke , Joachim Weyers
IPC分类号： H01L27/02 , H01L29/861 , H01L29/04 , H01L29/16 , H01L23/535 , H01L29/06
CPC分类号： H01L27/0255 , H01L23/4824 , H01L23/535 , H01L27/0292 , H01L29/04 , H01L29/0611 , H01L29/0615 , H01L29/0634 , H01L29/0638 , H01L29/0649 , H01L29/16 , H01L29/7396 , H01L29/7397 , H01L29/7808 , H01L29/7811 , H01L29/861 , H01L29/866
摘要： A semiconductor device includes a semiconductor body having opposite first and second surfaces. The semiconductor device further includes a transistor structure in the semiconductor body and a source contact structure overlapping the transistor structure. The source contact structure is electrically connected to source regions of the transistor structure. A gate contact structure is further provided, which has a part separated from the source contact structure by a longitudinal gap within a lateral plane. Gate interconnecting structures bridge the longitudinal gap and are electrically coupled between the gate contact structure and a gate electrode of the transistor structure. Electrostatic discharge protection structures bridge the longitudinal gap and are electrically coupled between the gate contact structure and the source contact structure. At least one of the gate interconnecting structures is between two of the electrostatic discharge protection structures along a length direction of the longitudinal gap.

33. 发明申请

US20170222010A1 Method for Manufacturing a Semiconductor Device Having Silicide Layers 有权
公开(公告)号：US20170222010A1
公开(公告)日：2017-08-03
申请号：US15417436
申请日：2017-01-27
申请人： Infineon Technologies Dresden GmbH
发明人： Rolf Weis , Martin Bartels , Marko Lemke , Stefan Tegen
IPC分类号： H01L29/45 , H01L29/66 , H01L29/06 , H01L21/285 , H01L29/78 , H01L29/10
CPC分类号： H01L29/45 , H01L21/28518 , H01L29/0696 , H01L29/0865 , H01L29/1095 , H01L29/456 , H01L29/66696 , H01L29/66727 , H01L29/66734 , H01L29/7809 , H01L29/7825
摘要： A method for manufacturing a semiconductor device includes providing a semiconductor substrate having a first side. A trench having a bottom is formed. The trench separates a first mesa region from a second mesa region formed in the semiconductor substrate. The trench is filled with an insulating material, and the second mesa region is removed relative to the insulating material filled in the trench to form a recess in the semiconductor substrate. In a common process, a first silicide layer is formed on and in contact with a top region of the first mesa region at the first side of the semiconductor substrate and a second silicide layer is formed on and in contact with the bottom of the recess.

34. 发明授权

US09716015B2 Carrier and a method for processing a carrier 有权
公开(公告)号：US09716015B2
公开(公告)日：2017-07-25
申请号：US14977708
申请日：2015-12-22
申请人： Infineon Technologies Dresden GmbH
发明人： Steffen Bieselt
IPC分类号： H01L21/76 , H01L21/48 , H01L21/02 , H01L21/762 , H01L23/053 , H05K1/02 , H01L21/764
CPC分类号： H01L21/481 , H01L21/02104 , H01L21/76224 , H01L21/76283 , H01L21/764 , H01L23/053 , H01L2924/0002 , H05K1/02 , Y10T428/13 , H01L2924/00
摘要： According to various embodiments, a carrier may include: a hollow chamber spaced apart from a surface of the carrier; and at least one support structure within the hollow chamber connecting a first region of the carrier disposed over the hollow chamber with a second region of the carrier disposed below the hollow chamber, wherein at least a part of a surface of the at least one support structure is spaced apart from an inner surface of the hollow chamber, and wherein the at least one support structure includes an electrically insulating material.

35. 发明授权

US09641153B2 Method of forming a resonator 有权
公开(公告)号：US09641153B2
公开(公告)日：2017-05-02
申请号：US14932303
申请日：2015-11-04
申请人： Infineon Technologies Dresden GmbH
发明人： Thoralf Kautzsch , Heiko Froehlich , Mirko Vogt , Maik Stegemann , Thomas Santa , Markus Burian
IPC分类号： H03H9/24 , H03H9/02 , B81B3/00 , B81C1/00 , H03H3/007
CPC分类号： H03H9/2452 , B81B3/0078 , B81B2201/0271 , B81C1/00158 , B81C1/00246 , B81C1/00301 , B81C1/00396 , B81C2203/0145 , H03H3/0072 , H03H3/0073 , H03H9/02259 , H03H9/2463 , H03H2009/02291 , H03H2009/02307 , H03H2009/0233 , H03H2009/02496
摘要： A method of forming a resonator by providing a first layer; forming a sacrificial layer on the first layer; forming a capping layer on the sacrificial layer; forming at least one etching aperture in the capping layer; forming at least one additional aperture having a different size than the at least one etching aperture; forming a cavity and releasing a resonator structure within the cavity by removing the sacrificial layer by etching via the at least one etching aperture; sealing the at least one etching aperture; and forming a lining in the at least one additional aperture.

36. 发明授权

US09627341B2 Wafer arrangement, a method for testing a wafer, and a method for processing a wafer 有权
公开(公告)号：US09627341B2
公开(公告)日：2017-04-18
申请号：US14064271
申请日：2013-10-28
申请人： Infineon Technologies Dresden GmbH
发明人： Peter Brockhaus , Uwe Koeckritz
IPC分类号： H01L33/56 , H01L23/00 , G01R31/28 , H01L21/683 , H01L21/66
CPC分类号： H01L22/22 , G01R31/2831 , H01L21/6835 , H01L21/6836 , H01L22/14 , H01L24/06 , H01L24/08 , H01L24/19 , H01L24/27 , H01L2221/68318 , H01L2221/68327 , H01L2221/6834 , H01L2221/68372 , H01L2221/68381 , H01L2224/0401 , H01L2224/0603 , H01L2224/06181 , H01L2224/08112 , H01L2224/25175 , H01L2224/27009 , H01L2224/495 , H01L2924/12042 , H01L2924/13055 , H01L2924/15788 , H01L2924/00 , H01L2924/00014
摘要： According to various embodiments, a wafer arrangement may be provided, the wafer arrangement may include: a wafer including at least one electronic component having at least one electronic contact exposed on a surface of the wafer; an adhesive layer structure disposed over the surface of the wafer, the adhesive layer structure covering the at least one electronic contact; and a carrier adhered to the wafer via the adhesive layer structure, wherein the carrier may include a contact structure at a surface of the carrier aligned with the at least one electronic contact so that by pressing the wafer in direction of the carrier, the contact structure can be brought into electrical contact with the at least one electronic contact of the at least one electronic component.

37. 发明申请

US20170015546A1 INTEGRATED SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD 有权
标题翻译：集成半导体器件和制造方法
公开(公告)号：US20170015546A1
公开(公告)日：2017-01-19
申请号：US15208975
申请日：2016-07-13
申请人： Infineon Technologies Dresden GmbH
发明人： Thoralf Kautzsch , Heiko Froehlich , Alessia Scire , Maik Stegemann , Bernhard Winkler , Andre Roeth , Steffen Bieselt , Mirko Vogt
IPC分类号： B81B3/00 , B81C1/00
CPC分类号： B81C1/0015 , B81B3/0078 , B81B2201/0235 , B81B2203/0118 , B81B2203/0163
摘要： The present disclosure relates to an integrated semiconductor device, comprising a semiconductor substrate; a cavity formed into the semiconductor substrate; a sensor portion of the semiconductor substrate deflectably suspended in the cavity at one side of the cavity via a suspension portion of the semiconductor substrate interconnecting the semiconductor substrate and the sensor portion thereof, wherein an extension of the suspension portion along the side of the cavity is smaller than an extension of said side of the cavity.
摘要翻译：本公开涉及一种集成半导体器件，包括半导体衬底; 形成在半导体衬底中的腔; 所述半导体衬底的传感器部分经由所述半导体衬底和所述传感器部分互连的所述半导体衬底的悬置部分在所述空腔的一侧偏转地悬挂在所述空腔中，其中所述悬架部分沿着所述腔的侧面的延伸为小于腔的所述侧的延伸部。

38. 发明申请

US20170005220A1 INTEGRATED LIGHT EMITTING DEVICE, INTEGRATED SENSOR DEVICE, AND MANUFACTURING METHOD 审中-公开
标题翻译：集成发光装置，集成传感器装置和制造方法
公开(公告)号：US20170005220A1
公开(公告)日：2017-01-05
申请号：US15196203
申请日：2016-06-29
申请人： Infineon Technologies Dresden GmbH
发明人： Thoralf KAUTZSCH
IPC分类号： H01L31/173 , H01L33/52 , H01L33/60 , H01L27/146 , H01L33/58
CPC分类号： H01L31/173 , G01N21/552 , G02B6/12004 , H01L33/005 , H01L33/20
摘要： The present disclosure relates to an integrated light emitting device. The integrated light emitting device comprises a substrate of semiconductor material, a light emitting unit integrated into the semiconductor material, and at least one cavity formed into the semiconductor material between the substrate and the light emitting unit. At least portions of the at least one cavity may be formed by Silicon-On-Nothing (SON) process steps.
摘要翻译：本发明涉及集成发光装置。集成发光器件包括半导体材料的衬底，集成到半导体材料中的发光单元和形成在衬底和发光单元之间的半导体材料中的至少一个空腔。至少一个空腔的至少一部分可以由无硅（SON）工艺步骤形成。

39. 发明申请

US20160351557A1 Semiconductor Device Comprising Electrostatic Discharge Protection Structure 有权
标题翻译：包括静电放电保护结构的半导体器件
公开(公告)号：US20160351557A1
公开(公告)日：2016-12-01
申请号：US15167141
申请日：2016-05-27
申请人： Infineon Technologies Dresden GmbH
发明人： Joachim Weyers
IPC分类号： H01L27/02 , H01L23/367 , H01L29/06 , H01L29/78 , H01L29/10
CPC分类号： H01L27/0255 , H01L21/2236 , H01L21/2257 , H01L23/3677 , H01L29/0634 , H01L29/0696 , H01L29/1095 , H01L29/7805 , H01L29/7811
摘要： A semiconductor device includes a semiconductor body having first and second opposing surfaces, a first isolation layer on the first surface of the semiconductor body, and an electrostatic discharge protection structure. The electrostatic discharge protection structure includes a diode structure on the first isolation layer, a first terminal and a second terminal. The diode structure includes a polysilicon layer having first regions and at least one second region of opposite conductivity type alternatingly arranged along a first lateral direction between the first terminal and the second terminal. The diode structure extends from an electrostatic discharge protection part into an edge termination part along a second lateral direction. A first breakdown voltage associated with the diode structure in the electrostatic discharge protection part is smaller than a second breakdown voltage associated with the diode structure in the edge termination part.
摘要翻译：半导体器件包括具有第一和第二相对表面的半导体本体，半导体本体的第一表面上的第一隔离层和静电放电保护结构。静电放电保护结构包括在第一隔离层上的二极管结构，第一端子和第二端子。二极管结构包括具有第一区域和至少一个相反导电类型的第二区域的多晶硅层，沿着第一横向方向在第一端子和第二端子之间交替布置。二极管结构从静电放电保护部分沿着第二横向方向延伸到边缘终端部分。与静电放电保护部分中的二极管结构相关联的第一击穿电压小于与边缘终端部分中的二极管结构相关联的第二击穿电压。

40. 发明申请

US20160322610A1 ELECTRODE, AN ELECTRONIC DEVICE, AND A METHOD FOR MANUFACTURING AN OPTOELECTRONIC DEVICE 审中-公开
标题翻译：电极，电子设备以及制造光电器件的方法
公开(公告)号：US20160322610A1
公开(公告)日：2016-11-03
申请号：US15207570
申请日：2016-07-12
申请人： Infineon Technologies Dresden GmbH
发明人： Dirk Meinhold , Sven Schmidbauer , Markus Fischer , Norbert Urbansky
IPC分类号： H01L51/56 , H01L21/283 , H01L29/40 , H01L31/0224 , H01L51/52 , H01L33/40 , H01L29/45
CPC分类号： H01L51/56 , H01L21/283 , H01L29/401 , H01L29/45 , H01L31/0224 , H01L31/022425 , H01L33/40 , H01L51/5203 , H01L51/5215 , H01L51/5231 , H01L2933/0016 , Y10T428/12993 , Y10T428/31678
摘要： According to various embodiments, an electrode may include at least one layer including a chemical compound including aluminum and titanium.
摘要翻译：根据各种实施方式，电极可以包括至少一层包括铝和钛的化合物。

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