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    • 32. 发明授权
    • Precision current-source arrangement
    • 精密电流源布置
    • US4542332A
    • 1985-09-17
    • US562338
    • 1983-12-16
    • Rudy J. van de Plassche
    • Rudy J. van de Plassche
    • H03F3/343G05F3/26H03F3/34H03F3/347H03M1/00H03M1/10H03M1/74G05F3/16
    • G05F3/267G05F3/265H03M1/1061H03M1/74
    • A current-distribution circuit (1) supplies a plurality of substantially equal currents (i.sub.1, i.sub.2, i.sub.3 and i.sub.4) to a permutation circuit (13), which transfers these currents to outputs (18, 19, 20 and 21) in accordance with a cyclic permutation. The currents in these outputs exhibit a ripple caused by the inequality of the currents (i.sub.1, i.sub.2, i.sub.3 and i.sub.4). A detection circuit (30) detects the ripple component of the currents (i.sub.1, i.sub.2, i.sub.3 and i.sub.4) and applies this ripple component to a associated control circuit of a block of control circuits (50). The relevant control circuit supplies a control current for correcting the relevant current (i.sub.1, i.sub.2, i.sub.3 or i.sub.4) in such way that the ripple component is substantially eliminated.
    • 电流分配电路(1)将多个基本相等的电流(i1,i2,i3和i4)提供给置换电路(13),该电路将这些电流根据 循环排列。 这些输出中的电流表现出由电流(i1,i2,i3和i4)的不等式引起的纹波。 检测电路(30)检测电流(i1,i2,i3和i4)的纹波分量,并将该纹波分量施加到控制电路块(50)的相关控制电路。 相关控制电路提供用于校正相关电流(i1,i2,i3或i4)的控制电流,使得纹波分量基本上消除。
    • 34. 发明授权
    • Push-pull output stage
    • 推挽输出级
    • US4405902A
    • 1983-09-20
    • US256364
    • 1981-04-22
    • Rudy J. van de PlasscheEise C. Dijkmans
    • Rudy J. van de PlasscheEise C. Dijkmans
    • H03F3/20H03F3/30
    • H03F3/3088
    • The invention provides an improved class-B push-pull output stage comprising a first and a second output transistor of a first conductivity type, which stage is provided with a control loop for driving the second transistor in phase opposition as a function of the drive of the first transistor. Said control loop is adapted so that a stable quiescent-current setting is obtained and that the effect of poor high-frequency properties of a third transistor of a conductivity type opposite to the first conductivity type, which transistor is necessarily included in the control loop, is eliminated, so that a wide frequency range is obtained.
    • 本发明提供了一种改进的B类推挽输出级,其包括第一和第二输出晶体管,其具有第一导电类型的第一和第二输出晶体管,所述第一和第二输出晶体管具有第一导电类型的第一和第二输出晶体管, 第一个晶体管。 所述控制回路适于使得获得稳定的静态电流设置,并且与控制回路中必须包括该晶体管的第一导电类型相反的导电类型的第三晶体管的差的高频特性的影响, 被消除,从而获得宽的频率范围。
    • 37. 发明授权
    • Analog-to-digital converter circuit employing iterative subtraction
    • 采用迭代减法的模数转换电路
    • US4179687A
    • 1979-12-18
    • US818105
    • 1977-07-22
    • Rudy J. van de PlasscheEise C. Dijkmans
    • Rudy J. van de PlasscheEise C. Dijkmans
    • H03M1/38H03M1/44H03K13/02
    • H03M1/445
    • An analog-to-digital conversion circuit having a number of series-connected stages, each stage determining the difference between a signal current input and a reference current input, and at positive values of said difference transferring a current proportional to said difference to the succeeding stage. In each successive stage, the reference current is subtracted from the signal current until the residual current is smaller than the reference current. The number of successive stages in which this subtraction takes place can be detected to indicate the level of the input current. Each stage includes a common point for receiving the difference between the signal current and the reference current, a current path from said common point to its output for transferring a current proportional to the difference if positive, a current path from said common point to a current sink if said difference is negative; said current paths being unidirectional and biased such that only one is forward biased at one point in time. Each stage also detects the polarity of said difference to obtain a digital measure of the value of the signal current.
    • 一种具有串联级数的模数转换电路,每级确定信号电流输入和参考电流输入之间的差异,并且将所述差的正值转移到与所述差异成正比的电流 阶段。 在每个连续级中,从信号电流中减去参考电流,直到剩余电流小于参考电流。 可以检测发生该减法的连续级数,以指示输入电流的电平。 每个级包括用于接收信号电流和参考电流之间的差的公共点,从所述公共点到其输出的电流路径,用于传送与差成正比的电流,如果为正,则从所述公共点到电流的电流路径 如果差异为负,则汇集; 所述电流路径是单向的和偏置的,使得仅一个在一个时间点被正向偏置。 每个级还检测所述差的极性,以获得信号电流值的数字测量。