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1. 发明申请

US20190190768A1 Digital Power Amplification Circuit 审中-公开
公开(公告)号：US20190190768A1
公开(公告)日：2019-06-20
申请号：US16219176
申请日：2018-12-13
申请人： Stichting IMEC Nederland
发明人： Ao Ba
IPC分类号： H04L27/36 , H03K5/05 , H04L7/027
CPC分类号： H04L27/36 , H03F3/195 , H03F3/211 , H03F3/2175 , H03F3/245 , H03F2200/09 , H03F2200/451 , H03K5/05 , H03M1/74 , H04L7/027
摘要： A digital power amplification circuit includes a decoding block configured to receive a first stream of digital codes and to derive from the first stream a second stream of digital codes, the decoding block including a decoder configured to decode the digital codes of the first stream and the second stream at a first clock rate, a main digital power amplifier configured to receive the decoded digital codes of the first stream, an upsampler configured to upsample the decoded digital codes of the second stream to a second clock rate that is greater than the first clock rate, an auxiliary digital power amplifier configured to receive the decoded digital codes of the second stream upsampled to the second clock rate, and a summer configured to sum (i) a main output signal of the main digital power amplifier and (ii) an auxiliary output signal of the auxiliary digital power amplifier.

2. 发明申请

US20170373700A1 ANALOG TO DIGITAL COMPUTATIONS IN BIOLOGICAL SYSTEMS 审中-公开
公开(公告)号：US20170373700A1
公开(公告)日：2017-12-28
申请号：US15535846
申请日：2015-12-22
申请人： Massachusetts Institute of Technology
发明人： Timothy Kuan-Ta Lu , Jacob Rosenblum , Gianluca Selvaggio
IPC分类号： H03M1/36 , C12N5/10 , C12N15/63 , G06N3/00
CPC分类号： H03M1/361 , C12N5/10 , C12N15/63 , G06N3/002 , H03M1/74
摘要： Aspects of the present disclosure relate to analog signal processing circuits and methods for cellular computation.

3. 发明授权

US09780829B1 Method, apparatus, computer program, chip set, or data structure for correlating a digital signal and a correlation code 有权
公开(公告)号：US09780829B1
公开(公告)日：2017-10-03
申请号：US15080294
申请日：2016-03-24
申请人： Focal Point Positioning Ltd.
发明人： Ramsey Faragher , Nicolas Couronneau , Robert Mark Crockett
IPC分类号： H04L27/10 , H04B1/709 , H04B1/711 , H03M1/74
CPC分类号： H04B1/709 , H03M1/74 , H04B1/7073 , H04B1/711
摘要： A method, apparatus, computer program, data structure, signal relating to: causing correlation of a digital signal provided by a receiver with a motion-compensated correlation code, wherein the motion-compensated correlation code is a correlation code that has been compensated before correlation using one or more phasors dependent upon an assumed or measured movement of the receiver.

4. 发明授权

US09716509B2 Digital measurement of DAC switching mismatch error 有权
公开(公告)号：US09716509B2
公开(公告)日：2017-07-25
申请号：US15360617
申请日：2016-11-23
申请人： Analog Devices, Inc.
发明人： Jialin Zhao
IPC分类号： H03M1/10 , H03M3/00 , H03M1/12
CPC分类号： H03M1/1071 , H03M1/1038 , H03M1/1057 , H03M1/1245 , H03M1/167 , H03M1/46 , H03M1/74 , H03M3/378 , H03M3/422 , H03M3/464
摘要： For analog-to-digital converters (ADCs) which utilize a feedback digital-to-analog converter (DAC) for conversion, the final analog output can be affected or distorted by errors of the feedback DAC. A digital measurement technique can be implemented to determine switching mismatch error for the feedback DAC in a continuous-time delta-sigma modulator (CTDSM) or in a continuous-time pipeline modulator. The methodology forces each DAC unit elements (UEs) to switch a certain amount times and then use the modulator itself to measure the errors caused by those switching activities respectively. The obtained errors can be stored in a look-up table and fully corrected in digital domain or analog domain.

5. 发明授权

US09697460B2 Biological analog-to-digital and digital-to-analog converters 有权
公开(公告)号：US09697460B2
公开(公告)日：2017-07-04
申请号：US13512449
申请日：2010-11-30
申请人： James J. Collins , Timothy Kuan-Ta Lu
发明人： James J. Collins , Timothy Kuan-Ta Lu
IPC分类号： C12P21/06 , C07H21/04 , G06N3/00 , H03M1/36 , H03M1/74
CPC分类号： G06N3/002 , H03M1/361 , H03M1/74
摘要： Described herein are novel biological converter switches that utilize modular components, such as genetic toggle switches and single invertase memory modules (SIMMs), for converting analog inputs to digital outputs, and digital inputs to analog outputs, in cells and cellular systems. Flexibility in these biological converter switches is provided by combining individual modular components, i.e., SIMMs and genetic toggle switches, together. These biological converter switches can be combined in a variety of network topologies to create circuits that act, for example, as switchboards, and regulate the production of an output product(s) based on the combination and nature of input signals received.

6. 发明申请

US20170093422A1 METHOD FOR OPERATING RADIO FREQUENCY DIGITAL TO ANALOG CONVERSION CIRCUITRY IN THE EVENT OF A FIRST AND A SUBSE-QUENT SECOND INPUT SAMPLE WITH DIFFERENT SIGNS AND AN DIGITAL TO ANALOG CONVERSION CIRCUITRY 有权
公开(公告)号：US20170093422A1
公开(公告)日：2017-03-30
申请号：US15240462
申请日：2016-08-18
申请人： Intel IP Corporation
发明人： Antonio Passamani , Franz Kuttner , Michael FULDE
IPC分类号： H03M1/66
CPC分类号： H03M1/66 , H03M1/74 , H04L27/00 , H04L27/0002
摘要： A method for operating a radio frequency digital to analog conversion circuitry with a number of cells if a first input sample and a subsequent second input sample have different signs, comprises generating a first analog signal corresponding to the first input sample using a first subset of the number of cells of the digital to analog conversion circuitry with a local oscillator signal having a first polarity. The method further comprises applying a second local oscillator signal with an inverted polarity to a second subset of cells of the digital to analog conversion circuitry when a number of cells from the first subset of cells are used and selecting a number of cells from the second subset of cells to generate a second analog signal corresponding to the second input sample.

7. 发明授权

US09571120B2 Digital to analog converter circuits, apparatus and method for generating a high frequency transmission signal and methods of digital to analog conversion 有权
标题翻译：数模转换器电路，用于产生高频传输信号的装置和方法以及数模转换的方法
公开(公告)号：US09571120B2
公开(公告)日：2017-02-14
申请号：US14835031
申请日：2015-08-25
申请人： Intel IP Corporation
发明人： Franz Kuttner , Antonio Passamani , Davide Ponton
IPC分类号： H03M1/66 , H03M1/74 , H03M1/00 , H03M1/12 , H03M3/00
CPC分类号： H03M1/662 , H03M1/00 , H03M1/12 , H03M1/74 , H03M1/747 , H03M3/30
摘要： A digital to analog converter circuit includes a plurality of digital to analog converter cells. The digital to analog converter circuit further includes a control circuit configured to control an operation of a digital to analog converter cell of the plurality of digital to analog converter cells based on a first phase component of a digital signal comprising information to be transmitted during a first time interval and based on a second phase component of the digital signal comprising information to be transmitted during a second time interval.
摘要翻译：数模转换器电路包括多个数模转换器单元。数模转换器电路还包括控制电路，其被配置为基于数字信号的第一相位分量来控制多个数模转换器单元中的数模转换器单元的操作，该数字信号包括将在第一时间间隔，并且基于数字信号的第二相位分量，包括将在第二时间间隔期间发送的信息。

8. 发明授权

US09525429B2 Multi-stage digital-to-analog converter 有权
标题翻译：多级数模转换器
公开(公告)号：US09525429B2
公开(公告)日：2016-12-20
申请号：US14851263
申请日：2015-09-11
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Martin Kinyua
IPC分类号： H03M3/00 , H03M1/74 , H03H11/04 , H03M1/66
CPC分类号： H03M1/74 , H03H11/04 , H03M1/661 , H03M3/414 , H03M3/50
摘要： A circuit includes a first digital filter that generates a first output based on a digital input and a first digital output signal. A first digital modulator generates the first digital output signal and a first error output based on the first output and a feedback error output. A second digital modulator generates a second output and a second error output based on the first error output. A second digital filter generates a second digital output signal based on the second output, and a third digital filter generates the feedback error output based on the second error output. The second digital output signal and the second error output are based on the first error output amplified by a predetermined gain.
摘要翻译：电路包括基于数字输入和第一数字输出信号产生第一输出的第一数字滤波器。第一数字调制器产生第一数字输出信号和基于第一输出的第一误差输出和反馈误差输出。第二数字调制器基于第一误差输出产生第二输出和第二误差输出。第二数字滤波器基于第二输出产生第二数字输出信号，并且第三数字滤波器基于第二误差输出生成反馈误差输出。第二数字输出信号和第二误差输出基于由预定增益放大的第一误差输出。

9. 发明授权

US09413381B2 High-speed, low-power reconfigurable voltage-mode DAC-driver 有权
标题翻译：高速，低功耗可重新配置的电压模式DAC驱动器
公开(公告)号：US09413381B2
公开(公告)日：2016-08-09
申请号：US14616566
申请日：2015-02-06
申请人： BROADCOM CORPORATION
发明人： Anand Jitendra Vasani , Ali Nazemi , Jun Cao , Afshin Momtaz
IPC分类号： H03M1/66 , H03M1/68 , H03M1/00 , H03M1/10 , H03M1/74
CPC分类号： H03M1/68 , H03M1/002 , H03M1/068 , H03M1/1028 , H03M1/1047 , H03M1/74 , H03M1/80
摘要： A low-power reconfigurable voltage-mode digital-to-analog converter (DAC) driver circuit includes a first and a second supply voltage and a number of DAC units. Each DAC unit is coupled to a respective bit of a digital input. The DAC units are configured to maintain a constant output impedance. Each DAC unit includes one or more complementary switch pairs that couple first nodes of one or more respective impedances to one of the first or the second supply voltage, based on the respective bit of the digital input. Second nodes of the one or more respective impedances are coupled to an output node.
摘要翻译：低功率可重构电压模式数模转换器（DAC）驱动电路包括第一和第二电源电压以及多个DAC单元。每个DAC单元耦合到数字输入的相应位。 DAC单元配置为保持恒定的输出阻抗。每个DAC单元包括一个或多个互补开关对，其基于数字输入的相应位将一个或多个相应阻抗的第一节点耦合到第一或第二电源电压中的一个。一个或多个相应阻抗的第二节点耦合到输出节点。

10. 发明授权

US09350371B2 Electrical signal conversion with reduced-distance element rotation 有权
标题翻译：电信号转换与距离元件旋转减少
公开(公告)号：US09350371B2
公开(公告)日：2016-05-24
申请号：US14571274
申请日：2014-12-15
申请人： ANALOG DEVICES GLOBAL
发明人： Trevor Clifford Caldwell , Richard E. Schreier , David Alldred , Wenhua W. Yang
IPC分类号： H03M3/00 , H03M1/06 , H03M1/36 , H03M1/74
CPC分类号： H03M1/0673 , H03M1/361 , H03M1/74 , H03M3/30 , H03M3/338 , H03M3/464
摘要： In one aspect, an electrical signal converter is disclosed. The exemplary electrical signal converter may include a plurality of ordered converter elements. Element selection logic may be provided to pseudorandomly select a pointer to a switch matrix, wherein the switch matrix maps converter elements according to a stepwise “delta-two-maximum pattern.” Advantageously, pseudorandom stepwise delta-two-maximum patterns may be applied both to a first order converter, and to a feedback converter for error correction.
摘要翻译：一方面，公开了一种电信号转换器。示例性电信号转换器可以包括多个有序的转换器元件。可以提供元素选择逻辑以伪随机选择指向开关矩阵的指针，其中开关矩阵根据逐步的“二进制二最大模式”来映射转换器元件。有利地，可以应用伪随机逐步的Δ-二最大模式到一阶转换器和用于纠错的反馈转换器。

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