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31. 发明授权

US08269294B2 Spin transport device 有权
标题翻译：旋转运输装置
公开(公告)号：US08269294B2
公开(公告)日：2012-09-18
申请号：US12796034
申请日：2010-06-08
申请人： Tomoyuki Sasaki , Tohru Oikawa , Katsumichi Tagami , Masaki Kubota
发明人： Tomoyuki Sasaki , Tohru Oikawa , Katsumichi Tagami , Masaki Kubota
IPC分类号： H01L29/82 , G11C11/02
CPC分类号： H01L29/66984 , G11C11/161 , G11C11/1673 , G11C11/1675
摘要： A spin transport device is provided, which includes a channel comprised of a semiconductor material, a magnetization fixed layer arranged on the channel via a first insulating layer, a magnetization free layer arranged on the channel via a second insulating layer, and first and second electrodes arranged on the channel, wherein carrier densities of a first region of the channel including a contact surface with the first insulating layer, a second region of the channel including a contact surface with the second insulating layer, a third region of the channel including an opposite surface to the first electrode, and a fourth region of the channel including an opposite surface to the second electrode are higher than an average carrier density of the whole channel. Accordingly, a spin transport device that can realize good spin transportation and electric resistance characteristics while suppressing the scattering of spin can be provided.
摘要翻译：提供自旋传输装置，其包括由半导体材料构成的通道，经由第一绝缘层布置在通道上的磁化固定层，经由第二绝缘层布置在通道上的无磁化层，以及第一和第二电极布置在通道上，其中通道的第一区域的载流子密度包括与第一绝缘层的接触表面，通道的第二区域包括与第二绝缘层的接触表面，通道的第三区域包括相对的并且包括与第二电极相反的表面的沟道的第四区域高于整个通道的平均载流子密度。因此，可以提供能够在抑制旋转散射的同时实现良好的自旋运输和电阻特性的自旋输送装置。

32. 发明授权

US08264053B2 Semiconductor device including a magnetic tunnel junction and method of manufacturing the same 有权
标题翻译：包括磁性隧道结的半导体器件及其制造方法
公开(公告)号：US08264053B2
公开(公告)日：2012-09-11
申请号：US12474974
申请日：2009-05-29
申请人： Keisuke Tsukamoto , Mikio Tsujiuchi
发明人： Keisuke Tsukamoto , Mikio Tsujiuchi
IPC分类号： H01L29/82 , G11C11/02
CPC分类号： H01L43/12 , G11C11/161 , H01L27/228 , H01L43/08
摘要： To provide a semiconductor device that has an improved adhesion between a bottom conductive layer and a protection film protecting an MTJ element. This semiconductor device includes a bottom electrode formed over a semiconductor substrate, an MTJ element part formed over a part of the bottom electrode by lamination of a bottom magnetic film, an insulating film, a top magnetic film, and a top electrode in this order, and a protection film formed over the bottom electrode so as to cover the MTJ element part, wherein the bottom electrode is formed by amorphized metal nitride and the protection film is formed by an insulating film containing nitrogen.
摘要翻译：提供一种在底部导电层和保护MTJ元件的保护膜之间具有改善的粘合性的半导体器件。该半导体装置包括形成在半导体衬底上的底部电极，通过层叠底部磁性膜，绝缘膜，顶部磁性膜和顶部电极而形成在底部电极的一部分上的MTJ元件部分，以及形成在底部电极上以覆盖MTJ元件部分的保护膜，其中底部电极由非晶态金属氮化物形成，并且保护膜由含氮的绝缘膜形成。

33. 发明授权

US08253210B2 Semiconductor device including a magnetic sensor chip 有权
标题翻译：包括磁传感器芯片的半导体装置
公开(公告)号：US08253210B2
公开(公告)日：2012-08-28
申请号：US12433531
申请日：2009-04-30
申请人： Horst Theuss , Klaus Elian
发明人： Horst Theuss , Klaus Elian
IPC分类号： H01L29/82 , G11C11/02
CPC分类号： H01L27/22 , B82Y25/00 , G01R33/093 , H01L21/561 , H01L21/568 , H01L23/3135 , H01L24/19 , H01L24/20 , H01L24/96 , H01L24/97 , H01L2224/04105 , H01L2224/21 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01075 , H01L2924/12044 , H01L2924/14 , H01L2924/1461 , H01L2924/181 , H01L2924/00
摘要： A semiconductor device includes a magnetic sensor chip, an electrically conducting layer wafer-level patterned in contact with the magnetic sensor chip, encapsulation material disposed on the magnetic sensor chip, and an array of external contact elements electrically coupled with the magnetic sensor chip through the electrically conducting layer.
摘要翻译：一种半导体器件包括磁传感器芯片，与磁传感器芯片接触图案化的导电层晶片级，设置在磁传感器芯片上的封装材料，以及通过所述磁传感器芯片与磁传感器芯片电连接的外部接触元件阵列导电层。

34. 发明授权

US08248845B2 Magnetic storage cell 有权
标题翻译：磁存储单元
公开(公告)号：US08248845B2
公开(公告)日：2012-08-21
申请号：US11701322
申请日：2007-01-31
申请人： Krish Mani
发明人： Krish Mani
IPC分类号： G11C11/14 , G11C11/02 , G11C5/06 , G11C5/08 , G11C5/02
CPC分类号： G11C11/16
摘要： A horizontally disposed elliptical or rectangular magnetic memory cell includes at least two conductive lines to carry current and a magnetic element disposed between the conductive lines. The current through the conductive lines induces a magnetic field, such that the magnetic element is directly accessible. The magnetic memory cell can be sensed with a GMR head.
摘要翻译：水平设置的椭圆形或矩形磁性存储单元包括至少两条用于承载电流的导线和设置在导线之间的磁性元件。通过导线的电流引起磁场，使得磁性元件可以直接接近。可以用GMR头来感测磁存储单元。

35. 发明授权

US08217478B2 Magnetic stack with oxide to reduce switching current 有权
标题翻译：磁性堆叠与氧化物，以减少开关电流
公开(公告)号：US08217478B2
公开(公告)日：2012-07-10
申请号：US12425466
申请日：2009-04-17
申请人： Xiaohua Lou , Yuankai Zheng , Wenzhong Zhu , Wei Tian , Zheng Gao
发明人： Xiaohua Lou , Yuankai Zheng , Wenzhong Zhu , Wei Tian , Zheng Gao
IPC分类号： H01L29/82 , G11C11/02
CPC分类号： H01L43/08 , B82Y25/00 , B82Y40/00 , G11C11/16 , G11C11/1659 , G11C11/1675 , H01F10/3254 , H01F10/3268 , H01F41/303 , H01L43/12
摘要： A magnetic stack having a ferromagnetic free layer, a metal oxide layer that is antiferromagnetic at a first temperature and non-magnetic at a second temperature higher than the first temperature, a ferromagnetic pinned reference layer, and a non-magnetic spacer layer between the free layer and the reference layer. During a writing process, the metal oxide layer is non-magnetic. For magnetic memory cells, such as magnetic tunnel junction cells, the metal oxide layer provides reduced switching currents.
摘要翻译：具有铁磁自由层的磁性堆叠，在第一温度下为反铁磁性且在比第一温度高的第二温度下为非磁性的金属氧化物层，铁磁性固定基准层和非磁性间隔层之间，层和参考层。在写入过程中，金属氧化物层是非磁性的。对于诸如磁性隧道结电池的磁存储器单元，金属氧化物层提供降低的开关电流。

36. 发明授权

US08213259B2 Non-volatile memory cell with resistive sense element block erase and uni-directional write 有权
标题翻译：具有电阻感测元件块擦除和单向写入的非易失性存储单元
公开(公告)号：US08213259B2
公开(公告)日：2012-07-03
申请号：US12903011
申请日：2010-10-12
申请人： Daniel S. Reed , Yong Lu , Andrew John Carter , Hai Li
发明人： Daniel S. Reed , Yong Lu , Andrew John Carter , Hai Li
IPC分类号： G11C7/12 , G11C8/08 , G11C11/21 , G11C11/02 , G11C7/22
CPC分类号： G11C13/0097 , G11C11/1659 , G11C11/1675 , G11C13/0004 , G11C13/0011 , G11C13/003 , G11C13/0069 , G11C2013/009 , G11C2213/76
摘要： A non-volatile memory cell and associated method of use. In accordance with some embodiments, the memory cell includes a transistor comprising source and drain regions spanned by a gate region, and a resistive sense element (RSE) connected to the drain region of the transistor. The RSE is programmed to a first resistance by flowing a first write current through the RSE and then through the drain and source regions of the transistor. The RSE is programmed to a second resistance by flowing a second write current through the drain region and then through the RSE, the second write current bypassing the source region.
摘要翻译：非易失性存储单元及相关联的使用方法。根据一些实施例，存储器单元包括晶体管，其包括由栅极区域跨越的源极和漏极区域，以及连接到晶体管的漏极区域的电阻感测元件（RSE）。通过使第一写入电流流过RSE然后通过晶体管的漏极和源极区域将RSE编程为第一电阻。通过使第二写入电流流经漏极区域，然后通过RSE，将第二电阻编程为第二电阻，第二写入电流绕过源极区域。

37. 发明申请

US20120155160A1 MEMORY CONTROLLER AND METHOD FOR INTERLEAVING DRAM AND MRAM ACCESSES 有权
标题翻译：用于交互DRAM和MRAM访问的存储器控制器和方法
公开(公告)号：US20120155160A1
公开(公告)日：2012-06-21
申请号：US13328867
申请日：2011-12-16
申请人： Syed M. Alam , Thomas Andre , Dietmar Gogl
发明人： Syed M. Alam , Thomas Andre , Dietmar Gogl
IPC分类号： G11C7/00 , G11C11/02
CPC分类号： G06F3/0659 , G06F3/0611 , G06F3/0685 , G06F12/0246 , G06F12/0638 , G06F13/1694 , G06F2212/205 , G06F2212/7201 , G11C7/1042 , G11C7/1072 , G11C8/04 , G11C11/005 , G11C11/16 , G11C11/1673 , G11C11/1675 , G11C11/4076 , G11C11/4091 , G11C11/4094 , G11C11/4096 , G11C14/0036
摘要： A memory controller and method for interleaving volatile and non-volatile memory different latencies and page sizes are described wherein a single DDR3 memory controller communicates with a number of memory modules comprising of at least non-volatile memory, e.g., spin torque magnetic random access memory, integrated in a different Rank or Channel with a volatile memory, e.g., dynamic random access memory (DRAM).
摘要翻译：描述了用于交错易失性和非易失性存储器的不同延迟和页面大小的存储器控制器和方法，其中单个DDR3存储器控制器与包括至少非易失性存储器的多个存储器模块进行通信，例如，自旋转矩磁性随机存取存储器集成在具有易失性存储器的不同等级或信道中，例如动态随机存取存储器（DRAM）。

38. 发明授权

US08203874B2 Staggered magnetic tunnel junction 有权
标题翻译：交错磁隧道结
公开(公告)号：US08203874B2
公开(公告)日：2012-06-19
申请号：US12898831
申请日：2010-10-06
申请人： Xiaohua Lou
发明人： Xiaohua Lou
IPC分类号： G11C11/02
CPC分类号： H01L43/08 , G11C11/161 , G11C11/1675 , H01L29/66984
摘要： A staggered magnetic tunnel junction includes a free magnetic layer extending in a lateral direction between a first end portion and an opposing second end portion and a tunneling barrier disposed between a reference magnetic layer and the first end portion and forming a magnetic tunnel junction. Current flows through the free magnetic layer in the lateral direction to switch the magnetic tunnel junction between a high resistance state and a low resistance state.
摘要翻译：交错磁隧道结包括在第一端部和相对的第二端部之间沿横向方向延伸的自由磁性层和设置在参考磁性层与第一端部之间并形成磁性隧道结的隧道势垒。电流在横向上流过自由磁性层，以在高电阻状态和低电阻状态之间切换磁性隧道结。

39. 发明授权

US08199564B2 Thermally assisted multi-bit MRAM 有权
标题翻译：热辅助多位MRAM
公开(公告)号：US08199564B2
公开(公告)日：2012-06-12
申请号：US13160969
申请日：2011-06-15
申请人： Yuankai Zheng , Dimitar V. Dimitrov , Haiwen Xi
发明人： Yuankai Zheng , Dimitar V. Dimitrov , Haiwen Xi
IPC分类号： G11C11/02
CPC分类号： G11C11/15 , G11C11/1675 , G11C11/5607
摘要： Methods of writing to a multi-bit MRAM memory unit are described. The method includes to self-detected writing to a multi-bit (i.e., multilevel) thermally assisted MRAM. The self-detected writing increases a reading margin between data state levels and decreases reading margin variability due to cell resistance variation.
摘要翻译：描述写入多位MRAM存储器单元的方法。该方法包括对多位（即多级）热辅助MRAM进行自检测写入。自检的写入会增加数据状态级之间的读取余量，并降低由于单元格电阻变化而导致的读取边缘变化。

40. 发明授权

US08154914B2 Predictive thermal preconditioning and timing control for non-volatile memory cells 有权
标题翻译：非易失性存储单元的预测性热预处理和时序控制
公开(公告)号：US08154914B2
公开(公告)日：2012-04-10
申请号：US13016390
申请日：2011-01-28
申请人： Yiran Chen , Hai Li , Harry Hongyue Liu , Dimitar V. Dimitrov , Alan Xuguang Wang , Xiaobin Wang
发明人： Yiran Chen , Hai Li , Harry Hongyue Liu , Dimitar V. Dimitrov , Alan Xuguang Wang , Xiaobin Wang
IPC分类号： G11C11/02 , G11C7/00
CPC分类号： G11C11/1675 , G11C11/1659
摘要： A method and apparatus for using thermal preconditioning to write data to a non-volatile memory cell, such as a spin-torque transfer random access memory (STRAM) memory cell. In some embodiments, a logical state is written to an unconditioned non-volatile first memory cell associated with a first block address. Thermal preconditioning is concurrently applied to a non-volatile second memory cell associated with a second block address selected in response to the first block address.
摘要翻译：一种使用热预处理来将数据写入诸如自旋转矩传递随机存取存储器（STRAM）存储器单元的非易失性存储单元的方法和装置。在一些实施例中，将逻辑状态写入与第一块地址相关联的无条件非易失性第一存储器单元。热预处理同时应用于与响应于第一块地址选择的第二块地址相关联的非易失性第二存储器单元。

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