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31. 发明授权

US09641126B2 Systems and methods for I-Q imbalance calibration 有权
公开(公告)号：US09641126B2
公开(公告)日：2017-05-02
申请号：US14134813
申请日：2013-12-19
申请人： QUALCOMM Incorporated
发明人： Daniel Jose Fernandes Barros
IPC分类号： H04B1/38 , H03D3/00 , H04B7/0413 , H04L27/00 , H04B17/14 , H04B17/21 , H04L27/36 , H04L27/38
CPC分类号： H03D3/009 , H04B1/38 , H04B7/0413 , H04B17/14 , H04B17/21 , H04L27/0014 , H04L27/368 , H04L27/3863 , H04L2027/0067
摘要： A method for in-phase-quadrature (I-Q) imbalance calibration is described. A signal is transmitted by a first transmitter in a first system. The signal includes a constant value. The signal is received at a second receiver in a second system. An I-Q imbalance is estimated for the second receiver based on the received signal.

32. 发明授权

US09484988B2 Power supply device, power receiving device, charging system, and obstacle detection method 有权
标题翻译：电源装置，受电装置，充电系统和障碍物检测方法
公开(公告)号：US09484988B2
公开(公告)日：2016-11-01
申请号：US14378240
申请日：2013-02-08
申请人： Panasonic Corporation
发明人： Satoshi Nakaya , Tsuyoshi Nishio
IPC分类号： H02J7/00 , H04B5/00 , H02J5/00 , H01F38/14 , H03C1/00 , H03C3/00 , H03D1/00 , H03D3/00 , H02J7/02
CPC分类号： H04B5/0037 , H01F38/14 , H02J5/005 , H02J7/025 , H02J50/10 , H02J50/60 , H03C1/00 , H03C3/00 , H03D1/00 , H03D3/00
摘要： Provided are a power supply device, a power receiving device, a charging system, and an obstacle detection method that obtain a sufficient obstacle detection sensitivity even when an obstacle is small. A modulation unit (202) performs amplitude modulation or phase modulation on a test data sequence output from a test data sequence storage unit (201). A power control unit (203) generates, according to an instruction from a determination unit (204), a power control signal for increasing the power level of the test data sequence every time when the test data sequence is transmitted. The determination unit (204) determines whether there is an obstacle between the power receiving device and the power supply device based on whether the test data sequence output from the test data sequence storage unit (201) coincides with the test data sequence output from a power-transmitting-side receiving circuit (124).
摘要翻译：提供即使当障碍物小时也能够获得足够的障碍物检测灵敏度的电源装置，受电装置，充电系统和障碍物检测方法。调制单元（202）对从测试数据序列存储单元（201）输出的测试数据序列进行幅度调制或相位调制。功率控制单元（203）根据来自确定单元（204）的指令产生用于在每次发送测试数据序列时增加测试数据序列的功率电平的功率控制信号。确定单元（204）基于从测试数据序列存储单元（201）输出的测试数据序列是否与从电源输出的测试数据序列一致，确定在电力接收设备和电源设备之间是否存在障碍物 - 发射侧接收电路（124）。

33. 发明授权

US09450537B2 Method and apparatus to detect LO leakage and image rejection using a single transistor 有权
标题翻译：使用单个晶体管检测LO泄漏和图像抑制的方法和装置
公开(公告)号：US09450537B2
公开(公告)日：2016-09-20
申请号：US14467075
申请日：2014-08-25
申请人： Tensorcom, Inc.
发明人： KhongMeng Tham , Huainan Ma , Zaw Soe , Ricky Lap Kei Cheung
IPC分类号： G06G7/12 , H03D3/00 , H03D7/16
CPC分类号： H04B1/0475 , H03C2200/0058 , H03D3/008 , H03D3/009 , H03D7/125 , H03D7/165 , H04B1/04 , H04B1/0458 , H04B2001/0408
摘要： LO leakage and Image are common and undesirable effects in typical transmitters. Typically, thirty complex hardware and algorithms are used to calibrate and reduce these two impairments. A single transistor that draws essentially no de current and occupies a very small area, is used to detect the LO leakage and Image Rejection signals. The single transistor operating as a square law device, is used to mix the signals at the input and output ports of the power amplifier (PA). The mixed signal generated by the single transistor enables the simultaneous calibration of the LO leakage and Image Rejection.
摘要翻译： LO泄漏和图像在典型的发射器中是常见的和不良影响。通常，使用三十个复杂的硬件和算法来校准和减少这两个损伤。基本上没有去电流并占据非常小的面积的单个晶体管用于检测LO泄漏和图像抑制信号。作为平方律器件工作的单个晶体管用于混合功率放大器（PA）输入和输出端口的信号。由单个晶体管产生的混合信号可以同时校准LO泄漏和图像抑制。

34. 发明授权

US09438463B2 System for the correction of amplitude and phase errors of in-quadrature signals, corresponding receiver and method 有权
标题翻译：用于校正正交信号幅度和相位误差的系统，相应的接收机和方法
公开(公告)号：US09438463B2
公开(公告)日：2016-09-06
申请号：US14751339
申请日：2015-06-26
申请人： STMICROELECTRONICS S.R.L.
发明人： Leandro Grasso , Ranieri Guerra , Giuseppe Palmisano
IPC分类号： H04B1/12 , H04L27/38 , G06F17/10 , H04L27/00 , H03D3/00
CPC分类号： H04L27/3836 , G06F17/10 , H03D3/009 , H04L27/0014 , H04L27/3863 , H04L2027/003
摘要： A system may be for the correction of phase and amplitude errors. The system may receive a first input signal and a second input signal and supply a first output signal and a second output signal. The system may include two adders that supply the first and second output signals, respectively. The two adders may be configured for computing a sum of the first and second input signals, and multiplying the weighted sum by a third coefficient. Moreover, the first coefficient or the second coefficient of the first adder may be variable to enable correction of the phase errors, and the third coefficient of the second adder may be variable to enable correction of the amplitude errors.
摘要翻译：系统可以用于相位和振幅误差的校正。系统可以接收第一输入信号和第二输入信号，并提供第一输出信号和第二输出信号。该系统可以包括分别提供第一和第二输出信号的两个加法器。两个加法器可以被配置用于计算第一和第二输入信号的和，并将加权和乘以第三系数。此外，第一加法器的第一系数或第二系数可以是可变的，以使得能够校正相位误差，并且第二加法器的第三系数可以是可变的，以使得校正幅度误差。

35. 发明授权

US09385656B2 Low complexity frequency selective IQ mismatch digital RX balancer and TX inverse balancer for non-ideal RF front-end 有权
标题翻译：低复杂度频率选择性IQ失配数字RX平衡器和TX反平衡器，用于非理想RF前端
公开(公告)号：US09385656B2
公开(公告)日：2016-07-05
申请号：US13294129
申请日：2011-11-10
申请人： Ching-Yih Tseng , Wen-Sheng Cheng
发明人： Ching-Yih Tseng , Wen-Sheng Cheng
IPC分类号： H04B1/38 , H03D3/00 , H04B1/04
CPC分类号： H03D3/009 , H04B1/0475
摘要： A system for reducing a mismatch between an in-phase (I) signal and a quadrature phase (Q) signal is disclosed. The system includes a phase compensation block comprising an infinite impulse response (IIR) filter configured to reduce a first portion of a mismatch between an I signal and a Q signal, wherein the first portion includes frequency selective phase mismatch. The system further includes a gain compensation block comprising a finite impulse response (FIR) filter configured to reduce a second portion of the mismatch, wherein the second portion includes frequency selective gain mismatch. The phase compensation block and the gain compensation block are calibrated at least in part based on a loopback signal, wherein the loopback signal is routed from a transmitting portion of a radio frequency (RF) circuitry back to a receiving portion of the RF circuitry.
摘要翻译：公开了一种用于减小同相（I）信号和正交相位（Q）信号之间的失配的系统。该系统包括相位补偿块，该相位补偿块包括无限脉冲响应（IIR）滤波器，其被配置为减少I信号和Q信号之间的失配的第一部分，其中第一部分包括频率选择相位失配。该系统还包括增益补偿块，其包括被配置为减少失配的第二部分的有限脉冲响应（FIR）滤波器，其中第二部分包括频率选择增益失配。至少部分地基于环回信号校准相位补偿块和增益补偿块，其中环回信号从射频（RF）电路的发射部分路由到RF电路的接收部分。

36. 发明授权

US09306782B2 Systems and methods for narrowband signal quadrature error correction 有权
标题翻译：用于窄带信号正交纠错的系统和方法
公开(公告)号：US09306782B2
公开(公告)日：2016-04-05
申请号：US14657029
申请日：2015-03-13
申请人： Analog Devices, Inc.
发明人： Wei An , Yosef Stein
IPC分类号： H04L27/38 , H04L27/227 , H04L7/00 , H03D3/00
CPC分类号： H04L27/2276 , H03D3/009 , H04L7/0079 , H04L27/3863
摘要： Apparatus and method for quadrature error correction for narrowband or tone signal are disclosed. An analog circuit receives a modulated signal and processes in-phase signal and quadrature-phase signal in in-phase and quadrature-phase signal paths respectively. A digital signal processor performs discrete Fourier transform on each of the in-phase and quadrature-phase signals and determines statistical parameters responsive to mismatch characteristics to estimate quadrature error correction.
摘要翻译：公开了用于窄带或音调信号的正交纠错的装置和方法。模拟电路接收调制信号，分别处理同相和正交相信号路径中的同相信号和正交相位信号。数字信号处理器对每个同相和正交相位信号执行离散傅立叶变换，并且确定响应失配特性的统计参数以估计正交误差校正。

37. 发明授权

US09306621B2 Transceiver including a high latency communication channel and a low latency communication channel 有权
标题翻译：收发器包括高延迟通信信道和低延迟通信信道
公开(公告)号：US09306621B2
公开(公告)日：2016-04-05
申请号：US14498383
申请日：2014-09-26
申请人： Broadcom Corporation
发明人： Heng Zhang , Mehdi Khanpour , Jun Cao , Chang Liu , Afshin Momtaz
IPC分类号： H04B1/74 , H03D3/02 , H03D3/00 , H04L7/033
CPC分类号： H04B1/745 , H03D3/006 , H03D3/02 , H04L7/033
摘要： Methods, systems, and apparatuses are described for reducing the latency in a transceiver. A transceiver includes a high latency communication channel and a low latency communication channel that is configured to be a bypass channel for the high latency communication channel. The low latency communication channel may be utilized when implementing the transceiver is used in low latency applications. By bypassing the high latency communication channel, the high latency that is introduced therein (due to the many stages of de-serialization used to reduce the data rate for digital processing) can be avoided. An increase in data rate is realized when the low latency communication channel is used to pass data. A delay-locked loop (DLL) may be used to phase align the transmitter clock of the transceiver with the receiver clock of the transceiver to compensate for a limited tolerance of phase offset between these clocks.
摘要翻译：描述了减少收发器中的延迟的方法，系统和装置。收发器包括高延迟通信信道和被配置为高延迟通信信道的旁路信道的低延迟通信信道。当在低延迟应用中使用收发器时，可以利用低延迟通信信道。通过绕过高延迟通信信道，可以避免其中引入的高等待时间（由于用于减少数字处理的数据速率的许多解除序列化阶段）。当低延迟通信信道用于传递数据时，实现数据速率的增加。可以使用延迟锁定环（DLL）将收发器的发射机时钟与收发器的接收机时钟相位对准，以补偿这些时钟之间的相位偏移的有限公差。

38. 发明授权

US09231715B2 I/Q mismatch compensation method and apparatus 有权
标题翻译： I / Q失配补偿方法和装置
公开(公告)号：US09231715B2
公开(公告)日：2016-01-05
申请号：US14589584
申请日：2015-01-05
申请人： Samsung Electronics Co., Ltd.
发明人： Donghan Kim , Sungtae Choi , Jaehwa Kim , Yiju Roh , Sanghoon Lee
IPC分类号： H04B1/38 , H04B17/14 , H03D3/00 , H04L27/36 , H04L27/38 , H04B17/21 , H04B17/24 , H04L1/24
CPC分类号： H04B17/14 , H03D3/009 , H04B17/21 , H04B17/24 , H04L1/243 , H04L27/364 , H04L27/3863
摘要： An In-phase/Quadrature phase (I/Q) mismatch compensation method of a transceiver is provided. The method includes establishing a first loopback path between a transmitter and a receiver, transmitting a training sequence from the transmitter to the receiver through the established first loopback path, acquiring, at the receiver, a first correlation result value by correlating the training sequence received through the established first loopback path, establishing a second loopback path between the transmitter and the receiver, transmitting the training sequence from the transmitter to the receiver through the established second loopback path, acquiring, at the receiver, a second correlation result value by correlating the training sequence received through the second loopback path, and estimating I/Q mismatch values of the transmitter and the receiver using the first and second correlation result values.
摘要翻译：提供收发器的同相/正交相位（I / Q）失配补偿方法。该方法包括建立发射机和接收机之间的第一环回路径，通过建立的第一环回路径将训练序列从发射机发射到接收机，在接收机处通过将接收到的训练序列相关联来获取第一相关结果值建立的第一环回路径，在发射机和接收机之间建立第二环回路径，通过所建立的第二环回路径将训练序列从发射机发送到接收机，在接收机处通过将训练相关联来获取第二相关结果值通过第二环回路径接收的序列，以及使用第一和第二相关结果值估计发射机和接收机的I / Q不匹配值。

39. 发明授权

US09225567B2 Receiving apparatus and demodulation method 有权
标题翻译：接收装置和解调方法
公开(公告)号：US09225567B2
公开(公告)日：2015-12-29
申请号：US14623322
申请日：2015-02-16
申请人： Panasonic Corporation
发明人： Masahiko Sagisaka
IPC分类号： H03D3/00 , H04L27/144
CPC分类号： H04L27/144 , H04L27/265 , H04L27/28
摘要： A receiver simultaneously receives a plurality of signals on a plurality of channels, which have been modulated using frequency shift keying (FSK). A calculation range controller detects a Mark frequency and a Space frequency for each channel, determines for each channel a frequency range for Fourier transform calculation of the plurality of receiving signals, based on the detected Mark frequency and the detected Space frequency and indicates the frequency range to a frequency component detector. The frequency component detector performs Fourier transformation on the determined frequency range for each channel and detects, for each channel, frequency components (FFT signals) of the plurality of receiving signals respectively. The channel shifter allocates the FFT signals output from the frequency component detector to data of channel 1 to channel N and outputs the signals to respective demodulators.
摘要翻译：接收机同时在已经使用频移键控（FSK）调制的多个信道上接收多个信号。计算范围控制器检测每个通道的标记频率和空间频率，基于检测到的标记频率和检测到的空间频率，确定每个通道的多个接收信号的傅立叶变换计算的频率范围，并指示频率范围到频率分量检测器。频率分量检测器对于每个信道在确定的频率范围上执行傅里叶变换，并且针对每个信道分别检测多个接收信号的频率分量（FFT信号）。信道移位器将从频率分量检测器输出的FFT信号分配到信道1的数据到信道N，并将信号输出到各个解调器。

40. 发明授权

US09190955B2 Method for separating multi-component signals 有权
标题翻译：多分量信号分离方法
公开(公告)号：US09190955B2
公开(公告)日：2015-11-17
申请号：US14060733
申请日：2013-10-23
申请人： Mitsubishi Electric Research Laboratories, Inc.
发明人： Zafer Sahinoglu , Philip Orlik , Kieran Parsons
IPC分类号： H03D5/00 , H04L27/32 , H03D3/00
CPC分类号： H03D3/002 , H03D5/00 , H04L27/32
摘要： A method separates a multi-component signal by first estimating parameters of the signal. Then, using periodicity-based algebraic separation and energy-based demodulation, the signal is separated into components according to the parameters and constraints. Last, a Teager-Kaiser energy detector is applied to each component to provide a direct current signal for each component, and the constraint for each component used by the separating.
摘要翻译：一种方法通过首先估计信号的参数来分离多分量信号。然后，使用基于周期的代数分离和基于能量的解调，根据参数和约束将信号分成组成部分。最后，将Teager-Kaiser能量检测器应用于每个部件以为每个部件提供直流电流信号，以及由分离使用的每个部件的约束。

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