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31. 发明授权

US08941421B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08941421B2
公开(公告)日：2015-01-27
申请号：US14036763
申请日：2013-09-25
申请人： Renesas Electronics Corporation
发明人： Shigeki Nakamura , Shintaro Mori , Yoshinori Tokioka , Kenji Tokami
IPC分类号： H03L7/00 , H03L5/02 , H03K17/22
CPC分类号： H03K17/223 , H03K3/012 , H03L5/02
摘要： To provide a semiconductor device provided with a power-on reset circuit that can reliably detect decrease in power-supply voltage. The power-on reset circuit provided on the semiconductor device includes: a first comparison circuit that compares a primary voltage with a reference value; and a second comparison circuit that compares a secondary voltage with the reference value. The power-on reset circuit issues a reset signal based on comparison results of the first and second comparison circuits.
摘要翻译：提供一种设置有可以可靠地检测电源电压降低的上电复位电路的半导体器件。设置在半导体器件上的上电复位电路包括：将初级电压与参考值进行比较的第一比较电路; 以及将次级电压与参考值进行比较的第二比较电路。基于第一和第二比较电路的比较结果，上电复位电路发出复位信号。

32. 发明授权

US08933758B1 Bridge-stabilized oscillator with feedback control 有权
标题翻译：具有反馈控制的桥式稳压振荡器
公开(公告)号：US08933758B1
公开(公告)日：2015-01-13
申请号：US13954067
申请日：2013-07-30
申请人： Vadim Olen , Russell D. Wyse
发明人： Vadim Olen , Russell D. Wyse
IPC分类号： H03B5/12 , H03B5/14 , H03L5/02
CPC分类号： H03L5/02 , H03B5/26
摘要： A bridge-stabilized oscillator with feedback control includes an RF amplifier connected to a first bridge path and a second bridge path. Each first and second bridge path has a variable gain amplifier to receive and modify the respective signals to maintain the resistance of a resistor in the first bridge path, so the resonator in the second bridge path oscillates. A power detector provides a control signal to each of the variable gain amplifiers to maintain the phase of the output with respect to the input and constrain the gain in each of the first and second bridge paths.
摘要翻译：具有反馈控制的桥式稳压振荡器包括连接到第一桥路径和第二桥路径的RF放大器。每个第一和第二桥接路径具有可变增益放大器，用于接收和修改相应的信号以保持第一桥路中的电阻器的电阻，因此第二桥接路径中的谐振器振荡。功率检测器向每个可变增益放大器提供控制信号，以保持输出相对于输入的相位并约束第一和第二桥接路径中的每一个中的增益。

33. 发明申请

US20140354334A1 CIRCUIT AND METHOD OF ADJUSTING SYSTEM CLOCK IN LOW VOLTAGE DETECTION, AND LOW VOLTAGE RESET CIRCUIT 审中-公开
标题翻译：在低电压检测和低电压复位电路中调节系统时钟的电路和方法
公开(公告)号：US20140354334A1
公开(公告)日：2014-12-04
申请号：US14463684
申请日：2014-08-20
申请人： Realtek Semiconductor Corp.
发明人： Wen-Che Wu
IPC分类号： H03K19/003 , H03L5/02
CPC分类号： H03K19/00369 , G06F1/24 , G06F1/305 , H03L5/02
摘要： The present invention discloses a circuit and a method of adjusting system clock in low voltage detection, and a low voltage reset circuit. The circuit of adjusting system clock in low voltage detection comprises: a clock generator for supplying a clock to at least one circuit in a system; and a low voltage reset circuit for generating an adjustment signal according to a detected voltage level, so that the clock generator adjusts or stops the clock supplied to the at least one circuit in the system.
摘要翻译：本发明公开了一种在低电压检测中调整系统时钟的电路和方法，以及低电压复位电路。在低电压检测中调整系统时钟的电路包括：时钟发生器，用于向系统中的至少一个电路提供时钟; 以及低电压复位电路，用于根据检测到的电压电平产生调整信号，使得时钟发生器调节或停止提供给系统中的至少一个电路的时钟。

34. 发明申请

US20140298068A1 DISTRIBUTION OF POWER GATING CONTROLS FOR HIERARCHICAL POWER DOMAINS 有权
标题翻译：用于分层电源域的功率控制的分布
公开(公告)号：US20140298068A1
公开(公告)日：2014-10-02
申请号：US13854434
申请日：2013-04-01
申请人： ADVANCED MICRO DEVICES, INC.
发明人： Stephen V. Kosonocky , Christopher Spence Oliver , Sudha Thiruvengadam , Carson D. Henrion
IPC分类号： G06F1/32 , H03L5/02
CPC分类号： G06F1/3287 , Y02D10/171
摘要： An integrated circuit device includes a first module disposed within a first power domain, a second module disposed in a second power domain that is a sub-domain of the first power domain, first power gating logic, and second power gating logic. The first power gating logic generates a first virtual power supply for the first module. The second power gating logic is powered by the first virtual power supply for generating a second virtual power supply for the second power domain.
摘要翻译：集成电路装置包括布置在第一功率域内的第一模块，设置在作为第一功率域的子域的第二功率域中的第二模块，第一功率门控逻辑和第二功率门控逻辑。第一电源门控逻辑为第一模块生成第一虚拟电源。第二电源门控逻辑由第一虚拟电源供电，用于为第二电源域产生第二虚拟电源。

35. 发明申请

US20140232447A1 LEVEL SHIFT CIRCUIT 有权
标题翻译：水平移位电路
公开(公告)号：US20140232447A1
公开(公告)日：2014-08-21
申请号：US14182950
申请日：2014-02-18
申请人： Seiko Instruments Inc.
发明人： Kosuke TAKADA , Atsushi IGARASHI
IPC分类号： H03L5/02
CPC分类号： H03L5/02 , H03K3/356086 , H03K19/018507
摘要： There is provided a level shift circuit free from malfunction. The level shift circuit converts a signal of a first power supply voltage of a first supply terminal, which is supplied to an input terminal, into a signal of a second power supply voltage of a second supply terminal and outputs the converted signal to an output terminal. The level shift circuit has a control circuit that detects when the first power supply voltage reduces below a predetermined voltage. The voltage of the output terminal of the level shift circuit is fixed to the second power supply voltage or a ground voltage according to a detection signal of the control circuit.
摘要翻译：提供了一个没有故障的电平转换电路。电平移位电路将提供给输入端子的第一电源端子的第一电源电压的信号转换为第二电源端子的第二电源电压的信号，并将转换的信号输出到输出端子。电平移位电路具有检测第一电源电压何时降低到预定电压以下的控制电路。电平移位电路的输出端子的电压根据控制电路的检测信号固定在第二电源电压或接地电压上。

36. 发明申请

US20140184283A1 TIME SEQUENCE CIRCUIT FOR POWER SUPPLY UNIT 有权
标题翻译：电源单元的时间序列电路
公开(公告)号：US20140184283A1
公开(公告)日：2014-07-03
申请号：US14142917
申请日：2013-12-29
申请人： HON HAI PRECISION INDUSTRY CO., LTD. , HONG FU JIN PRECISION INDUSTRY (ShenZhen) Co., LTD.
发明人： HAI-QING ZHOU
IPC分类号： H03L5/02
CPC分类号： H03L5/02 , G06F1/24
摘要： A time sequencing circuit for a power supply unit to ensure the correct sequencing of system voltages for a computer from a power supply unit includes first to ninth resistors, first to fifth electronic switches, and a capacitor. Each of the first to fifth electronic switches includes first to third terminals. When the power supply unit outputs all required voltages, the power supply unit outputs a high-voltage level indicating power good and the computer can start up. If any one of the required voltages is not being outputted, the power supply unit outputs a low-voltage level good signal until any non-output of voltage is cured.
摘要翻译：用于电源单元的时间排序电路确保来自电源单元的计算机的系统电压的正确排序包括第一至第九电阻器，第一至第五电子开关和电容器。第一至第五电子开关中的每一个包括第一至第三端子。当电源单元输出所需的所有电压时，电源单元输出指示电源良好的高电压电平，并且计算机可以启动。如果没有输出所需电压中的任何一个，则电源单元输出低电压电平的良好信号，直到电压的任何非输出被固化为止。

37. 发明申请

US20140145765A1 VOLTAGE RAMP-UP PROTECTION 有权
标题翻译：电压保护
公开(公告)号：US20140145765A1
公开(公告)日：2014-05-29
申请号：US13686889
申请日：2012-11-27
申请人： FREESCALE SEMICONDUCTOR, INC.
发明人： Jon S. Choy , Richard Titov Lara Saez , Luis Eduardo Rueda Guerrero
IPC分类号： H03L5/02
CPC分类号： H03L5/02 , G05F1/613
摘要： Systems and methods for voltage ramp-up protection. In an illustrative, non-limiting embodiment, a method may include monitoring at least one of a first node or a second node, the first node configured to receive a first voltage greater than a second voltage present at a second node, and, in response to a slew rate of the first voltage creating a sneak condition between the first node and the second node, counteracting the sneak condition. For example, the sneak condition may favor an excess current to flow from the first node to the second node. In some cases, counteracting the sneak condition may include maintaining the second voltage below at or below a predetermined value.
摘要翻译：电压提升保护的系统和方法。在说明性的非限制性实施例中，方法可以包括监视第一节点或第二节点中的至少一个，第一节点被配置为接收大于第二节点处存在的第二电压的第一电压，并且作为响应达到第一电压的转换速率，在第一节点和第二节点之间产生潜行状态，抵消潜行状态。例如，潜行条件可能有利于从第一节点到第二节点的过量电流。在一些情况下，抵消潜行状态可以包括将第二电压维持在等于或低于预定值。

38. 发明授权

US08670335B2 Reduced power transmission 有权
标题翻译：降低功率传输
公开(公告)号：US08670335B2
公开(公告)日：2014-03-11
申请号：US12415705
申请日：2009-03-31
申请人： Ozdal Barkan , Tak-Lap Tsui
发明人： Ozdal Barkan , Tak-Lap Tsui
IPC分类号： H04L12/28 , H04L12/26 , G06F15/16 , G06F1/00 , G01R31/11 , H03L5/02
CPC分类号： H04L5/1438 , H04L12/12 , H04L25/0288
摘要： Reduced power transmission is described. In embodiments, networked devices communicate via a network connection. A characteristic of the network connection between the networked devices can be determined, and an output amplitude of a signal that is indicative of the communications between the network devices can be adjusted based on the characteristic of the network connection. Power consumption that is utilized for the communications between the network devices is reduced based on the adjustment of the output amplitude of the signal.
摘要翻译：描述了减少功率传输。在实施例中，网络设备经由网络连接进行通信。可以确定网络设备之间的网络连接的特性，并且可以基于网络连接的特性来调整指示网络设备之间的通信的信号的输出幅度。用于网络设备之间的通信的功耗基于信号的输出幅度的调整而减少。

39. 发明申请

US20140021985A1 SEMICONDUCTOR DEVICE INCLUDING POWER-ON RESET CIRCUIT 有权
标题翻译：包括上电复位电路的半导体器件
公开(公告)号：US20140021985A1
公开(公告)日：2014-01-23
申请号：US14039296
申请日：2013-09-27
申请人： FAIRCHILD KOREA SEMICONDUCTOR LTD.
发明人： Jung-ho LEE , Hyun-soo BAE , Won-hi OH , Jong-mu LEE
IPC分类号： H03L5/02
CPC分类号： H03L5/02 , G06F1/24 , H03K17/145 , H03K17/223
摘要： A semiconductor device including a power-on-reset (POR) circuit. The semiconductor device includes a driving voltage generator configured to generate a first voltage that rises at a first slope and subsequently rises at a second slope greater than the first slope and a first POR signal generator configured to receive the first voltage and generate a first POR signal having a first ramp-up time.
摘要翻译：一种包括上电复位（POR）电路的半导体器件。该半导体器件包括：驱动电压发生器，被配置为产生以第一斜率上升并随后以大于第一斜率的第二斜率上升的第一电压;以及第一POR信号发生器，被配置为接收第一电压并产生第一POR信号有第一个上升时间。

40. 发明申请

US20130141144A1 POWER-UP SIGNAL GENERATION CIRCUIT 有权
标题翻译：上电信号发生电路
公开(公告)号：US20130141144A1
公开(公告)日：2013-06-06
申请号：US13750245
申请日：2013-01-25
申请人： SK HYNIX INC.
发明人： Yong Deok CHO
IPC分类号： H03L5/02
CPC分类号： H03L5/02 , G11C7/20 , H03K17/22
摘要： A power-up signal generation circuit includes: a first section signal generation unit configured to sense a level of an external voltage and a level of an internal voltage and generate a first section signal; a second section signal generation unit configured to output a second section signal by buffering the first section signal when the internal voltage is lowered to below a minimum level; and a selective output unit configured to output the first section signal as a power-up signal, wherein the selective output unit outputs the second section signal as the power-up signal when a power-up section is ended and a mode register setting operation is performed.
摘要翻译：上电信号生成电路包括：第一部分信号生成部，被配置为感测外部电压的电平和内部电压的电平，并生成第一部分信号; 第二区间信号生成单元，被配置为当内部电压降低到最低水平时，通过缓冲第一区间信号来输出第二区间信号; 以及选择性输出单元，被配置为将所述第一区间信号输出为上电信号，其中所述选择性输出单元在上电部分结束时输出第二区间信号作为上电信号，并且模式寄存器设置操作为执行。

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