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    • 43. 发明授权
    • Storage apparatus and manufacturing method thereof
    • 储存装置及其制造方法
    • US07638382B2
    • 2009-12-29
    • US11501897
    • 2006-08-10
    • Kenichi MurookaToshiro Hiraoka
    • Kenichi MurookaToshiro Hiraoka
    • H01L21/336H01L21/8234
    • G11C11/22G11C11/221G11C23/00
    • A method of manufacturing a storage apparatus includes preparing a first substrate on which a plurality of row lines are arranged in parallel, preparing a second substrate on which a plurality of column lines are arranged in parallel, dispensing as a droplet a solution, in which particles are dispersed in a solvent, from a solution supply port to which an electric field is applied, toward a surface of the first substrate or a surface of the second substrate, and arranging the surfaces of the first and second substrates to face each other with a gap such that the column lines cross the row lines, thereby making the particles at crossing portions to be movable between the row lines and the column lines facing each other and between the crossing portions adjacent to each other.
    • 一种存储装置的制造方法,其特征在于,准备并列配置有多条行线的第一基板,准备并列配置有多条列线的第二基板,以液滴的形式配置粒子 从施加有电场的溶液供给口朝向第一基板的表面或第二基板的表面分散在溶剂中,并且使第一基板和第二基板的表面彼此面对 间隙,使得列线与行线交叉,从而使得交叉部分处的粒子能够在彼此相对的行线和列线之间以及彼此相邻的交叉部分之间移动。
    • 44. 发明授权
    • Nonvolatile semiconductor memory device and manufacturing method thereof
    • 非易失性半导体存储器件及其制造方法
    • US07569879B2
    • 2009-08-04
    • US11699334
    • 2007-01-30
    • Atsuhiro KinoshitaRiichiro ShirotaHiroshi WatanabeKenichi MurookaJunji Koga
    • Atsuhiro KinoshitaRiichiro ShirotaHiroshi WatanabeKenichi MurookaJunji Koga
    • H01L29/788
    • H01L27/115H01L27/11556H01L27/11568
    • A nonvolatile semiconductor memory device includes a semiconductor substrate, plural semiconductor columns arranged in a matrix form on the substrate, plural first conductive areas zonally formed in a column direction on the substrate between the semiconductor columns and functioning as word lines, plural second conductive areas formed at tops of the semiconductor columns, respectively, plural bit lines connecting the second conductive areas in a row direction, plural channel areas respectively formed in the semiconductor columns between the first and second conductive areas and contacting the first and second conductive areas, plural third conductive areas continuously formed via first insulating films above the substrate and opposite to the channel areas in the column direction between the semiconductor columns and functioning as control gates, and plural charge accumulation areas respectively formed via second insulating films at upper portions of the channel areas at a position higher than the third conductive areas.
    • 非易失性半导体存储器件包括:半导体衬底,以矩阵形式布置在衬底上的多个半导体柱,在半导体柱之间的衬底上的列方向上分区形成的多个第一导电区域,并且用作字线,形成多个第二导电区域 在半导体柱的顶部分别分别连接在行方向上的第二导电区域的多个位线,分别形成在第一和第二导电区域之间的半导体柱中并与第一和第二导电区域接触的多个沟道区域,多个第三导电 通过基板上方的第一绝缘膜连续形成的区域,并且与半导体柱之间的列方向上的沟道区域相对,并且用作控制栅极,以及分别在沟道区域的上部经由第二绝缘膜形成的多个电荷累积区域 位置高 她比第三个导电区域。
    • 46. 发明授权
    • X-ray mask, method of manufacturing the same, and X-ray exposure method
    • X射线掩模,其制造方法和X射线曝光方法
    • US06366639B1
    • 2002-04-02
    • US09337399
    • 1999-06-22
    • Mizunori EzakiKenichi Murooka
    • Mizunori EzakiKenichi Murooka
    • G21K500
    • G03F1/22G03F7/2039
    • In an X-ray exposure method of this invention, an X-ray mask unit in which a patterned X-ray absorber is formed on a membrane is supported. This patterned X-ray absorber contains one of an element having a density/atomic weight of 0.085 [g/cm3] or more and an L-shell absorption edge at a wavelength of 0.75 to 1.6 nm and an element having a density/atomic weight of 0.04 [g/cm3] or more and an M-shell absorption edge at a wavelength of 0.75 to 1.6 nm. Synchrotron radiation having maximum light intensity at a wavelength of 0.6 to 1 nm is applied onto the X-ray mask unit. This improves the exposure accuracy in X-ray exposure.
    • 在本发明的X射线曝光方法中,支撑在膜上形成图案化X射线吸收体的X射线掩模单元。 该图案化X射线吸收体含有密度/原子量为0.085 [g / cm 3]以上的元素和波长为0.75〜1.6nm的L壳吸收边缘和具有密度/原子量的元素 为0.04 [g / cm 3]以上,M波长为0.75〜1.6nm的M-壳吸收边。 将在波长0.6〜1nm处具有最大光强度的同步辐射施加到X射线掩模单元上。 这提高了X射线曝光中的曝光精度。