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51. 发明授权

US08593839B2 Accuracy of a volt-second clamp in an isolated DC-DC converter 有权
标题翻译：隔离式DC-DC转换器中的伏秒钳位精度
公开(公告)号：US08593839B2
公开(公告)日：2013-11-26
申请号：US12882806
申请日：2010-09-15
申请人： Charles Edward Hawkes
发明人： Charles Edward Hawkes
IPC分类号： G05F5/04
CPC分类号： H02M3/33507 , H02M2001/0022
摘要： A novel system and methodology for providing a volt-second clamp. A DC/DC conversion system configured for producing an output voltage in response to an input voltage has a transformer with a primary winding responsive to the input voltage and a secondary winding for producing the output voltage. The conversion system has a power switch coupled to the primary winding of the transformer and controlled with a converter control signal, such as a PWM control signal. The power switch is further controlled by a comparator that compares an input value supplied to its input with a variable reference value so as to prevent magnetic flux density of the transformer from increasing to an undesired level. The input value of the comparator is produced by a comparator input circuit as a function of the input voltage and an on-time of the power switch. A reference circuit produces the reference value that varies as a function of the input voltage.
摘要翻译：一种用于提供伏秒钳位的新型系统和方法。配置为响应于输入电压产生输出电压的DC / DC转换系统具有响应于输入电压的初级绕组的变压器和用于产生输出电压的次级绕组。转换系统具有耦合到变压器的初级绕组的功率开关，并通过诸如PWM控制信号的转换器控制信号来控制。电源开关进一步由比较器控制，该比较器将提供给其输入的输入值与可变参考值进行比较，以防止变压器的磁通密度增加到不期望的水平。比较器的输入值由比较器输入电路作为输入电压和电源开关导通时间的函数产生。参考电路产生随输入电压变化的参考值。

52. 发明申请

US20130257538A1 COMMON MODE INPUT CONTROL FOR SWITCHED CAPACITOR AMPLIFIER IN PIPELINE ANALOG-TO-DIGITAL CONVERTER 审中-公开
标题翻译：管道数模转换器中开关电容放大器的共模输入控制
公开(公告)号：US20130257538A1
公开(公告)日：2013-10-03
申请号：US13857935
申请日：2013-04-05
申请人： LINEAR TECHNOLOGY CORPORATION
发明人： Dave Thomas
IPC分类号： H03F3/45
CPC分类号： H03F3/45071 , H03F3/45475 , H03F3/45968 , H03F2200/405 , H03F2203/45101 , H03F2203/45634 , H03F2203/45726 , H03M1/1023 , H03M1/164
摘要： A common mode bias circuit may include a weak common mode bias generator and a common mode bias capacitance. During a first state of the common mode bias circuit, the weak common mode bias generator may be coupled to the common mode bias capacitance and may impart to them a predefined common mode signal level. During a second state of the common mode bias circuit, the common mode bias capacitance may be coupled to differential inputs of an amplifier in a manner that establishes an input common mode level for the amplifier.
摘要翻译：共模偏置电路可以包括弱共模偏置发生器和共模偏置电容。在共模偏置电路的第一状态期间，弱共模偏置发生器可以耦合到共模偏置电容，并且可以向它们赋予预定的共模信号电平。在共模偏置电路的第二状态期间，可以以确定放大器的输入共模电平的方式将共模偏置电容耦合到放大器的差分输入。

53. 发明授权

US08508211B1 Method and system for developing low noise bandgap references 有权
标题翻译：开发低噪声带隙参考的方法和系统
公开(公告)号：US08508211B1
公开(公告)日：2013-08-13
申请号：US12616996
申请日：2009-11-12
申请人： Michael Brian Anderson
发明人： Michael Brian Anderson
IPC分类号： H01L35/00 , G05F1/10 , G05F3/16
CPC分类号： G05F3/30
摘要： Method and system for developing low noise bandgap references. A stacked ΔVBE generator is disclosed for generating ΔVBE. The stacked ΔVBE generator includes an error amplifier configured to generate an output based on an error signal provided by a first stack of the ΔVBE generator. The first stack of the ΔVBE is coupled to a first sub-circuit and the error amplifier to form a closed loop. The first sub-circuit is coupled to a power supply and ground and configured to provide a source current between the power supply and the ground. The stacked ΔVBE generator also includes a second sub-circuit coupled to the output of the error amplifier, the first and second stacks, and the ground, as well as a second stack of the ΔVBE generator, which is coupled to the first stack and the second sub-circuit. The ΔVBE is measured at outputs of the first and second stacks and equals the sum of individual ΔVBEs of the first and second stacks.
摘要翻译：开发低噪声带隙参考的方法和系统。公开了用于产生DeltaVBE的叠加的DeltaVBE发生器。叠加的DeltaVBE发生器包括误差放大器，其被配置为基于由DeltaVBE发生器的第一堆叠提供的误差信号来产生输出。 DeltaVBE的第一堆叠耦合到第一子电路和误差放大器以形成闭环。第一子电路耦合到电源和地并且被配置为在电源和地之间提供源电流。叠加的DeltaVBE发生器还包括耦合到误差放大器，第一和第二堆叠和地面的输出的第二子电路，以及DeltaVBE发生器的第二堆叠，其耦合到第一堆叠和第二子电路。 DeltaVBE在第一和第二堆叠的输出处被测量，并且等于第一和第二堆叠的各个DeltaVBE的总和。

54. 发明授权

US08492884B2 Stacked interposer leadframes 有权
标题翻译：堆叠式插入式引线框架
公开(公告)号：US08492884B2
公开(公告)日：2013-07-23
申请号：US12795330
申请日：2010-06-07
申请人： David Alan Pruitt
发明人： David Alan Pruitt
IPC分类号： H01L23/495
CPC分类号： H01L23/495 , H01L21/50 , H01L23/492 , H01L23/49537 , H01L23/49562 , H01L2224/32245 , H01L2224/33181 , H01L2924/10253 , H01L2924/00
摘要： A stacked leadframe assembly is disclosed. The stacked leadframe assembly includes a first die having a surface that defines a mounting plane, a first leadframe stacked over and attached to the first die, a second die stacked over and attached to the first leadframe; and a second leadframe stacked over and attached to the second die. The leadframes have die paddles with extended side panels that have attachment surfaces in the mounting plane.
摘要翻译：公开了一种堆叠的引线框架组件。叠置的引线框架组件包括具有限定安装平面的表面的第一模具，堆叠并附接到第一模具的第一引线框架，堆叠并附接到第一引线框架的第二模具; 以及堆叠并附接到第二管芯的第二引线框架。引线框架具有带有延伸侧板的裸片，其在安装平面中具有附接表面。

55. 发明授权

US08483646B2 Second order intermodulation canceller 有权
标题翻译：二阶互调消除器
公开(公告)号：US08483646B2
公开(公告)日：2013-07-09
申请号：US13323744
申请日：2011-12-12
申请人： John P. Myers
发明人： John P. Myers
IPC分类号： H04B1/16
CPC分类号： H04B1/109
摘要： A technique for cancelling out target IM2 components in a wireless receiver's mixer output is disclosed. A differential RF signal and a differential local oscillator (LO) signal are mixed by a mixer to demodulate the RF signal. A first common node signal is generated between a first resistor and a second resistor coupled across the mixer's differential output terminals. A second common node signal is generated between a third resistor and a fourth resistor coupled across the differential output terminals, where a capacitor is coupled between the second common node and a power supply terminal. The second common node signal provides a stable reference signal for IM2 components above a certain frequency. The two common node signals are subtracted to create a difference signal. The difference signal is scaled by a scaling factor obtained during calibration. The scaled difference signal is coupled to the mixer output to offset IM2 distortion.
摘要翻译：公开了一种用于在无线接收机的混频器输出中消除目标IM2组件的技术。差分RF信号和差分本地振荡器（LO）信号由混频器混合以解调RF信号。第一公共节点信号在耦合在混频器的差分输出端子之间的第一电阻器和第二电阻器之间产生。第二公共节点信号在耦合在差分输出端子之间的第三电阻器和第四电阻器之间产生，其中电容器耦合在第二公共节点和电源端子之间。第二个公共节点信号为特定频率以上的IM2组件提供稳定的参考信号。减去两个公共节点信号以产生差分信号。差分信号由校准期间获得的缩放因子缩放。缩放差分信号耦合到混频器输出以偏移IM2失真。

56. 发明授权

US08482442B2 System and methods to improve the performance of semiconductor based sampling system 有权
标题翻译：提高半导体采样系统性能的系统和方法
公开(公告)号：US08482442B2
公开(公告)日：2013-07-09
申请号：US13155922
申请日：2011-06-08
申请人： David M. Thomas
发明人： David M. Thomas
IPC分类号： H03M1/00
CPC分类号： G11C7/02 , G11C27/024
摘要： Circuits and methods that improve the performance of electronic sampling systems are provided. Impedances associated with sampling semiconductor switches are maintained substantially constant during sample states, at least in part, by compensating for encountered input signal variations in order to reduce or minimize signal distortion associated with sampled signals that pass through the sampling switch.
摘要翻译：提供了提高电子采样系统性能的电路和方法。至少部分地通过补偿所遇到的输入信号变化以减少或最小化与通过采样开关的采样信号相关联的信号失真，在采样状态期间与采样半导体开关相关联的阻抗保持基本恒定。

57. 发明申请

US20130149981A1 Second Order Intermodulation Canceller 有权
标题翻译：二阶互调消除器
公开(公告)号：US20130149981A1
公开(公告)日：2013-06-13
申请号：US13323744
申请日：2011-12-12
申请人： John P. Myers
发明人： John P. Myers
IPC分类号： H04L27/06 , H03G3/20
CPC分类号： H04B1/109
摘要： A technique for cancelling out target IM2 components in a wireless receiver's mixer output is disclosed. A differential RF signal and a differential local oscillator (LO) signal are mixed by a mixer to demodulate the RF signal. A first common node signal is generated between a first resistor and a second resistor coupled across the mixer's differential output terminals. A second common node signal is generated between a third resistor and a fourth resistor coupled across the differential output terminals, where a capacitor is coupled between the second common node and a power supply terminal. The second common node signal provides a stable reference signal for IM2 components above a certain frequency. The two common node signals are subtracted to create a difference signal. The difference signal is scaled by a scaling factor obtained during calibration. The scaled difference signal is coupled to the mixer output to offset IM2 distortion.
摘要翻译：公开了一种用于在无线接收机的混频器输出中消除目标IM2组件的技术。差分RF信号和差分本地振荡器（LO）信号由混频器混合以解调RF信号。第一公共节点信号在耦合在混频器的差分输出端子之间的第一电阻器和第二电阻器之间产生。第二公共节点信号在耦合在差分输出端子之间的第三电阻器和第四电阻器之间产生，其中电容器耦合在第二公共节点和电源端子之间。第二个公共节点信号为特定频率以上的IM2组件提供稳定的参考信号。减去两个公共节点信号以产生差分信号。差分信号由校准期间获得的缩放因子缩放。缩放差分信号耦合到混频器输出以偏移IM2失真。

58. 发明授权

US08446159B2 Current sensor using leadframe as sensing element 有权
标题翻译：使用引线框作为传感元件的电流传感器
公开(公告)号：US08446159B2
公开(公告)日：2013-05-21
申请号：US12827455
申请日：2010-06-30
申请人： Edson Wayne Porter , Robert C. Chiacchia , Wan Wah Loh
发明人： Edson Wayne Porter , Robert C. Chiacchia , Wan Wah Loh
IPC分类号： G01R31/00 , G01R31/10
CPC分类号： G01R1/203 , H01L2224/48247 , H01L2224/49171 , H01L2924/3011 , H01L2924/00
摘要： A current sensor is disclosed. The current sensor includes a leadframe having a die paddle, a portion of the die paddle being configured as a resistive element through which current can flow, and an integrated circuit (IC) die attached and thermally coupled to the die paddle. The IC die includes a current sensing module configured to measure a voltage drop across the resistive element and convert the voltage drop measurement to a current measurement signal and a temperature compensation module electrically coupled to the current sensing module. The temperature compensation module is configured to adjust the current measurement signal to compensate for temperature-dependent changes in the resistive element. The temperature compensation module includes a temperature-sensitive element, with a portion of the temperature-sensitive element located directly over a portion of the resistive element.
摘要翻译：公开了一种电流传感器。电流传感器包括具有管芯焊盘的引线框架，管芯焊盘的一部分被配置为电流可以流过的电阻元件，以及附接并热耦合到管芯焊盘的集成电路（IC）管芯。 IC芯片包括电流感测模块，其被配置为测量电阻元件两端的电压降，并将电压降测量转换为电流测量信号，以及电耦合到电流感测模块的温度补偿模块。温度补偿模块被配置为调整电流测量信号以补偿电阻元件中与温度有关的变化。温度补偿模块包括温度敏感元件，其中一部分温度敏感元件位于电阻元件的一部分的正上方。

59. 发明申请

US20130099746A1 OPTIMIZED BI-DIRECTIONAL BALANCING METHOD AND SYSTEM 有权
标题翻译：优化的双向平衡方法和系统
公开(公告)号：US20130099746A1
公开(公告)日：2013-04-25
申请号：US13426277
申请日：2012-03-21
申请人： Samuel Hodson NORK , Brian J. SHAFFER
发明人： Samuel Hodson NORK , Brian J. SHAFFER
IPC分类号： H02J7/00
CPC分类号： B60L11/1866 , H01M10/425 , H01M2010/4271 , H02J7/0014 , H02J7/0018 , Y02E60/12 , Y02T10/7005 , Y02T10/7055 , Y02T10/7061
摘要： A battery balancing method and system which includes a plurality of cells connected in series, a balancer for each cell, a monitor configured to determine a state of charge (SOC) of each cell, and a microprocessor. The microprocessor iteratively calculates a SOC error for each cell, based on a theoretical balancing of the Min Q cell and the Max Q cell, until the SOC error is less than or equal to a first threshold; and iteratively re-calculates SOC error based on a net charge or discharge time for each balancer until the SOC error is less than or equal to a second threshold; and when the SOC error is less than or equal to the second threshold, instructs each balancer to physically balance each respective cell based on the respective calculated net charge or discharge time when the second threshold is met.
摘要翻译：一种电池平衡方法和系统，其包括串联连接的多个单元，每个单元的平衡器，配置成确定每个单元的充电状态（SOC）的监视器和微处理器。微处理器基于Min Q单元和Max Q单元的理论平衡迭代地计算每个单元的SOC误差，直到SOC误差小于或等于第一阈值; 并且基于每个平衡器的净充电或放电时间迭代地重新计算SOC误差，直到SOC误差小于或等于第二阈值; 并且当所述SOC误差小于或等于所述第二阈值时，指示每个平衡器基于当满足所述第二阈值时相应的计算出的净充电或放电时间对每个相应的单元进行物理平衡。

60. 发明申请

US20130076309A1 STACKABLE BI-DIRECTIONAL MULTICELL BATTERY BALANCER 有权
标题翻译：可堆叠双向电池电池平衡
公开(公告)号：US20130076309A1
公开(公告)日：2013-03-28
申请号：US13242836
申请日：2011-09-23
申请人： Samuel H. NORK , Mark R. VITUNIC
发明人： Samuel H. NORK , Mark R. VITUNIC
IPC分类号： H02J7/00
CPC分类号： H02J7/0018
摘要： A battery balancing system includes at least one sub-stack, each sub-stack comprising a plurality of cells connected in series. The system also includes a balancing module for each sub-stack comprising an independent bidirectional balancer for each cell in the sub-stack. The system includes a daisy chained stackable serial port. The balancing system senses a state of charge (SOC) of each cell in each sub-stack. The average SOC of the sub-stack is determined. For a weak cell, additional charge is provided from its respective sub-stack during the discharging of the battery. For a strong cell, additional charge is removed and provided to its respective sub-stack during discharging of the battery. Any number of sub-stacks can be stacked in series while maintaining the same serial control, allowing a theoretically unlimited number of cells to be supported from a single communication port without the need for additional digital isolators.
摘要翻译：电池平衡系统包括至少一个子堆叠，每个子堆叠包括串联连接的多个单元。该系统还包括用于每个子堆栈的平衡模块，其包括用于子堆栈中的每个小区的独立双向平衡器。该系统包括菊花链可堆叠串行端口。平衡系统感测每个子堆栈中每个单元的充电状态（SOC）。确定子堆的平均SOC。对于弱电池，在电池放电期间从其相应的子堆叠提供额外的电荷。对于强电池，在电池放电期间移除附加电荷并将其提供给其相应的子电池堆。任何数量的子堆叠都可以串联堆叠，同时保持相同的串行控制，从而允许从单个通信端口支持理论上无限数量的单元，而不需要额外的数字隔离器。

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