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51. 发明授权

US08638532B2 System and method for programming and controlling over current trip point limits in voltage regulators 有权
标题翻译：用于编程和控制电压调节器中过流跳闸点限制的系统和方法
公开(公告)号：US08638532B2
公开(公告)日：2014-01-28
申请号：US13532084
申请日：2012-06-25
申请人： Gustavo James Mehas , Atul Wokhlu , Naveen Jain , Xiaole Chen
发明人： Gustavo James Mehas , Atul Wokhlu , Naveen Jain , Xiaole Chen
IPC分类号： H02H7/00 , H02H9/00
CPC分类号： H02M1/32 , H02M3/155 , H02M2001/0012 , H02M2001/0022
摘要： A system and method for controlling an over current protection trip point for a voltage regulator includes an input for receiving a monitored operating parameter of the voltage regulator. Control logic responsive to this input generates a digital current control signal. A digital to analog controller converts the digital current control signal to an analog current control signal and this analog current control signal is used for controlling a current source for generating a current that establishes the over current protection trip point of the voltage regulator.
摘要翻译：用于控制电压调节器的过电流保护跳变点的系统和方法包括用于接收监控的电压调节器的操作参数的输入端。响应于该输入的控制逻辑产生数字电流控制信号。数字到模拟控制器将数字电流控制信号转换为模拟电流控制信号，该模拟电流控制信号用于控制电流源以产生建立电压调节器的过流保护跳变点的电流。

52. 发明授权

US08570014B2 Advanced clock synchronization circuit for switch mode power supplies 有权
标题翻译：高级时钟同步电路，用于开关电源
公开(公告)号：US08570014B2
公开(公告)日：2013-10-29
申请号：US13198179
申请日：2011-08-04
申请人： Steven Patrick Laur , Zbigniew Jan Lata , Jinyu Yang
发明人： Steven Patrick Laur , Zbigniew Jan Lata , Jinyu Yang
IPC分类号： G05F1/00 , G05F3/02 , G06F1/08 , H03K3/00 , H02M1/10
CPC分类号： H03L7/105 , H02M3/33561 , H02M2001/0041 , H03K5/135 , Y10T307/707
摘要： In a switch mode power supply, a circuit and method for switching between an internal clock and an external synchronization clock when a stable external clock has been detected, and for switching back to operating the power supply using said internal clock when a predetermined number of sequential external clock pulses exceed a predetermined switching period dropout threshold or are otherwise missing. In one embodiment, a power system comprises a plurality of power supplies connected in parallel to a common load and where each power supply is synchronized to the external clock when a stable external clock has been detected by each.
摘要翻译：在开关模式电源中，当检测到稳定的外部时钟时，用于在内部时钟和外部同步时钟之间切换的电路和方法，以及当预定数量的顺序时，切换回使用所述内部时钟来操作电源外部时钟脉冲超过预定的开关周期丢失阈值，否则丢失。在一个实施例中，电力系统包括与公共负载并联连接的多个电源，并且当每个电源均被每个电源检测到稳定的外部时钟时，每个电源与外部时钟同步。

53. 发明申请

US20130271193A1 CIRCUITS AND METHODS TO GUARANTEE LOCK IN DELAY LOCKED LOOPS AND AVOID HARMONIC LOCKING 审中-公开
标题翻译：电路和保护锁定延迟锁定的方法和避免谐波锁定
公开(公告)号：US20130271193A1
公开(公告)日：2013-10-17
申请号：US13532241
申请日：2012-06-25
申请人： Colby Keith
发明人： Colby Keith
IPC分类号： H03L7/08
CPC分类号： H03L7/0812 , H03L7/0816 , H03L7/089 , H03L7/093 , H03L7/10
摘要： A delay locked loop (DLL) includes a phase detector (PD), a lock assistor (LA), a control voltage generator, and a voltage controlled delay line (VCDL). The PD determines a phase difference between of a reference clock and a delayed version of the reference clock and produces a pair of phase detector output signals in dependence on the determined phase difference. The LA receives the pair of phase detector output signals and produces a pair of lock assist output signals by selectively swapping the phase detector output signals. The control voltage generator receives the pair of lock assist output signals and produces a control voltage signal in dependence on thereon. The VCDL receives the control voltage signal and the reference clock (or a buffered version thereof) and outputs the delayed version of the reference clock, with a delay through the VCDL being dependent on the received control voltage signal.
摘要翻译：延迟锁定环路（DLL）包括相位检测器（PD），锁相器（LA），控制电压发生器和电压控制延迟线（VCDL）。 PD确定参考时钟和参考时钟的延迟版本之间的相位差，并根据所确定的相位差产生一对相位检测器输出信号。 LA通过选择性地交换相位检测器输出信号，接收一对相位检测器输出信号并产生一对锁定辅助输出信号。控制电压发生器接收一对锁定辅助输出信号，并根据其产生控制电压信号。 VCDL接收控制电压信号和参考时钟（或其缓冲版本），并输出参考时钟的延迟版本，通过VCDL的延迟取决于接收到的控制电压信号。

54. 发明申请

US20130127557A1 SYSTEM AND METHOD OF MAINTAINING GAIN LINEARITY OF VARIABLE FREQUENCY MODULATOR 有权
标题翻译：维持变频调制器的增益线性的系统和方法
公开(公告)号：US20130127557A1
公开(公告)日：2013-05-23
申请号：US13537708
申请日：2012-06-29
申请人： M. Jason Houston , Steven P. Laur , Rhys S.A. Philbrick
发明人： M. Jason Houston , Steven P. Laur , Rhys S.A. Philbrick
IPC分类号： H03K7/06
CPC分类号： H03K7/08 , H02M3/156 , H02M3/1563 , H03K3/0231 , H03K7/06 , H03K7/10
摘要： A variable frequency modulator including a compensation network, first and second pulse control networks and a linearity controller. The compensation network is configured to provide a compensation signal indicative of an output load condition. The first pulse control network is configured to initiate pulses on a pulse control signal and to adjust operating frequency based on changes of the compensation signal. The second pulse control network is configured to terminate the pulses on the pulse control signal based on a predetermined timing parameter. The linearity controller is configured to adjust timing of terminating the pulses based on a predetermined steady state operating frequency and an actual operating frequency to maintain modulator gain at a constant level.
摘要翻译：一种包括补偿网络，第一和第二脉冲控制网络和线性控制器的可变频率调制器。补偿网络被配置为提供表示输出负载条件的补偿信号。第一脉冲控制网络被配置为在脉冲控制信号上启动脉冲，并且基于补偿信号的变化来调整工作频率。第二脉冲控制网络被配置为基于预定的定时参数终止脉冲控制信号上的脉冲。线性控制器被配置为基于预定的稳态工作频率和实际工作频率来调整终止脉冲的定时，以将调制器增益维持在恒定水平。

55. 发明申请

US20130120761A1 OPTICAL PROXIMITY SENSORS WITH OFFSET COMPENSATION 有权
标题翻译：具有偏移补偿的光学接近传感器
公开(公告)号：US20130120761A1
公开(公告)日：2013-05-16
申请号：US13360168
申请日：2012-01-27
申请人： Kenneth C. Dyer , Xijian Lin
发明人： Kenneth C. Dyer , Xijian Lin
IPC分类号： G01B11/14
CPC分类号： G01S7/481 , G01C3/08 , G01S7/4912 , G01S17/026
摘要： An optical proximity sensor includes a driver, light detector and offset signal generator. The driver selectively drives a light source. The light detector produces an analog detection signal indicative of an intensity of light detected by the light detector. The detected light can include light transmitted by the light source that reflected off an object within the sense region of the optical sensor, interference light and ambient light. The interference light includes light transmitted by the light source, and detected by the light detector, that was not reflected off an object within the sense region of the optical sensor. The offset signal generator selectively produces an analog offset signal that is combined with the analog detection signal produced by the photodetector to produce an analog compensated detection signal. The analog offset signal compensates for at least a portion of the interference light included in the light detected by the photodetector.
摘要翻译：光学接近传感器包括驱动器，光检测器和偏移信号发生器。驱动器选择性地驱动光源。光检测器产生指示由光检测器检测到的光的强度的模拟检测信号。检测到的光可以包括由光源透射的光，该光从光学传感器的感测区域内的物体反射，干涉光和环境光。干涉光包括由光源透射并由光检测器检测到的光，其不被光学传感器的感测区域内的物体反射。偏移信号发生器选择性地产生与由光电检测器产生的模拟检测信号组合以产生模拟补偿检测信号的模拟偏移信号。模拟偏移信号补偿光检测器检测到的光中包含的干涉光的至少一部分。

56. 发明申请

US20130100562A1 ELECTROSTATIC DISCHARGE CLAMP WITH CONTROLLED HYSTERESIS INCLUDING SELECTABLE TURN ON AND TURN OFF THRESHOLD VOLTAGES 审中-公开
标题翻译：具有可控选择开启和关闭阈值电压的控制滞后的静电放电钳
公开(公告)号：US20130100562A1
公开(公告)日：2013-04-25
申请号：US13714096
申请日：2012-12-13
申请人： Intersil Americas LLC
发明人： Gregg D. Croft
IPC分类号： H02H9/04 , H05K3/32
CPC分类号： H02H9/044 , H01L27/0251 , H01L2924/0002 , H05K3/32 , Y10T29/49117 , H01L2924/00
摘要： An electrostatic discharge (ESD) clamp for coupling between first and second nodes for providing ESD protection including first and second voltage threshold circuits. The clamp circuit limits operating voltage between the first and second nodes to a maximum level when activated. The first and second voltage threshold circuits each have a selectable threshold voltage, such as by coupling one or more voltage threshold devices in series. The first and second voltage threshold circuits trigger to turn on the clamp circuit when the operating voltage increases above a first voltage threshold. The voltage threshold circuits are turned off to turn off the clamp circuit when the operating voltage decreases to the second threshold voltage. The second threshold voltage may be selected at any level above the nominal operating voltage to prevent the clamp from latching.
摘要翻译：用于在第一和第二节点之间耦合用于提供包括第一和第二电压阈值电路的ESD保护的静电放电（ESD）钳位。钳位电路将第一和第二节点之间的工作电压限制为最大电平。第一和第二电压阈值电路各自具有可选择的阈值电压，例如通过串联耦合一个或多个电压阈值器件。当工作电压增加到高于第一电压阈值时，第一和第二电压阈值电路触发钳位电路接通。当工作电压降低到第二阈值电压时，电压阈值电路被关断以关闭钳位电路。可以在高于额定工作电压的任何电平上选择第二阈值电压，以防止钳位锁定。

57. 发明申请

US20130088209A1 SYSTEM AND METHOD FOR CURRENT LIMITING A DC-DC CONVERTER 有权
标题翻译：限流直流 - 直流转换器的系统和方法
公开(公告)号：US20130088209A1
公开(公告)日：2013-04-11
申请号：US13687090
申请日：2012-11-28
申请人： Intersil Americas LLC
发明人： CONGZHONG HUANG , SICHENG CHEN , XUELIN WU
IPC分类号： G05F1/46
CPC分类号： G05F1/46 , H02M1/15 , H02M1/32 , H02M3/1582
摘要： A DC-DC voltage converter has a pair of switching transistors to provide an output voltage and are alternately switched in a boost mode of operation responsive to control signals. An inductor is connected to the pair of switching transistor and has an inductor current flowing there through. A current sensor monitors an input current and generates a current sense signal responsive thereto. Control circuitry generates the control signals to the second pair of switching transistors responsive to the current sense signal, the output voltage and a current limit signal, wherein when the current limit signal indicates the inductor current exceeds a current limit the control signals configure the pair of switching transistors to decrease the inductor current.
摘要翻译： DC-DC电压转换器具有一对开关晶体管以提供输出电压，并且响应于控制信号而在升压操作模式中交替切换。电感器连接到该对开关晶体管，并且具有在其中流过的电感器电流。电流传感器监测输入电流并响应于此产生电流检测信号。响应于电流感测信号，输出电压和电流限制信号，控制电路产生对第二对开关晶体管的控制信号，其中当电流限制信号指示电感器电流超过电流限制时，控制信号配置一对开关晶体管降低电感电流。

58. 发明申请

US20130019039A1 SYSTEM AND METHOD FOR OPERATING A ONE-WIRE PROTOCOL SLAVE IN A TWO-WIRE PROTOCOL BUS ENVIRONMENT 审中-公开
标题翻译：在双线协议总线环境中运行单线协议的系统和方法
公开(公告)号：US20130019039A1
公开(公告)日：2013-01-17
申请号：US13492277
申请日：2012-06-08
申请人： Timothy James HERKLOTS
发明人： Timothy James HERKLOTS
IPC分类号： G06F13/42
CPC分类号： H04L61/35 , H04J3/0602 , H04L61/6004 , H04L61/6022
摘要： A method for transmitting data on a data line of a two-wire bus wherein the bus includes a data line and a clock line includes the step of pulling the data line of the two-wire bus low to define a start condition. Next, a first group of fixed data bits enabling a slave device to determine a clock signal for an address portion of a transmission of data are transmitted between a master device and the slave device. An address of the slave device is transmitted from the master device in a second group of data bits. A third group of fixed data bits enabling the slave device to determine the clock signal for a data portion of the transmission of data between the master device and the slave device are transmitted from the master device to the slave device.
摘要翻译：一种用于在双线总线的数据线上发送数据的方法，其中总线包括数据线和时钟线包括将两线总线的数据线拉低以定义起始条件的步骤。接下来，在主设备和从设备之间传送使得从设备能够确定数据传输的地址部分的时钟信号的第一组固定数据位。从设备的地址以第二组数据位从主设备发送。从主设备向从设备发送第三组固定数据位，使得从设备能够确定主设备和从设备之间的数据传输的数据部分的时钟信号。

59. 发明申请

US20120312962A1 OPTICAL SENSORS FOR DETECTING RELATIVE MOTION AND/OR POSITION AND METHODS AND SYSTEMS FOR USING SUCH OPTICAL SENSORS 有权
标题翻译：用于检测相对运动和/或位置的光学传感器以及使用这种光学传感器的方法和系统
公开(公告)号：US20120312962A1
公开(公告)日：2012-12-13
申请号：US13584623
申请日：2012-08-13
申请人： Francois Hebert
发明人： Francois Hebert
IPC分类号： G01J1/44 , G01J1/04
CPC分类号： H01L31/02327 , G02B5/208 , G06F3/0304 , G06F3/03547 , G06F3/042 , G06F3/0421 , G06F3/04883 , H01L31/02162
摘要： A system according to an embodiment of the present invention includes one or more first optical sensors and one or more second optical sensors. The first optical sensor(s) each include a photodetector region and a plurality of first slats over the photodetector region. The second optical sensor(s) each include a photodetector region and a plurality of second slats over the photodetector region, wherein the second slats have a different configuration than the first slats. For example, the second slats can be orthogonal relative to the first slats. For another example, the first slats can slant in a first direction, and the second slats can slant in a second direction generally opposite the first direction. Currents produced by the first optical sensor(s) and the second optical sensor(s), which are indicative of light incident on the optical sensors, are useful for distinguishing between movement in at least two different directions.
摘要翻译：根据本发明实施例的系统包括一个或多个第一光学传感器和一个或多个第二光学传感器。第一光学传感器各自包括光电检测器区域和光电检测器区域上的多个第一板条。第二光学传感器各自包括光电检测器区域和光电检测器区域上的多个第二板条，其中第二板条具有与第一板条不同的构造。例如，第二板条可以相对于第一板条正交。对于另一示例，第一板条可以在第一方向上倾斜，并且第二板条可以在大致与第一方向相反的第二方向上倾斜。由第一光学传感器和第二光学传感器产生的指示入射在光学传感器上的光的电流可用于区分至少两个不同方向上的运动。

60. 发明申请

US20120268063A1 CHARGING SYSTEM WITH ADAPTIVE POWER MANAGEMENT 有权
公开(公告)号：US20120268063A1
公开(公告)日：2012-10-25
申请号：US13456187
申请日：2012-04-25
申请人： Weihong Qiu , Xiaozhou Zhou , Jun Liu , Bertram J. Rodgers, III
发明人： Weihong Qiu , Xiaozhou Zhou , Jun Liu , Bertram J. Rodgers, III
IPC分类号： H02J7/00 , H02M7/04
CPC分类号： H02J7/022 , H02J7/045
摘要： An embodiment of a charger may include an input, at least one switch having a first node coupled to a reference voltage, a current sensor coupled between the input and a second node of the at least one switch, an output coupled to a third node of the at least one switch, and a charge controller coupled to the input to determine an input voltage, to the current sensor to determine an input current and to control inputs of the at least one switch. The at least one switch may be responsive to control signals supplied by the charge controller to the control inputs thereof to control voltage and current at the output of the charger. The charge controller may be responsive to the input voltage and the input current to produce the control signals in a manner that maximizes electrical power drawn at the input.

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