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61. 发明授权

US08832471B2 Power management system utilizing a transaction terminator 有权
标题翻译：电力管理系统利用交易终止符
公开(公告)号：US08832471B2
公开(公告)日：2014-09-09
申请号：US13387066
申请日：2010-07-23
申请人： Bernard Ramanadin , Tedder Meng , Wei Tao Wang , Robert (Yanxim) Chen , Gabriel Duffy
发明人： Bernard Ramanadin , Tedder Meng , Wei Tao Wang , Robert (Yanxim) Chen , Gabriel Duffy
IPC分类号： G06F1/00 , G06F1/32 , H03K17/16 , H04L12/403 , G06F11/14
CPC分类号： H04L12/403 , G06F11/1441
摘要： A system comprises a central processing unit (10), an interconnection bus (1), and a plurality of functional modules (11-15, 21) corresponding to distinct power domains and able to communicate with each other and/or with the central processing unit via the bus. At least one of the power domains, and is configured to be substituted for a slave functional module (21) of the power domain when the power to the power domain is turned off by the central processing unit. It signals an error in response to any request of a transaction that is in progress between the slave functional module and a master functional module at the moment the power is turned off.
摘要翻译：一种系统包括中央处理单元（10），互连总线（1）和对应于不同功率域并且能够彼此通信和/或中央处理的多个功能模块（11-15,21）通过公共汽车单位。至少一个功率域，并且被配置为由功率域的从功能模块（21）代替功率域的功率由中央处理单元关闭。它响应于在电源关闭时在从功能模块和主功能模块之间正在进行的事务的任何请求的响应中发出错误。

62. 发明申请

US20140250290A1 Method for Software Anti-Rollback Recovery 审中-公开
标题翻译：软件反卷恢复方法
公开(公告)号：US20140250290A1
公开(公告)日：2014-09-04
申请号：US13781852
申请日：2013-03-01
申请人： ST-ERICSSON SA
发明人： Per Ståhl , Håkan Englund , Hans Holmberg
IPC分类号： G06F9/44
CPC分类号： G06F9/4401 , G06F21/575 , H04L9/0897 , H04L9/3247
摘要： A temporary anti-rollback table—which is cryptographically signed, unique to a specific device, and includes a version number—is provided to an electronic device requiring a replacement anti-rollback table. The table is verified by the device, and loaded to memory following a reboot. The memory image of the table is used to perform anti-rollback verification of all trusted software components as they are loaded. After booting, the memory image of the table is written in a secure manner to non-volatile memory as a replacement anti-rollback table, and the temporary anti-rollback table is deleted. The minimum required table version number in OTP memory is incremented. The temporary anti-rollback table is created and signed using a private key at authorized service centers; a corresponding public key in the electronic device verifies its authenticity.
摘要翻译：向需要更换防折返表的电子设备提供临时防折返表，该表被加密地签名，并且包括特定设备，并且包括版本号。该表由设备验证，并在重新启动后加载到内存。表的内存映像用于在所有受信任的软件组件加载时对所有受信任的软件组件进行反卷回验证。引导后，表的内存映像以安全的方式写入非易失性存储器作为替换的反滚动表，并且删除了临时防回滚表。 OTP内存中最小的所需表版本号增加。在授权服务中心使用私钥创建和签名临时防折返表; 电子设备中的相应公钥验证其真实性。

63. 发明授权

US08818314B2 Filtering interference detected at wireless receiver 有权
标题翻译：在无线接收机上检测到过滤干扰
公开(公告)号：US08818314B2
公开(公告)日：2014-08-26
申请号：US13695473
申请日：2011-05-18
申请人： Ajay Kapoor , Maurice Stassen
发明人： Ajay Kapoor , Maurice Stassen
IPC分类号： H04B1/10
CPC分类号： H04B1/1036
摘要： A wireless receiver for UWB or other format receives a useful signal in a particular band of frequencies in spite of interference components. The wireless receiver has two or more different types of tunable band reject filter, involves detecting interference in the received signal, and selecting which of the different types of filter to use according to thresholds of parameters of the detected interference. The filter is then tuned according to the detected interference and the useful signal is then received with the interference suppressed using the selected BRF. As the different types of filters have different drawbacks and benefits, by having multiple types, and selecting which to use according to the detected interference, the filtering can be better matched to the detected interference, or the drawbacks can be reduced for example.
摘要翻译：用于UWB或其他格式的无线接收器尽管存在干扰分量而在特定频带中接收有用信号。无线接收机具有两种或多种不同类型的可调波段抑制滤波器，涉及检测接收信号中的干扰，并根据检测到的干扰参数的阈值选择使用不同类型的滤波器。然后根据检测到的干扰对滤波器进行调谐，然后使用所选择的BRF抑制干扰，接收有用信号。由于不同类型的滤波器具有不同的缺陷和益处，通过具有多种类型，并且根据检测到的干扰选择使用哪种类型，滤波可以更好地与检测到的干扰相匹配，或者可以减少例如缺点。

64. 发明申请

US20140228070A1 Resources Control in a Multi Sim Terminal 审中-公开
标题翻译：多模拟终端资源控制
公开(公告)号：US20140228070A1
公开(公告)日：2014-08-14
申请号：US13977350
申请日：2011-12-22
申请人： Nicolas Josso , Erwan Preteseille , Sylviane Rollier
发明人： Nicolas Josso , Erwan Preteseille , Sylviane Rollier
IPC分类号： H04M1/02
CPC分类号： H04M1/0202 , H04W8/183 , H04W48/18 , H04W68/00 , H04W88/06 , H04W88/18
摘要： There is described the controlling of a multiple subscriber identity arrangement comprising a modem (10), and a control unit (13) associated with the modem. The modem is capable of receiving messages related to at least two subscriber identities, but not simultaneously, and comprises a listening block (11) capable of monitoring at least one signalling channel associated with the second subscriber identity. The control unit (13) is configured to interrupt ongoing communication activity on the first subscriber identity during at least one signalling occasion (41,42,51,52) associated with the second subscriber identity and cause the listening block of the modem to monitor the signalling channel associated to the second subscriber identity during said occasion.
摘要翻译：描述了包括调制解调器（10）和与调制解调器相关联的控制单元（13）的多用户识别装置的控制。调制解调器能够接收与至少两个用户标识相关但不是同时的消息，并且包括能够监视与第二用户标识相关联的至少一个信令信道的监听块（11）。控制单元（13）被配置为在与第二用户身份相关联的至少一个信令场合（41,42,51,52）期间中断在第一用户身份上的正在进行的通信活动，并且使调制解调器的监听块监视在所述场合期间与第二用户身份相关联的信令信道。

65. 发明申请

US20140226600A1 Channel Estimation Method, Channel Estimation Apparatus and Communication Device for CDMA Systems 有权
标题翻译：信道估计方法，CDMA系统的信道估计装置和通信装置
公开(公告)号：US20140226600A1
公开(公告)日：2014-08-14
申请号：US14342601
申请日：2011-09-14
申请人： Zhixun Tang , Xie Li , Liping Zhang
发明人： Zhixun Tang , Xie Li , Liping Zhang
IPC分类号： H04L5/00 , H04L25/02
CPC分类号： H04L5/0073 , H04B1/7107 , H04B2201/709745 , H04L25/0202 , H04L25/0204
摘要： The embodiment of the invention discloses a channel estimation method for a TD-SCDMA system. The channel estimation method comprises steps of: obtaining a coarse channel estimation of a channel 1 of an intra-frequency cell set by a single cell channel estimation algorithm; performing an interference cancellation on the coarse channel estimation to obtain a channel estimation; determining a channel environment according to the channel estimation; and determining a stop strategy for the interference cancellation according to the channel environment and controlling performing the interference cancellation according to the stop strategy. The embodiment of the invention also discloses a channel estimation apparatus for a TD-SCDMA system, a communication device and a computer program executing the channel estimation method.
摘要翻译：本发明的实施例公开了一种用于TD-SCDMA系统的信道估计方法。信道估计方法包括以下步骤：通过单个小区信道估计算法获得频率小区集合的信道1的粗略信道估计; 对粗略信道估计执行干扰消除以获得信道估计; 根据信道估计确定信道环境; 以及根据所述信道环境确定所述干扰消除的停止策略，并且根据所述停止策略来控制执行所述干扰消除。本发明的实施例还公开了一种用于TD-SCDMA系统的信道估计装置，执行信道估计方法的通信装置和计算机程序。

66. 发明授权

US08804386B2 Charge pump circuit with pulse-width modulation 有权
标题翻译：脉冲宽度调制电荷泵电路
公开(公告)号：US08804386B2
公开(公告)日：2014-08-12
申请号：US13388516
申请日：2010-08-03
申请人： Laurent Chevalier
发明人： Laurent Chevalier
IPC分类号： H02M3/07
CPC分类号： H02M3/07 , H02M2001/0032 , H03F3/181 , Y02B70/16
摘要： Each switching element of a charge pump circuit of a voltage regulator comprises a relatively small-sized MOS transistor associated with a relatively large-sized MOS transistor connected in parallel. Only the small transistors are switched in a first mode of operation, while the large transistors are switched in a second mode of operation. In this manner the switching losses in the first mode of operation can be decreased.
摘要翻译：电压调节器的电荷泵电路的每个开关元件包括与并联连接的相对大尺寸的MOS晶体管相关联的相对较小尺寸的MOS晶体管。只有小晶体管在第一操作模式下被切换，而大晶体管在第二操作模式下被切换。以这种方式，可以降低第一操作模式中的开关损耗。

67. 发明申请

US20140223211A1 Regulating the Activity of a Core 有权
标题翻译：规范核心活动
公开(公告)号：US20140223211A1
公开(公告)日：2014-08-07
申请号：US14343175
申请日：2012-09-06
申请人： Gilles Ries , Abdelaziz Goulahsen
发明人： Gilles Ries , Abdelaziz Goulahsen
IPC分类号： G06F1/32
CPC分类号： G06F1/3206 , G06F1/206 , G06F1/324 , G06F1/3296 , G06F11/00 , Y02D10/126
摘要： It is proposed a method for regulating the activity of a core running at a given clock rate. The method comprises: monitoring (S100) a value of a parameter of the core, the parameter being a critical parameter for a safe operating of the core; determining whether the monitored value reaches a trigger value; when the monitored value reaches the trigger value (S120): modifying the clock rate of the core (S130) by decreasing the ratio of active cycles of the clock; and running the core at the clock rate modified (S140) by decreasing the ratio of active cycles of the clock; when the monitored value reaches a second time the trigger value (S170): modifying the clock rate of the core (S180) by increasing the ratio of active cycles of the clock; and running the core at the clock rate (S190) modified by increasing the ratio of active cycles of the clock.
摘要翻译：提出了一种用于调节以给定时钟速率运行的核的活动的方法。该方法包括：监视（S100）核心参数的值，该参数是核心安全运行的关键参数; 确定所监视的值是否达到触发值; 当监视值达到触发值时（S120）：通过减小时钟的有效周期的比例来修改内核的时钟速率（S130）; 并通过降低时钟的有效周期的比例，以修改的时钟速率（S140）运行核心; 当监视值达到第二次触发值时（S170）：通过增加时钟的有效周期的比例来修改核心的时钟速率（S180）; 并通过增加时钟的有效周期比例，以时钟速率（S190）运行核心。

68. 发明授权

US08791752B2 Two-stage class AB operational amplifier 有权
公开(公告)号：US08791752B2
公开(公告)日：2014-07-29
申请号：US14002416
申请日：2012-02-27
申请人： Germano Nicollini , Carlo Pinna
发明人： Germano Nicollini , Carlo Pinna
IPC分类号： H03F3/45
CPC分类号： H03F3/45264 , H03F3/3028 , H03F3/45 , H03F3/4565 , H03F3/45663 , H03F2200/297 , H03F2200/453 , H03F2200/456 , H03F2203/30015 , H03F2203/30021 , H03F2203/30081 , H03F2203/30114 , H03F2203/45311 , H03F2203/45626 , H03F2203/45648 , H03F2203/45674 , H03F2203/45696 , H03F2203/45702 , H03H11/1213
摘要： The invention relates to a two stage class AB operational amplifier for driving a load, comprising at least an input stage comprising differential input terminals and an output terminal to provide a driving signal. In addition, the operational amplifier comprises an output stage comprising a first and second input terminals operatively associated to the input stage to be driven on the basis of said driving signal and a driving circuit operatively interposed between said input stage and the output stage. The operational amplifier is characterized in that the driving circuit comprises a first portion comprising at least one resistor operatively connected between a first reference potential via a first circuitry block comprising a PMOS transistor and a second reference potential via a second circuitry block comprising a NMOS transistor. The voltage drop on said at least a first resistor is fixed to a value depending on said first and second reference potentials and the gate-source voltages of said PMOS and NMOS transistors, respectively. The driving circuit further comprises a second portion comprising a first resistor and a second resistor having first terminals connected one another in a common terminal which is connected to the output terminal of the input stage. Said first resistor has a second terminal connected the first input terminal of the output stage and said second resistor has a second terminal connected to the second input terminal of the output stage. Said second terminals of the first and second resistors (R2′) are connected to the first reference potential via a third circuitry block and to the second reference potential (GND) via a fourth circuitry block, respectively. Said third (MW, M9) and fourth (M10, MX) circuitry blocks are arranged to be operatively connected to said first and second circuitry blocks, respectively, so that the voltage drop between the second terminals is substantially equal to the value of the voltage drop (VR1) across said at least one resistor.

69. 发明授权

US08787588B2 Coupling of speakers with integrated circuit 有权
标题翻译：扬声器与集成电路耦合
公开(公告)号：US08787588B2
公开(公告)日：2014-07-22
申请号：US12713083
申请日：2010-02-25
申请人： Sanjeev Ranganathan , Shyam Somayajula , Srinath Sridharan , Arnold D'Souza , Ramkishore Ganti , Lionel Cimaz
发明人： Sanjeev Ranganathan , Shyam Somayajula , Srinath Sridharan , Arnold D'Souza , Ramkishore Ganti , Lionel Cimaz
IPC分类号： H04R1/10 , H04R5/033
CPC分类号： H04R5/033 , H04R5/04
摘要： Systems and methods for a low pin architecture to couple speakers with integrated circuits are disclosed herein. In an implementation, the low pin architecture facilitates in reducing the required pin interfaces to couple a low power speaker, a high power speaker, and earphone speakers with integrated circuits (ICs). For this, the high power speaker can be cross-coupled between the pin interfaces that are coupled to the low power speaker and the earphone speakers. These pin interfaces are driven by corresponding driver circuits. In said implementation, some of the driver circuits can be shared to drive multiple pin interfaces. These shared driver circuits include a combined cascode circuit having a first cascode circuit integrated with a second cascode circuit to reliably and selectively drive one or more of the pin interfaces.
摘要翻译：本文公开了用于将扬声器耦合到集成电路的低引脚架构的系统和方法。在一个实现中，低引脚架构有助于减少所需的引脚接口以将低功率扬声器，大功率扬声器和具有集成电路（IC）的耳机扬声器耦合。为此，大功率扬声器可以在耦合到低功率扬声器的引脚接口和耳机扬声器之间交叉耦合。这些引脚接口由相应的驱动电路驱动。在所述实现中，可以共享一些驱动器电路以驱动多个引脚接口。这些共享驱动器电路包括组合共源共栅电路，其具有与第二共源共栅电路集成的第一共源共栅电路，以可靠且选择性地驱动一个或多个引脚接口。

70. 发明授权

US08787325B2 Scheduling best effort traffic with guaranteed latency traffic in a communications system having a bluetooth-like packet communication protocol 失效
标题翻译：在具有类似蓝牙的分组通信协议的通信系统中调度具有保证的等待时间流量的尽力而为流量
公开(公告)号：US08787325B2
公开(公告)日：2014-07-22
申请号：US13622762
申请日：2012-09-19
申请人： ST-Ericsson SA
发明人： Jorgen Van Parys
IPC分类号： H04J3/00 , H04W4/00 , H04L12/26
CPC分类号： H04W72/12 , H04W28/021 , H04W28/10 , H04W72/1242
摘要： Time frames (TFs) are allocated for performance of transactions of a low latency data stream (LLDS) and a best effort data stream (BEDS) in Bluetooth®-like equipment, wherein payload carrying packets of the different data streams are equal in size, each occupying multiple TFs. An overrule mechanism enables uncompleted transactions of one data stream to continue as needed into TFs allocated to another data stream. Every TF within an allocation window (AW) is individually allocated to the LLDS or the BEDS, and plural TFs immediately following the AW form a guard space between adjacent AWs, the guard space being allocated to neither the LLDDS or the BEDS. Configuration of the AW and of the guard space guarantees the LLDS a first opportunity to transmit a payload carrying packet and continued opportunities to retransmit the packet until successful, after which the BEDS is given an opportunity for transmission and possible retransmissions.
摘要翻译：时分帧（TF）被分配用于在蓝牙类设备中执行低延迟数据流（LLDS）和尽力数据流（BEDS）的事务，其中负载不同数据流的分组的负载的大小相等，每个占用多个TF。重叠机制使一个数据流的未完成事务可以根据需要继续分配给另一个数据流的TF。分配窗口（AW）内的每个TF单独分配给LLDS或BEDS，并且AW之后的多个TF形成相邻AW之间的保护空间，保护空间既不分配给LLDDS也不分配给BEDS。 AW和保护空间的配置保证了LLDS第一次发送携带有效载荷的有效载荷的机会，并继续重新发送数据包的机会，直到成功，然后给予BEDS传输机会和可能的重传。

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