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61. 发明授权

US09135958B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09135958B2
公开(公告)日：2015-09-15
申请号：US14451671
申请日：2014-08-05
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Shunpei Yamazaki , Jun Koyama , Kiyoshi Kato
IPC分类号： G11C5/06 , G11C16/04 , G11C16/28 , H01L21/02 , H01L27/06 , H01L27/105 , H01L27/108 , H01L27/12 , H01L29/786 , G11C11/24 , H01L29/26 , H01L29/22 , G11C5/14 , G11C7/12 , H01L27/115 , G11C7/18 , G11C11/4097
CPC分类号： G11C7/10 , G11C5/06 , G11C5/147 , G11C7/12 , G11C7/18 , G11C7/22 , G11C8/08 , G11C11/24 , G11C11/4097 , G11C16/0433 , G11C16/28 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L23/528 , H01L27/0688 , H01L27/105 , H01L27/108 , H01L27/115 , H01L27/11551 , H01L27/1156 , H01L27/1207 , H01L27/1225 , H01L29/22 , H01L29/24 , H01L29/26 , H01L29/78 , H01L29/78603 , H01L29/7869 , H01L2924/0002 , H01L2924/00
摘要： An object of the present invention is to provide a semiconductor device combining transistors integrating on a same substrate transistors including an oxide semiconductor in their channel formation region and transistors including non-oxide semiconductor in their channel formation region. An application of the present invention is to realize substantially non-volatile semiconductor memories which do not require specific erasing operation and do not suffer from damages due to repeated writing operation. Furthermore, the semiconductor device is well adapted to store multivalued data. Manufacturing methods, application circuits and driving/reading methods are explained in details in the description.
摘要翻译：本发明的目的是提供一种半导体器件，其组合晶体管，其集成在其沟道形成区域中包括氧化物半导体的相同衬底晶体管和在其沟道形成区域中包括非氧化物半导体的晶体管。本发明的应用是实现基本上不需要特定擦除操作的非易失性半导体存储器，并且不会因重复的写入操作而遭受损坏。此外，半导体器件很适合于存储多值数据。在说明书中详细说明制造方法，应用电路和驱动/读取方法。

62. 发明申请

US20150255611A1 OXIDE SPUTTERING TARGET, AND THIN FILM TRANSISTOR USING THE SAME 有权
标题翻译：氧化物溅射靶和使用该薄膜的薄膜晶体管
公开(公告)号：US20150255611A1
公开(公告)日：2015-09-10
申请号：US14487916
申请日：2014-09-16
申请人： SAMSUNG DISPLAY CO., LTD.
发明人： KATSUSHI KISHIMOTO , Yoshinori Tanaka , Yeon Keon Moon , Sang Woo Sohn , Sang Won Shin , Takayuki Fukasawa
IPC分类号： H01L29/786 , H01L29/26 , H01J37/34
CPC分类号： H01L29/7869 , C23C14/3414 , H01J37/3429 , H01J37/3491 , H01L29/41733 , H01L29/66969 , H01L29/78693
摘要： An oxide sputtering target includes at least one of indium (In), zinc (Zn), tin (Sn), and gallium (Ga), and tungsten (W) in an amount from 0.005 mol % to 1 mol %.
摘要翻译：氧化物溅射靶包括铟（In），锌（Zn），锡（Sn）和镓（Ga）以及钨（W）中的至少一种，其量为0.005mol％至1mol％。

63. 发明申请

US20150249160A1 SEMICONDUCTOR DEVICE, DISPLAY DEVICE INCLUDING THE SEMICONDUCTOR DEVICE, DISPLAY MODULE INCLUDING THE DISPLAY DEVICE, AND ELECTRONIC APPLIANCE INCLUDING THE SEMICONDUCTOR DEVICE, THE DISPLAY DEVICE, OR THE DISPLAY MODULE 有权
标题翻译：半导体器件，包括半导体器件的显示器件，包括显示器件的显示器模块以及包括半导体器件，显示器件或显示器模块的电子器件
公开(公告)号：US20150249160A1
公开(公告)日：2015-09-03
申请号：US14632177
申请日：2015-02-26
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Shunpei YAMAZAKI , Junichi KOEZUKA , Masami JINTYOU , Daisuke KUROSAKI
IPC分类号： H01L29/786 , H01L29/26
CPC分类号： H01L29/78606 , H01L29/26 , H01L29/66969 , H01L29/78648 , H01L29/7869
摘要： A semiconductor device including a transistor is provided. The transistor includes a gate electrode, a first insulating film over the gate electrode, a second insulating film over the first insulating film, an oxide semiconductor film over the second insulating film, a source electrode and a drain electrode electrically connected to the oxide semiconductor film, a third insulating film over the source electrode, and a fourth insulating film over the drain electrode. A fifth insulating film including oxygen is provided over the transistor. The third insulating film includes a first portion, the fourth insulating film includes a second portion, and the fifth insulating film includes a third portion. The amount of oxygen molecules released from each of the first portion and the second portion is smaller than the amount of oxygen molecules released from the third portion when the amounts are measured by thermal desorption spectroscopy.
摘要翻译：提供了包括晶体管的半导体器件。晶体管包括栅电极，栅电极上的第一绝缘膜，第一绝缘膜上的第二绝缘膜，第二绝缘膜上的氧化物半导体膜，与氧化物半导体膜电连接的源电极和漏电极，在源电极上方的第三绝缘膜，以及在漏极上的第四绝缘膜。包括氧的第五绝缘膜设置在晶体管上。第三绝缘膜包括第一部分，第四绝缘膜包括第二部分，第五绝缘膜包括第三部分。当通过热解吸光谱法测量量时，从第一部分和第二部分中分离的氧分子的量小于从第三部分释放的氧分子的量。

64. 发明申请

US20150249123A1 OXIDE SEMICONDUCTOR FILM, TRANSISTOR, AND SEMICONDUCTOR DEVICE 审中-公开
标题翻译：氧化物半导体膜，晶体管和半导体器件
公开(公告)号：US20150249123A1
公开(公告)日：2015-09-03
申请号：US14709871
申请日：2015-05-12
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Shunpei YAMAZAKI , Masahiro TAKAHASHI
IPC分类号： H01L29/04 , H01L29/26 , H01L29/786
CPC分类号： H01L29/045 , H01L27/1225 , H01L27/124 , H01L29/26 , H01L29/45 , H01L29/78621 , H01L29/7869 , H01L29/78693
摘要： To provide an oxide semiconductor film which has high stability and does not easily cause variation in electric characteristics of a transistor, a transistor including the oxide semiconductor film in its channel formation region, and a highly reliable semiconductor device including the transistor. The oxide semiconductor film including indium includes a crystal part whose c-axis is substantially perpendicular to a surface of the oxide semiconductor film. In the crystal part, the length of a crystal arrangement part containing indium and oxygen on a plane perpendicular to the c-axis is more than 1.5 nm. Further, the semiconductor device includes the transistor including the oxide semiconductor film in its channel formation region.
摘要翻译：为了提供具有高稳定性并且不容易引起晶体管的电特性变化的氧化物半导体膜，包括其沟道形成区域中的氧化物半导体膜的晶体管，以及包括晶体管的高可靠性半导体器件。包括铟的氧化物半导体膜包括其c轴基本上垂直于氧化物半导体膜的表面的晶体部分。在晶体部分中，在与c轴垂直的平面上含有铟和氧的晶体配置部分的长度大于1.5nm。此外，半导体器件包括在其沟道形成区域中包括氧化物半导体膜的晶体管。

65. 发明申请

US20150214369A1 METHODS OF FORMING EPITAXIAL SEMICONDUCTOR MATERIAL ON SOURCE/DRAIN REGIONS OF A FINFET SEMICONDUCTOR DEVICE AND THE RESULTING DEVICES 审中-公开
标题翻译：在FINFET半导体器件和结果器件的源极/漏极区域形成外延半导体材料的方法
公开(公告)号：US20150214369A1
公开(公告)日：2015-07-30
申请号：US14164934
申请日：2014-01-27
申请人： GLOBALFOUNDRIES Inc.
发明人： Jody A. Fronheiser , Bharat V. Krishnan , Murat Kerem Akarvardar , Steven Bentley , Ajey Poovannummoottil Jacob , Jinping Liu
IPC分类号： H01L29/78 , H01L29/16 , H01L29/66 , H01L29/167 , H01L29/26 , H01L29/04 , H01L29/161
CPC分类号： H01L29/7851 , H01L29/045 , H01L29/0847 , H01L29/16 , H01L29/161 , H01L29/165 , H01L29/167 , H01L29/26 , H01L29/66795 , H01L29/7848 , H01L29/785
摘要： One illustrative device disclosed herein includes a fin defined in a semiconductor substrate having a crystalline structure, wherein at least a sidewall of the fin is positioned substantially in a crystallographic direction of the substrate, a gate structure positioned around the fin, an outermost sidewall spacer positioned adjacent opposite sides of the gate structure, and an epi semiconductor material formed around portions of the fin positioned laterally outside of the outermost sidewall spacers in the source/drain regions of the device, wherein the epi semiconductor material has a substantially uniform thickness along the sidewalls of the fin.
摘要翻译：本文公开的一种说明性器件包括在具有晶体结构的半导体衬底中限定的鳍，其中鳍的至少一个侧壁基本上位于衬底的100°结晶方向，位于鳍周围的栅极结构，侧壁间隔物，其位于栅极结构的相对侧附近，以及外延半导体材料，其围绕位于器件的源极/漏极区域中的最外侧壁间隔物横向外侧的翅片周围形成，其中外延半导体材料具有基本上均匀的厚度沿翅片的侧壁。

66. 发明授权

US09087776B2 Nitride-based semiconductor device and method of manufacturing nitride-based semiconductor device 有权
标题翻译：基于氮化物的半导体器件及其制造氮化物基半导体器件的方法
公开(公告)号：US09087776B2
公开(公告)日：2015-07-21
申请号：US13945613
申请日：2013-07-18
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Jae Hoon Lee
IPC分类号： H01L29/267 , H01L29/26 , H01L29/423 , H01L29/66 , H01L29/778 , H01L29/06 , H01L29/20 , H01L21/02
CPC分类号： H01L29/267 , H01L21/0237 , H01L21/02447 , H01L21/02458 , H01L21/02505 , H01L21/02521 , H01L21/02529 , H01L29/0657 , H01L29/2003 , H01L29/26 , H01L29/42316 , H01L29/66462 , H01L29/7787
摘要： In a nitride-based semiconductor device, an undoped gallium nitride (GaN) layer is formed on an aluminum gallium nitride (AlGaN) layer, and a silicon carbon nitride (SixC1-xN) functional layer is formed on the undoped GaN layer.
摘要翻译：在氮化物类半导体器件中，在氮化铝镓（AlGaN）层上形成未掺杂的氮化镓（GaN）层，在未掺杂的GaN层上形成氮化硅（SixC1-xN）功能层。

67. 发明授权

US09070613B2 Light emitting device 有权
标题翻译：发光装置
公开(公告)号：US09070613B2
公开(公告)日：2015-06-30
申请号：US13434397
申请日：2012-03-29
申请人： Sungmin Hwang
发明人： Sungmin Hwang
IPC分类号： H01L33/00 , H01L27/15 , H01L29/26 , H01L31/12 , H01L25/075 , H01L33/38
CPC分类号： H01L27/15 , H01L25/0756 , H01L33/382 , H01L33/385 , H01L2224/48091 , H01L2924/12032 , H01L2933/0016 , H01L2924/00014 , H01L2924/00
摘要： A light emitting device includes a first section and a second section. The first section includes a first semiconductor layer doped with a first dopant, a second semiconductor layer doped with a second dopant, and a first active layer between the first and second semiconductor layers, and the second section includes a third semiconductor layer disposed on the first section, and the third semiconductor layer having an exposed region, a fourth semiconductor layer disposed on the third semiconductor layer except for the exposed region, and a second active layer between the third and fourth semiconductor layers, a first electrode disposed on the first semiconductor layer, a second electrode disposed on the fourth semiconductor layer and a third electrode inserted into a hole in the exposed region and disposed on the exposed region and the second semiconductor layer, the third electrode electrically connected to the second and third semiconductor layers.
摘要翻译：发光器件包括第一部分和第二部分。第一部分包括掺杂有第一掺杂剂的第一半导体层，掺杂有第二掺杂剂的第二半导体层和在第一和第二半导体层之间的第一有源层，并且第二部分包括设置在第一半导体层上的第三半导体层并且具有曝光区域的第三半导体层，设置在除了曝光区域之外的第三半导体层上的第四半导体层以及第三和第四半导体层之间的第二有源层，设置在第一半导体层上的第一电极设置在所述第四半导体层上的第二电极和插入所述暴露区域中的孔中并且设置在所述暴露区域和所述第二半导体层上的第三电极，所述第三电极与所述第二和第三半导体层电连接。

68. 发明申请

US20150177311A1 Methods and Systems for Evaluating IGZO with Respect to NBIS 审中-公开
标题翻译：评估IGZO相对于NBIS的方法和系统
公开(公告)号：US20150177311A1
公开(公告)日：2015-06-25
申请号：US14135408
申请日：2013-12-19
申请人： Intermolecular, Inc.
发明人： Khaled Ahmed
IPC分类号： G01R31/26 , G01N27/00 , G01N33/00 , H01L29/26
CPC分类号： G01R31/2648 , G01N33/00 , G01N2033/0095 , H01L27/1225 , H01L27/1262 , H01L29/263 , H01L29/66969 , H01L29/78693
摘要： Embodiments described herein provide methods and systems for evaluating indium-gallium-zinc oxide (IGZO) with respect to negative bias illumination stress (NBIS). A plurality of IGZO devices is formed. Each of the plurality of IGZO devices includes a semiconductor substrate and an IGZO layer formed above the semiconductor substrate. A processing condition used to form at least two of the plurality of IGZO devices is varied in a combinatorial manner. A bias is applied to the semiconductor substrate of each of the plurality of IGZO devices. A current flow through each of the plurality of IGZO devices while the bias is applied is measured.
摘要翻译：本文描述的实施例提供了关于负偏压照明应力（NBIS）评估铟镓锌氧化物（IGZO）的方法和系统。形成多个IGZO器件。多个IGZO器件中的每一个包括半导体衬底和形成在半导体衬底之上的IGZO层。用于形成多个IGZO装置中的至少两个的处理条件以组合方式变化。对多个IGZO器件中的每一个的半导体衬底施加偏压。测量施加偏压时通过多个IGZO器件中的每一个的电流。

69. 发明授权

US09058971B2 Electro-optical module 有权
标题翻译：电光模块
公开(公告)号：US09058971B2
公开(公告)日：2015-06-16
申请号：US13905703
申请日：2013-05-30
申请人： Siliconware Precision Industries Co., Ltd.
发明人： Chih-Yuan Shih , Shih-Liang Peng , Jung-Pin Huang , Chin-Yu Ku , Hsien-Wen Chen
IPC分类号： H01L27/15 , H01L29/26 , H01L31/12 , H01L33/00 , H01L25/00 , H01S5/022 , H01S5/024 , H01S5/062 , H01S5/42
CPC分类号： H01L25/00 , H01L2224/48091 , H01S5/02252 , H01S5/0226 , H01S5/02276 , H01S5/02288 , H01S5/02469 , H01S5/06226 , H01S5/423 , H01L2924/00014
摘要： An electro-optical module is provided, which includes: a substrate having a first surface with a groove and an opposite second surface; a plurality of support members disposed on the first surface of the substrate; at least an electro-optical element having opposite active and non-active surfaces and disposed in the groove of the substrate via the non-active surface thereof; an interposer disposed on the first surface of the substrate and the electro-optical element for electrically connecting the electro-optical element to the substrate, wherein the interposer has a through hole corresponding in position to the active surface of the electro-optical element; and a transparent plate disposed over the first surface of the substrate and the interposer through the support members and having a lens portion corresponding in position to the through hole of the interposer, thereby reducing signal losses, improving alignment precision, and achieving preferred thermal dissipation and EMI shielding effects.
摘要翻译：提供了一种电光模块，其包括：具有第一表面和第二表面的基板; 设置在所述基板的第一表面上的多个支撑构件; 至少一个电光元件具有相对的有源和非有源表面，并经由其非有效表面设置在衬底的沟槽中; 设置在基板的第一表面上的插入器和用于将电光元件电连接到基板的电光元件，其中插入器具有与电光元件的有源表面相对应的通孔; 以及设置在基板的第一表面上的透明板和穿过支撑构件的中介层，并且具有与插入件的通孔对应的透镜部分，从而减少信号损失，提高对准精度，并实现优选的散热和 EMI屏蔽效果。

70. 发明授权

US09054205B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US09054205B2
公开(公告)日：2015-06-09
申请号：US14064294
申请日：2013-10-28
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Shunpei Yamazaki , Yusuke Nonaka , Takatsugu Omata , Tatsuya Honda , Akiharu Miyanaga , Hiroki Ohara
IPC分类号： H01L29/12 , H01L29/786 , H01L29/417 , H01L29/45 , H01L29/49 , H01L29/26 , H01L27/12
CPC分类号： H01L29/78693 , H01L27/1225 , H01L27/124 , H01L29/263 , H01L29/41733 , H01L29/45 , H01L29/4908 , H01L29/78618 , H01L29/78621 , H01L29/7869
摘要： A semiconductor device having a novel structure or a method for manufacturing the semiconductor device is provided. For example, the reliability of a transistor which is driven at high voltage or large current is improved. For improvement of the reliability of the transistor, a buffer layer is provided between a drain electrode layer (or a source electrode layer) and an oxide semiconductor layer such that the end portion of the buffer layer is beyond the side surface of the drain electrode layer (or the source electrode layer) when seen in a cross section, whereby the buffer layer can relieve the concentration of electric field. The buffer layer is a single layer or a stacked layer including a plurality of layers, and includes, for example, an In—Ga—Zn—O film containing nitrogen, an In—Sn—O film containing nitrogen, an In—Sn—O film containing SiOx, or the like.
摘要翻译：提供具有新颖结构的半导体器件或半导体器件的制造方法。例如，提高了以高电压或大电流驱动的晶体管的可靠性。为了提高晶体管的可靠性，在漏电极层（或源极电极层）和氧化物半导体层之间设置缓冲层，使得缓冲层的端部超出漏电极层的侧面（或源电极层），从而缓冲层能够缓和电场的集中。缓冲层是包含多个层的单层或层叠层，例如包含氮的In-Ga-Zn-O膜，含有氮的In-Sn-O膜，In-Sn-O系膜， O膜等。

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