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71. 发明授权

US07964861B2 Method and apparatus for reducing programmed volume of phase change memory 有权
标题翻译：减少相变存储器编程容量的方法和装置
公开(公告)号：US07964861B2
公开(公告)日：2011-06-21
申请号：US11983026
申请日：2007-11-06
申请人： Jim Ricker
发明人： Jim Ricker
IPC分类号： H01L45/00
CPC分类号： H01L45/1233 , H01L45/06 , H01L45/1246 , H01L45/126 , H01L45/141 , H01L45/165 , H01L45/1683
摘要： A phase change memory includes a volume of phase change material disposed between, and coupled to, two electrodes, with the composition of a region of at least one of the two electrodes or phase change material having been compositionally altered to reduce the programmed volume of the phase change material.
摘要翻译：相变存储器包括设置在两个电极之间并耦合到两个电极的相变材料体积，其中两个电极或相变材料中的至少一个的区域的组成被组合地改变以减少编程体积相变材料

72. 发明授权

US07935951B2 Composite chalcogenide materials and devices 有权
标题翻译：复合硫属化物材料和装置
公开(公告)号：US07935951B2
公开(公告)日：2011-05-03
申请号：US11874719
申请日：2007-10-18
申请人： Wolodymyr Czubatyj , Sergey Kostylev , Tyler Lowrey
发明人： Wolodymyr Czubatyj , Sergey Kostylev , Tyler Lowrey
IPC分类号： H01L47/00
CPC分类号： H01L45/144 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/143
摘要： An electrical device includes a composite switching material. The composite switching material includes an electrically switchable component and a non-switchable component. In one embodiment, the composite switching material includes a heterogeneous mixture of at least one chalcogenide material and at least one dielectric material. The composite switching material is disposed between two electrodes and the switchable component is transformable from a resistive state to a conductive state upon application of a voltage between the two electrodes, without changing phase.
摘要翻译：电气装置包括复合开关材料。复合开关材料包括可电切换部件和不可切换部件。在一个实施例中，复合开关材料包括至少一种硫族化物材料和至少一种电介质材料的非均相混合物。复合开关材料设置在两个电极之间，并且在不改变相位的情况下施加电压之间，可切换部件可从电阻状态转换为导通状态。

73. 发明授权

US07864567B2 Programming a normally single phase chalcogenide material for use as a memory of FPLA 有权
标题翻译：编程正常的单相硫族化物材料，用作FPLA的记忆
公开(公告)号：US07864567B2
公开(公告)日：2011-01-04
申请号：US12218122
申请日：2008-07-11
申请人： George A. Gordon , Ward D. Parkinson , John M. Peters , Tyler A. Lowrey , Stanford Ovshinsky , Guy C. Wicker , Ilya V. Karpov , Charles C. Kuo
发明人： George A. Gordon , Ward D. Parkinson , John M. Peters , Tyler A. Lowrey , Stanford Ovshinsky , Guy C. Wicker , Ilya V. Karpov , Charles C. Kuo
IPC分类号： G11C11/00
CPC分类号： G11C13/0004 , G11C13/004 , G11C13/0069 , G11C2013/0054 , G11C2013/009 , G11C2013/0092 , G11C2213/77 , H01L27/2472 , H01L45/04 , H01L45/1233 , H01L45/141 , H01L45/144
摘要： A memory may be implemented with a stable chalcogenide glass which is defined as a generally amorphous chalcogenide material that does not change to a generally crystalline phase when exposed to 200° C. for 30 minutes or less. Different states may be programmed by changing the threshold voltage of the material. The threshold voltage may be changed with pulses of different amplitude and/or different pulse fall times. Reading may be done using a reference level between the threshold voltages of the two different states. A separate access device is generally not needed.
摘要翻译：可以用稳定的硫属化物玻璃来实现记忆，硫化物玻璃被定义为当暴露于200℃下30分钟或更短时不改变为通常结晶相的通常为非晶态的硫族化物材料。可以通过改变材料的阈值电压来编程不同的状态。可以用不同幅度和/或不同脉冲下降时间的脉冲来改变阈值电压。可以使用两种不同状态的阈值电压之间的参考电平进行读取。通常不需要单独的访问设备。

74. 发明授权

US07859895B2 Standalone thin film memory 有权
标题翻译：独立薄膜记忆体
公开(公告)号：US07859895B2
公开(公告)日：2010-12-28
申请号：US12156998
申请日：2008-06-06
申请人： Tyler Lowrey
发明人： Tyler Lowrey
IPC分类号： G11C11/00
CPC分类号： G11C13/003 , G11C5/02 , G11C13/0004 , G11C29/12 , G11C2213/15 , G11C2213/71 , G11C2213/76 , H01L27/2436 , H01L27/2481 , H01L45/04 , H01L45/1206 , H01L45/1233 , H01L45/141 , H01L45/144
摘要： A standalone memory device includes thin-film peripheral circuitry, including decoding circuitry. The standalone thin film memory excludes all single-crystal electronic devices and may be formed, for example, on a low-cost substrate, such as fiberglass. The memory is configured for operation with an external memory controller.
摘要翻译：独立存储器件包括薄膜外围电路，包括解码电路。单独的薄膜存储器不包括所有单晶电子器件，并且可以例如形成在诸如玻璃纤维的低成本衬底上。内存配置为与外部存储器控制器一起操作。

75. 发明授权

US07858152B2 Chemical vapor deposition of chalcogenide materials via alternating layers 有权
标题翻译：化学气相沉积硫族化物材料经交替层
公开(公告)号：US07858152B2
公开(公告)日：2010-12-28
申请号：US12284425
申请日：2008-09-22
申请人： Stanford R. Ovshinsky , Smuruthi Kamepalli
发明人： Stanford R. Ovshinsky , Smuruthi Kamepalli
IPC分类号： C23C16/00
CPC分类号： C23C16/305 , H01L45/04 , H01L45/06 , H01L45/144 , H01L45/1616
摘要： A chemical vapor deposition (CVD) process for preparing electrical and optical chalcogenide materials. In a preferred embodiment, the instant CVD-deposited materials exhibit one or more of the following properties: electrical switching, accumulation, setting, reversible multistate behavior, resetting, cognitive functionality, and reversible amorphous-crystalline transformations. In one embodiment, a multilayer structure, including at least one layer containing a chalcogen element, is deposited by CVD and subjected to post-deposition application of energy to produce a chalcogenide material having properties in accordance with the instant invention. In another embodiment, a single layer chalcogenide material having properties in accordance with the instant invention is formed from a CVD deposition process including three or more deposition precursors, at least one of which is a chalcogen element precursor. Preferred materials are those that include the chalcogen Te along with Ge and/or Sb.
摘要翻译：用于制备电和光硫族化物材料的化学气相沉积（CVD）工艺。在优选的实施方案中，瞬时CVD沉积的材料表现出一种或多种以下性质：电开关，积聚，凝固，可逆多态行为，复位，认知功能和可逆非晶晶转换。在一个实施方案中，包括含有硫属元素的至少一层的多层结构通过CVD沉积，并进行后沉积施加能量以产生具有根据本发明的性质的硫族化物材料。在另一个实施方案中，具有根据本发明的性质的单层硫族化物材料由包括三种或更多种沉积前体的CVD沉积工艺形成，其中至少一种是硫属元素前体。优选的材料是含有硫族元素Te和Ge和/或Sb的材料。

76. 发明授权

US07839674B2 Programmable matrix array with chalcogenide material 有权
标题翻译：具有硫属化物材料的可编程矩阵阵列
公开(公告)号：US07839674B2
公开(公告)日：2010-11-23
申请号：US12286784
申请日：2008-10-02
申请人： Tyler Lowrey , Ward Parkinson , Guy Wicker
发明人： Tyler Lowrey , Ward Parkinson , Guy Wicker
IPC分类号： G11C11/00
CPC分类号： G11C13/003 , G11C13/0004 , G11C2213/72 , G11C2213/75 , G11C2213/76 , G11C2213/79 , H01L27/2427
摘要： A chalcogenide material is proposed for programming the cross-connect transistor coupling interconnect lines of an electrically programmable matrix array. Leakage may be reduced by optionally placing a thin insulating breakdown layer in series with the select device or a phase change material. The matrix array may be used in a programmable logic device.
摘要翻译：提出硫族化物材料来编程电可编程矩阵阵列的交叉连接晶体管耦合互连线。可以通过选择性地将薄绝缘击穿层与选择装置或相变材料串联来减小泄漏。矩阵阵列可以用在可编程逻辑器件中。

77. 发明授权

US07838341B2 Self-aligned memory cells and method for forming 有权
标题翻译：自对准存储单元及其形成方法
公开(公告)号：US07838341B2
公开(公告)日：2010-11-23
申请号：US12075913
申请日：2008-03-14
申请人： Charles H. Dennison
发明人： Charles H. Dennison
IPC分类号： H01L21/82
CPC分类号： H01L45/126 , H01L27/2409 , H01L27/2436 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1683
摘要： The invention provides a memory cell based on variable resistance material memory element that includes an access device having a pillar structure that may also include a protective sidewall layer. The pillar access device selects and isolates the memory cell from other memory array cells and is adapted to both self-align any memory element formed thereon, and to deliver suitable programming current to the memory element. The pillar structure is formed from one or more access device layers stacked above a wordline and below the memory element. Optional resistive layers may be selectively formed within the pillar structure to minimize resistance in the access device layer and the memory element. The pillar access device may be a diode, transistor, Ovonic threshold switch or other device capable of regulating current flow to an overlying programmable memory material.
摘要翻译：本发明提供了一种基于可变电阻材料存储元件的存储单元，其包括具有柱结构的存取装置，所述柱结构还可包括保护侧壁层。支柱存取装置选择并隔离其他存储器阵列单元的存储单元，并且适于将形成在其上的任何存储元件自对准，并将适当的编程电流传送到存储元件。柱结构由堆叠在字线上方和存储元件下方的一个或多个访问器件层形成。可选择性地在柱结构内形成可选的电阻层，以最小化存取器件层和存储元件中的电阻。柱式存取装置可以是二极管，晶体管，Ovonic阈值开关或能够调节流向上覆可编程存储器材料的电流的其他装置。

78. 发明授权

US07833824B2 Multilevel phase change memory 有权
标题翻译：多级相变存储器
公开(公告)号：US07833824B2
公开(公告)日：2010-11-16
申请号：US12349077
申请日：2009-01-06
申请人： Jong-Won S. Lee
发明人： Jong-Won S. Lee
IPC分类号： H01L21/00
CPC分类号： G11C11/5678 , G11C13/0004 , G11C13/004 , G11C13/0069 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/1683
摘要： A multilevel phase change memory may be formed of a chalcogenide material formed between a pair of spaced electrodes. The cross-sectional area of the chalcogenide material may decrease as the material extends from one electrode to another. As a result, the current density decreases from one electrode to the other. This means that a higher current is necessary to convert the material that has the largest cross-sectional area. As a result, different current levels may be utilized to convert different amounts of the chalcogenide material to the amorphous or reset state. A distinguishable resistance may be associated with each of those different amounts of amorphous material, providing the opportunity to engineer a number of different current selectable programmable states.
摘要翻译：多级相变存储器可以由在一对间隔开的电极之间形成的硫族化物材料形成。随着材料从一个电极延伸到另一个电极，硫族化物材料的横截面积可能会减小。结果，电流密度从一个电极降低到另一个电极。这意味着需要更高的电流来转换具有最大横截面面积的材料。结果，可以利用不同的电流水平将不同量的硫族化物材料转化为非晶态或复位状态。可区分的电阻可能与这些不同数量的无定形材料中的每一种相关联，提供了设计多个不同的当前可选可编程状态的机会。

79. 发明授权

US07833823B2 Programmable resistance memory element and method for making same 有权
标题翻译：可编程电阻存储元件及其制造方法
公开(公告)号：US07833823B2
公开(公告)日：2010-11-16
申请号：US12069046
申请日：2008-02-07
申请人： Patrick Klersy
发明人： Patrick Klersy
IPC分类号： H01L21/00
CPC分类号： G11C11/56 , G11C11/5678 , G11C13/0004 , H01L27/2409 , H01L45/06 , H01L45/124 , H01L45/1273 , H01L45/144 , H01L45/1691
摘要： A programmable resistance memory element. The active volume of memory material is made small by the presence of a small area of contact between the conductive material and the memory material. The area of contact is created by forming a region of conductive material and an intersecting sidewall layer of the memory material. The region of conductive material is preferably a sidewall layer of conductive material.
摘要翻译：可编程电阻存储元件。通过在导电材料和存储材料之间存在小的接触面积，使存储材料的有效体积变小。通过形成存储材料的导电材料的区域和相交的侧壁层来产生接触区域。导电材料的区域优选为导电材料的侧壁层。

80. 发明授权

US07817475B2 Method and apparatus for accessing a phase-change memory 有权
标题翻译：用于访问相变存储器的方法和装置
公开(公告)号：US07817475B2
公开(公告)日：2010-10-19
申请号：US11999419
申请日：2007-12-05
申请人： Tyler Lowrey
发明人： Tyler Lowrey
IPC分类号： G11C16/06
CPC分类号： G11C13/004 , G11C11/56 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0054 , G11C2013/009 , G11C2013/0092
摘要： Fixed-voltage programming pulses are employed to program a phase change memory cell. A burst of incrementally widening fixed-voltage programming pulses may be employed to program a phase change memory to a target threshold voltage.
摘要翻译：使用固定电压编程脉冲对相变存储单元进行编程。可以采用递增增宽的固定电压编程脉冲的脉冲串将相变存储器编程为目标阈值电压。

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