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    • 71. 发明授权
    • Electromagnetic wave shielding system for optical sensor having an
aperture
    • 具有孔径的光学传感器的电磁波屏蔽系统
    • US5049741A
    • 1991-09-17
    • US498064
    • 1990-03-23
    • Minoru FukudaShinichiro Ichikawa
    • Minoru FukudaShinichiro Ichikawa
    • G01J1/02G01J5/06G01S3/781
    • G01S3/781
    • An electromagnetic wave shielding system for an optical sensor includes: a sensor body having an aperture through which an optical signal is made incident on the sensor body; a shielding plate disposed within the sensor body, the shielding plate having an opening having a dimension of at most about one-half of the wavelength of electromagnetic waves; an optical system for gathering the optical signal which passes through the aperture of the sensor body to the dimension of the opening in the shielding plate so that it can pass through the opening; and a detecting/processing unit for detecting and processing the optical signal which passes through the opening in the shielding plate. Thus, the electromagnetic waves which have entered are prevented from passing through or are remarkably attenuated by the opening in the shielding plate, and are thereby prevented from reaching the detecting/processing unit.
    • 一种用于光学传感器的电磁波屏蔽系统,包括:具有孔径的传感器主体,通过该孔将光信号入射到传感器主体上; 设置在所述传感器主体内的屏蔽板,所述屏蔽板具有至少约为电磁波波长的一半的开口; 光学系统,其将通过传感器主体的孔的光信号收集到屏蔽板中的开口的尺寸,使得其可以穿过开口; 以及用于检测和处理通过屏蔽板中的开口的光信号的检测/处理单元。 因此,防止了进入的电磁波通过屏蔽板中的开口而被显着地衰减,从而防止了到达检测/处理单元。
    • 74. 发明授权
    • PLL circuit
    • PLL电路
    • US08344770B2
    • 2013-01-01
    • US12929776
    • 2011-02-15
    • Minoru Fukuda
    • Minoru Fukuda
    • H03L7/06
    • H03L7/07H03L7/085
    • A PLL circuit is provided capable of reducing phase noise and facilitating design. In the PLL circuit, a PLL receives a reference frequency and an output from a VC-TCXO, performs a lock operation. In a lock state, a selector selects an output of a first divider that divides the reference frequency. When PLL detects input of reference frequency being lost or an unlock state, the PLL outputs an alarm signal to the selector. When receiving the alarm signal from the PLL, the selector switches from the output of the first divider to an output of a second divider that frequency-divides an output of the VC-TCXO, and outputs the same. Then, a PLL receives an output of the selector and an output of a VCXO and performs a lock operation.
    • 提供了能够减少相位噪声并促进设计的PLL电路。 在PLL电路中,PLL接收参考频率和VC-TCXO的输出,执行锁定操作。 在锁定状态下,选择器选择划分参考频率的第一分频器的输出。 当PLL检测到参考频率丢失或解锁状态的输入时,PLL向选择器输出报警信号。 当从PLL接收到报警信号时,选择器从第一分频器的输出端切换到对VC-TCXO的输出进行分频的第二分频器的输出,并输出。 然后,PLL接收选择器的输出和VCXO的输出,并执行锁定操作。