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    • 71. 发明申请
    • A/D CONVERTER USING ISOLATION SWITCHES
    • A / D转换器使用隔离开关
    • US20120026027A1
    • 2012-02-02
    • US12844727
    • 2010-07-27
    • Jesper Steensgaard-Madsen
    • Jesper Steensgaard-Madsen
    • H03M1/38H03K5/00H03M1/12
    • H03M1/466
    • In an A/D converter, isolation switches are used between the capacitors and the conversion switches. The conversion switches are those switches used to selectively couple the plates of the binary weighted capacitors to either Vref or 0 volts during the A/D conversion process. During sampling of the input voltage signal, the isolation switches are opened to isolate the conversion switches from the wide range of possible input voltages at the bottom plates of the capacitors. Therefore, the voltage across the conversion switches is substantially limited to Vref. Hence, the conversion switches can be very fast low voltage switches. After sampling of the input voltage, when the sampled input voltage is locked in, the conversion switches operate normally to selectively connect the capacitor plates to either Vref or 0 volts for successively approximating the input voltage, whereby a digital code representing the sampled input voltage is generated.
    • 在A / D转换器中,电容器和转换开关之间使用隔离开关。 转换开关是用于在A / D转换过程期间将二进制加权电容器的板选择性地耦合到Vref或0伏的那些开关。 在采样输入电压信号期间,隔离开关被打开以将转换开关与电容器底板的可能输入电压的宽范围隔离开来。 因此,转换开关两端的电压基本上限制在Vref。 因此,转换开关可以是非常快速的低压开关。 在对输入电压进行采样之后,当采样的输入电压被锁定时,转换开关正常工作,选择性地将电容器板连接到Vref或0伏,以连续逼近输入电压,从而表示采样输入电压的数字代码为 生成。
    • 74. 发明授权
    • Circuits and methods for adjustable peak inductor current and hysteresis for burst mode in switching regulators
    • 可调峰值电感电流和开关稳压器中突发模式滞后的电路和方法
    • US07990120B2
    • 2011-08-02
    • US11499005
    • 2006-08-04
    • Jason LeonardJoey Martin Esteves
    • Jason LeonardJoey Martin Esteves
    • G05F1/00G05F3/16
    • H02M3/156H02M2001/0032Y02B70/16
    • Switching regulator circuits and methods are provided for regulating output voltage that include an adjustable minimum peak inductor current level and adjustable burst comparator hysteresis for Burst Mode operation in switching regulators. Control over minimum peak inductor current level and burst comparator hysteresis is achieved during Burst Mode operation by allowing external user control of the burst threshold level and the burst comparator hysteresis. A single user-accessible input pin, two user-accessible input pins, or three user-accessible input pins may be used to distinguish between forced continuous and Burst Mode operations, set a burst threshold level, and set a burst comparator hysteresis during Burst Mode operation. The present invention may be applied to buck, boost, buck-boost, or any other suitable regulator circuit configuration. The present invention also may be employed with synchronous and non-synchronous switching regulators.
    • 提供开关稳压器电路和方法,用于调节输出电压,包括可调节的最小峰值电感电流电平和可调节的脉冲串比较器迟滞,用于开关稳压器中的突发模式操作。 通过允许外部用户控制突发阈值电平和突发比较器滞后,在突发模式操作期间实现对最小峰值电感电流电平和脉冲串比较器滞后的控制。 可以使用单个用户可访问的输入引脚,两个用户可访问的输入引脚或三个用户可访问的输入引脚来区分强制连续和突发模式操作,设置突发阈值电平,并在突发模式下设置突发比较器滞后 操作。 本发明可以应用于降压,升压,降压 - 升压或任何其他合适的调节器电路配置。 本发明也可以用于同步和非同步开关调节器。
    • 75. 发明授权
    • Sampling switch and controller
    • 采样开关和控制器
    • US07961132B1
    • 2011-06-14
    • US12699794
    • 2010-02-03
    • Raymond T. PerryJesper Steensgaard-Madsen
    • Raymond T. PerryJesper Steensgaard-Madsen
    • H03M1/12
    • H03M1/0607H03M1/466H03M1/468
    • In one embodiment, an A/D converter samples an analog input signal voltage by applying the input signal to a first capacitor terminal, while a second capacitor terminal is connected to ground via an NMOS sampling switch, to charge the capacitor to the input signal voltage. During an analog-to-digital conversion process, the second capacitor terminal may swing in a voltage range that extends below ground. A controller circuit provides bias voltage signals to a gate terminal and to a p-well of the NMOS sampling switch, to selectively turn the sampling switch on and off. In a first step of a multi-step sampling process, the controller very quickly discharges the gate terminal to ground to isolate a quantity of charge on the second capacitor plate. In a subsequent step of the sampling process, the controller circuit applies a negative voltage to the gate terminal and p-well to ensure that the quantity of change is substantially preserved during the ensuing analog-to-digital conversion process.
    • 在一个实施例中,A / D转换器通过将输入信号施加到第一电容器端子来对模拟输入信号电压进行采样,而第二电容器端子经由NMOS采样开关连接到地,以将电容器充电到输入信号电压 。 在模数转换处理期间,第二电容器端子可以在低于地面的电压范围内摆动。 控制器电路向NMOS采样开关的栅极端子和p阱提供偏置电压信号,以选择性地打开和关闭采样开关。 在多步采样过程的第一步中,控制器非常快速地将栅极端子放电到地以隔离第二电容器板上的电荷量。 在采样过程的后续步骤中,控制器电路向栅极端子和p阱施加负电压,以确保在随后的模数转换过程期间基本上保持变化量。
    • 76. 发明授权
    • Bootstrapped switch for sampling voltages beyond the supply voltage
    • 用于采样电压超过电源电压的自举开关
    • US07940091B1
    • 2011-05-10
    • US12396151
    • 2009-03-02
    • Srikanth GovindarajuluAndrew Joseph GardnerRobert C. Chiacchia
    • Srikanth GovindarajuluAndrew Joseph GardnerRobert C. Chiacchia
    • H03K5/00
    • H03K19/01735G11C27/02H03K17/063
    • Methods and apparatus for sampling an input voltage and apparatus incorporating the same are disclosed. An input voltage sampling apparatus includes a voltage sampling circuit coupled to the input voltage and configured to produce a sampled input voltage at an output terminal, and a voltage charging circuit coupled to the voltage sampling device and producing a first charged voltage on a first charged voltage output terminal and a second charged voltage on a second charged voltage output terminal. A voltage charging enabling circuit is coupled to the voltage charging circuit, the voltage sampling device via the first connection, and a power supply voltage. Further, the input voltage sampling apparatus includes a control circuit coupled to the voltage sampling circuit, the voltage charging circuit, and the power supply voltage, ground, third and fourth pulse signals. The first and third pulse signals are non-overlapping with the second and fourth pulse signals. The first pulse signal is delayed on the rising edge of the third pulse signal and the second pulse signal is delayed on the rising edge of the fourth pulse signal. The voltage sampling apparatus is capable of sampling an input voltage that is higher than the power supply voltage.
    • 公开了用于对输入电压进行采样的方法和装置及其结合的装置。 输入电压采样装置包括耦合到输入电压并被配置为在输出端产生采样输入电压的电压采样电路,以及耦合到电压采样装置并在第一充电电压上产生第一充电电压的电压充电电路 输出端子和第二充电电压输出端子上的第二充电电压。 电压充电使能电路经由第一连接与电压充电电路,电压取样装置和电源电压耦合。 此外,输入电压采样装置包括耦合到电压采样电路,电压充电电路和电源电压,接地,第三和第四脉冲信号的控制电路。 第一和第三脉冲信号与第二和第四脉冲信号不重叠。 第一脉冲信号在第三脉冲信号的上升沿延迟,第二脉冲信号在第四脉冲信号的上升沿被延迟。 电压采样装置能够对高于电源电压的输入电压进行采样。