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71. 发明授权

US09509308B2 Supply-modulation cross domain data interface 有权
标题翻译：电源调制跨域数据接口
公开(公告)号：US09509308B2
公开(公告)日：2016-11-29
申请号：US14502785
申请日：2014-09-30
申请人： SYNAPTICS INCORPORATED
发明人： Shao-Jen Lim , Prashant Shamarao
IPC分类号： H03L5/00 , H03K19/0175 , H03K5/02 , G06F3/044 , G06F3/041
CPC分类号： H03K19/017509 , G06F3/0416 , G06F3/044 , G06F2203/04103 , H03K5/02
摘要： A method for converting data signals from one power supply voltage domain for use in another power supply voltage domain. The method includes receiving the data signal at a first node of the integrated circuit, wherein the first node is within the first power supply voltage domain. The method also includes generating a first intermediate differential signal from the data signal via a first conversion circuit of the integrated circuit. The method further includes communicating the first intermediate differential signal to a first cross-coupled latch, wherein the first cross-coupled latch generates a first output signal based on the first intermediate differential signal. The method also includes outputting the first output signal from a second node of the integrated circuit, wherein the second node is in the second power supply voltage domain. Other embodiments, such as an integrated circuit, and an input device, are also provided.
摘要翻译：一种用于将来自一个电源电压域的数据信号转换为用于另一个电源电压域的方法。该方法包括在集成电路的第一节点处接收数据信号，其中第一节点在第一电源电压域内。该方法还包括经由集成电路的第一转换电路从数据信号产生第一中间差分信号。该方法还包括将第一中间差分信号传送到第一交叉耦合锁存器，其中第一交叉耦合锁存器基于第一中间差分信号产生第一输出信号。该方法还包括从集成电路的第二节点输出第一输出信号，其中第二节点处于第二电源电压域。还提供了诸如集成电路和输入设备的其他实施例。

72. 发明授权

US09509299B2 Apparatus and method for control of semiconductor switching devices 有权
标题翻译：用于控制半导体开关器件的装置和方法
公开(公告)号：US09509299B2
公开(公告)日：2016-11-29
申请号：US14368081
申请日：2012-01-05
申请人： Denis René Pierre Mathieu
发明人： Denis René Pierre Mathieu
IPC分类号： H03L5/00 , H03K5/08 , H03K17/082 , H03K17/16 , H03K17/567
CPC分类号： H03K17/0828 , H03K17/166 , H03K17/168 , H03K17/567 , H03K2217/0009
摘要： Disclosed is a control circuit for control of a semiconductor switching device, such as an IGBT. The control circuit comprising a first feedback path between a first electrode and a control electrode of said semiconductor switching device which has a capacitance. The circuit is operable such that the capacitance in the first feedback path is dependent on the voltage level at said first electrode. In another embodiment the control circuit is operable such that a feedback signal begins to flow in the first feedback path immediately as the semiconductor switching device begins switching off, thereby causing a control action on the semiconductor switching device.
摘要翻译：公开了一种用于控制诸如IGBT的半导体开关器件的控制电路。所述控制电路包括具有电容的所述半导体开关器件的第一电极和控制电极之间的第一反馈路径。电路是可操作的，使得第一反馈路径中的电容取决于所述第一电极处的电压电平。在另一个实施例中，控制电路是可操作的，使得当半导体开关器件开始关断时，反馈信号在第一反馈路径中开始流动，从而对半导体开关器件进行控制。

73. 发明授权

US09473116B1 Low-cost, capacitive-coupled level shifter scalable for high-voltage applications 有权
标题翻译：低成本，电容耦合电平转换器，适用于高压应用
公开(公告)号：US09473116B1
公开(公告)日：2016-10-18
申请号：US14770542
申请日：2015-05-06
申请人： Balanstring Technology, LLC
发明人： Wenwei Wang
IPC分类号： H03L5/00 , H03K3/037
CPC分类号： H03K3/037 , H03K3/012 , H03K3/356104
摘要： A level shifter for level-shifting a digital input signal referenced to an input ground potential to a digital output signal referenced to an output ground potential, comprising: a capacitor; a driver circuit, including an input node coupled to the digital input signal, and an output node coupled to a first terminal of the capacitor; a receiver circuit, including a first input node coupled to a second terminal of the capacitor, and an output node coupled to the digital output signal; and a latching feedback circuit, including a first input node coupled to the output node of the receiver circuit, and an output node coupled to the second terminal of the capacitor to latch a toggled signal. An optional resistor can be inserted to increase the output resistance of the latching feedback circuit to be substantially larger than the output resistance of the driver circuit.
摘要翻译：电平移位器，用于将参考输入接地电位的数字输入信号电平移位到参考输出地电位的数字输出信号，包括：电容器; 驱动器电路，包括耦合到数字输入信号的输入节点，以及耦合到电容器的第一端子的输出节点; 接收器电路，包括耦合到电容器的第二端子的第一输入节点和耦合到数字输出信号的输出节点; 以及锁存反馈电路，包括耦合到所述接收器电路的输出节点的第一输入节点和耦合到所述电容器的所述第二端子以输出触发信号的输出节点。可以插入可选的电阻器，以将锁存反馈电路的输出电阻增加到比驱动器电路的输出电阻大得多。

74. 发明授权

US09432006B2 Buffer circuit and system having the same 有权
标题翻译：缓冲电路和系统具有相同的功能
公开(公告)号：US09432006B2
公开(公告)日：2016-08-30
申请号：US14608302
申请日：2015-01-29
申请人： SK hynix Inc.
发明人： Jin Ha Hwang
IPC分类号： H03K5/02 , H03L5/00
CPC分类号： H03K5/023 , H03L5/00
摘要： A buffer circuit includes a power supply voltage detection block which may detect a voltage level of a power supply voltage, a bias generation block which may generate a constant bias signal and a plurality of enable bias signals based on the detection result of the power supply voltage, and an input buffer which may amplify an input signal in response to the constant bias signal and the plurality of enable bias signals.
摘要翻译：缓冲电路包括可以检测电源电压的电压电平的电源电压检测块，可产生恒定偏置信号的偏置产生块和基于电源电压的检测结果的多个使能偏置信号以及可以响应于恒定偏置信号和多个使能偏置信号而放大输入信号的输入缓冲器。

75. 发明授权

US09419627B2 Current synthesizer correction 有权
标题翻译：电流合成器校正
公开(公告)号：US09419627B2
公开(公告)日：2016-08-16
申请号：US14598418
申请日：2015-01-16
申请人： INTERSIL AMERICAS LLC
发明人： Travis J. Guthrie , James R. Toker , Narendra B. Kayathi , Brannon C. Harris
IPC分类号： H03L5/00 , G01R19/00 , G01R19/25 , H02M3/157 , H02M3/158 , H02M1/00
CPC分类号： G01R19/0038 , G01R19/0023 , G01R19/0092 , G01R19/25 , G01R19/2506 , G01R31/40 , H02M3/157 , H02M3/1584 , H02M2001/0009 , H03L5/00
摘要： An adjustable current-synthesizer may generate synthesized current representative of an actual current, according to a model of a circuit that produces the actual current. The current synthesizer may under-sample a current sense signal derived from the actual current to obtain a few samples of the actual current, which are then used to adjust the synthesized current, thereby ensuring accuracy of the synthesized current. Sample values of the actual current are compared with corresponding generated values of the synthesized current to obtain offset values. In order to maintain monotonicity in the synthesizer results, the offset values are used to make adjustments to the slope of the synthesized current. The slope of the synthesized current may also be adjusted according to the slope of the actual current. Sub-Nyquist sampling of the actual current may be performed on the down-slope, with up-slope adjustments made based on the offset adjustment and down-slope adjustment.
摘要翻译：根据产生实际电流的电路的模型，可调电流合成器可产生代表实际电流的合成电流。电流合成器可能会对从实际电流得到的电流检测信号进行欠采样，以获得实际电流的几个样本，然后将其用于调整合成电流，从而确保合成电流的精度。将实际电流的采样值与合成电流的相应生成值进行比较，以获得偏移值。为了在合成器结果中保持单调性，使用偏移值来对合成电流的斜率进行调整。合成电流的斜率也可以根据实际电流的斜率进行调整。实际电流的次奈奎斯特采样可以在下坡上进行，其基于偏移调整和下坡调整进行上坡调整。

76. 发明授权

US09419618B1 Interface circuit and electronic system using the same 有权
标题翻译：接口电路和电子系统使用相同
公开(公告)号：US09419618B1
公开(公告)日：2016-08-16
申请号：US14811476
申请日：2015-07-28
申请人： HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD. , HON HAI PRECISION INDUSTRY CO., LTD.
发明人： Sheng-Cun Zheng
IPC分类号： H03L5/00 , H03K19/0185
CPC分类号： H03K19/01855
摘要： An interface circuit applied in an electronic system includes a first control circuit and a second control circuit. The first control circuit includes a first control chip, a first voltage division unit, a switch unit, and a first connector. The second control circuit includes a second control chip, a second voltage division unit, a third voltage division unit, and a second connector. When the serial data pin or the serial clock pin first control chip outputs a first voltage level signal, the serial data pin or the serial clock pin second control chip receives the first voltage level signal. When the serial data pin or the serial clock pin first control chip outputs a second voltage level signal, the serial data pin or the serial clock pin second control chip receives a second voltage level signal from a power source terminal.
摘要翻译：应用在电子系统中的接口电路包括第一控制电路和第二控制电路。第一控制电路包括第一控制芯片，第一分压单元，开关单元和第一连接器。第二控制电路包括第二控制芯片，第二分压单元，第三分压单元和第二连接器。当串行数据引脚或串行时钟引脚第一控制芯片输出第一电压电平信号时，串行数据引脚或串行时钟引脚第二控制芯片接收第一电压电平信号。当串行数据引脚或串行时钟引脚第一控制芯片输出第二电压电平信号时，串行数据引脚或串行时钟引脚第二控制芯片从电源端子接收第二电压电平信号。

77. 发明授权

US09418756B2 Threshold voltage compensation circuit of thin film transistor and method for the same, shift register, and display device 有权
标题翻译：薄膜晶体管的阈值电压补偿电路及其方法，移位寄存器和显示器件
公开(公告)号：US09418756B2
公开(公告)日：2016-08-16
申请号：US14235670
申请日：2013-06-24
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Yinan Liang , Lifei Ma , Lujiang Huangfu
IPC分类号： H03L5/00 , G11C19/28 , G09G3/32
CPC分类号： G11C19/28 , G09G3/3241 , G09G2300/043 , G09G2310/0286
摘要： Provided are a threshold voltage compensation circuit of TFT and a method for the same, a shift register and a display device. The threshold voltage compensation circuit includes an input terminal, an output terminal connected to the source of the thin film transistor, a first resistor to a Kth resistor connected in series, and Kth connectable link and at least one first connectable link. Since a voltage dividing circuit having connectable links divides the voltage input to the source of the thin film transistor, such that the gate-source voltage of the thin film transistor can be changed by changing the voltage of the source of the thin film transistor when the voltage of the gate of the thin film transistor is maintained unchanged, so as to control a leakage current of the thin film transistor under a turn-off state, such that the thin film transistor can be turned off normally.
摘要翻译：提供TFT的阈值电压补偿电路及其方法，移位寄存器和显示装置。阈值电压补偿电路包括输入端子，连接到薄膜晶体管的源极的输出端子，串联连接的第K个电阻器的第一电阻器和第K个可连接链路和至少一个第一可连接链路。由于具有可连接链路的分压电路将输入的电压分隔成薄膜晶体管的源极，所以可以通过改变薄膜晶体管的源极的电压来改变薄膜晶体管的栅源电压薄膜晶体管的栅极的电压保持不变，以便在关断状态下控制薄膜晶体管的漏电流，使得薄膜晶体管可以正常关断。

78. 发明授权

US09374066B2 Resistance multiplier 有权
标题翻译：电阻乘数
公开(公告)号：US09374066B2
公开(公告)日：2016-06-21
申请号：US14524505
申请日：2014-10-27
申请人： Fairchild Semiconductor Corporation
发明人： Juha-Matti Kujala
IPC分类号： H03L5/00 , H03H11/40
CPC分类号： H03H11/405
摘要： This document discusses, among other things, a resistance multiplier configured to provide a more specific and controllable resistance value, the resistance multiplier including an amplifier configured to control a resistance across a first transistor using a received reference resistance value and to control a resistance across a second transistor using the resistance across the first transistor and a relationship between the first and second transistors.
摘要翻译：本文件尤其讨论了被配置为提供更具体和可控电阻值的电阻倍增器，该电阻乘法器包括放大器，该放大器被配置为使用接收到的参考电阻值来控制跨第一晶体管的电阻并且控制跨越第一晶体管的电阻使用第一晶体管两端的电阻的第二晶体管以及第一和第二晶体管之间的关系。

79. 发明授权

US09373275B2 Level shifter of driving circuit and operating method thereof 有权
标题翻译：驱动电路的电平转换器及其操作方法
公开(公告)号：US09373275B2
公开(公告)日：2016-06-21
申请号：US14504141
申请日：2014-10-01
申请人： Raydium Semiconductor Corporation
发明人： Kai-Lan Chuang , Chen-Yu Wang , Chien-Ru Chen
IPC分类号： H03L5/00 , G09G3/20 , H03K3/356
CPC分类号： G09G3/20 , G09G2310/0289 , H03K3/356182
摘要： A level shifter applied in a driving circuit of a display is disclosed. The level shifter includes a first stage of level shifting unit and a second stage of level shifting unit and used to convert an input voltage signal with low voltage level into an output voltage signal with high voltage level. In one example, the total number of the transistors needed by the level shifter is much fewer than that of the prior art, and additional voltage sources are not needed to provide middle voltages. The manufacturing cost of the exemplary level shifter can be reduced and the signal level shifting efficiency of multi-power domain can be enhanced.
摘要翻译：公开了一种应用在显示器的驱动电路中的电平移位器。电平移位器包括电平移位单元的第一级和电平移位单元的第二级，用于将具有低电压电平的输入电压信号转换为具有高电压电平的输出电压信号。在一个示例中，电平移位器所需的晶体管的总数比现有技术要少得多，并且不需要额外的电压源来提供中间电压。可以降低示例性电平移位器的制造成本，并且可以提高多功率域的信号电平转换效率。

80. 发明授权

US09356577B2 Memory interface receivers having pulsed control of input signal attenuation networks 有权
标题翻译：具有脉冲控制输入信号衰减网络的存储器接口接收器
公开(公告)号：US09356577B2
公开(公告)日：2016-05-31
申请号：US14457508
申请日：2014-08-12
申请人： Hector Sanchez , Gayathri A. Bhagavatheeswaran
发明人： Hector Sanchez , Gayathri A. Bhagavatheeswaran
IPC分类号： H03L5/00 , H03H11/24 , G11C11/4093 , H03K5/08
CPC分类号： H03H11/24 , G11C7/1084 , G11C11/4093 , H03H7/24 , H03K5/084
摘要： Receivers for memory interfaces and related methods are disclosed having pulsed control of input signal attenuation networks. Embodiments include a DC common mode attenuation network, an AC coupling network, a pulse generator, and an amplifier. The pulse generator receives the output of the amplifier and generates a pulse signal that in part controls the operation of the attenuation network. The attenuation network generates an attenuated signal having reduced DC common mode levels. This attenuated signal is combined with an AC component passed by the AC coupling network. The resulting combined signal is detected and amplified by the amplifier. Different voltage domains are used for the attenuation network and the AC coupling network as compared to the amplifier and the pulse generator. By attenuating DC common mode levels while maintaining AC signal levels, the disclosed embodiments allow for proper signal detection over a wide range of DC common mode levels.
摘要翻译：公开了用于存储器接口和相关方法的接收机，其具有输入信号衰减网络的脉冲控制。实施例包括DC共模衰减网络，AC耦合网络，脉冲发生器和放大器。脉冲发生器接收放大器的输出并产生部分地控制衰减网络的操作的脉冲信号。衰减网络产生具有降低的DC共模电平的衰减信号。该衰减信号与由AC耦合网络传递的AC分量组合。所得到的组合信号由放大器检测和放大。与放大器和脉冲发生器相比，不同的电压域用于衰减网络和AC耦合网络。通过在维持AC信号电平的同时衰减DC共模电平，所公开的实施例允许在宽范围的DC共模电平上进行适当的信号检测。

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