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1. 发明授权

US07957370B2 Synchronous read channel 失效
标题翻译：同步读通道
公开(公告)号：US07957370B2
公开(公告)日：2011-06-07
申请号：US12126188
申请日：2008-05-23
申请人： Richard T. Behrens , Kent D. Anderson , Alan J. Armstrong , Trent Dudley , Bill R. Foland , Neal Glover , Larry D. King
发明人： Richard T. Behrens , Kent D. Anderson , Alan J. Armstrong , Trent Dudley , Bill R. Foland , Neal Glover , Larry D. King
IPC分类号： H04L12/50
CPC分类号： G11B20/10055 , G11B5/012 , G11B5/09 , G11B20/10 , G11B20/10009 , G11B20/1258 , G11B20/1403 , G11B20/1426 , G11B20/18 , G11B27/3027 , G11B2020/1476 , H03M13/31
摘要： A synchronous read channel having a single chip integrated circuit digital portion which provides digital gain control, timing recovery, equalization, digital peak detection, sequence detection, RLL(1,7) encoding and decoding, error-tolerant synchronization and channel quality measurement is disclosed. The integrated circuit accommodates both center sampling and side sampling, and has a high degree of programmability of various pulse shaping and recovery parameters and the ability to provide decoded data using sequence detection or digital peak detection. These characteristics, together with the error-tolerant sync mark detection and the ability to recover data when the sync mark is obliterated, allow a wide variety of retry and recovery strategies to maximize the possibility of data recovery. Various embodiments, including an embodiment incorporating the analog functions as well as the primary digital functions of the read channel in a single integrated circuit, and preferred embodiments utilizing a reduced complexity, programmable modified Viterbi detector supporting a broad class of partial response channels are disclosed.
摘要翻译：公开了具有提供数字增益控制，定时恢复，均衡，数字峰值检测，序列检测，RLL（1,7）编码和解码，容错同步和信道质量测量的单芯片集成电路数字部分的同步读通道。集成电路既适用于中心采样和侧采样，又具有各种脉冲整形和恢复参数的高度可编程性，以及使用序列检测或数字峰值检测提供解码数据的能力。这些特征以及容错同步标记检测以及当同步标记被消除时恢复数据的能力允许各种各样的重试和恢复策略以最大化数据恢复的可能性。公开了包括在单个集成电路中并入模拟功能以及读取通道的主要数字功能的实施例的各种实施例，以及利用支持大类部分响应通道的降低复杂度的可编程修改维特比检测器的优选实施例。

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