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    • 1. 发明授权
    • Synchronous read channel
    • 同步读通道
    • US07957370B2
    • 2011-06-07
    • US12126188
    • 2008-05-23
    • Richard T. BehrensKent D. AndersonAlan J. ArmstrongTrent DudleyBill R. FolandNeal GloverLarry D. King
    • Richard T. BehrensKent D. AndersonAlan J. ArmstrongTrent DudleyBill R. FolandNeal GloverLarry D. King
    • H04L12/50
    • G11B20/10055G11B5/012G11B5/09G11B20/10G11B20/10009G11B20/1258G11B20/1403G11B20/1426G11B20/18G11B27/3027G11B2020/1476H03M13/31
    • A synchronous read channel having a single chip integrated circuit digital portion which provides digital gain control, timing recovery, equalization, digital peak detection, sequence detection, RLL(1,7) encoding and decoding, error-tolerant synchronization and channel quality measurement is disclosed. The integrated circuit accommodates both center sampling and side sampling, and has a high degree of programmability of various pulse shaping and recovery parameters and the ability to provide decoded data using sequence detection or digital peak detection. These characteristics, together with the error-tolerant sync mark detection and the ability to recover data when the sync mark is obliterated, allow a wide variety of retry and recovery strategies to maximize the possibility of data recovery. Various embodiments, including an embodiment incorporating the analog functions as well as the primary digital functions of the read channel in a single integrated circuit, and preferred embodiments utilizing a reduced complexity, programmable modified Viterbi detector supporting a broad class of partial response channels are disclosed.
    • 公开了具有提供数字增益控制,定时恢复,均衡,数字峰值检测,序列检测,RLL(1,7)编码和解码,容错同步和信道质量测量的单芯片集成电路数字部分的同步读通道 。 集成电路既适用于中心采样和侧采样,又具有各种脉冲整形和恢复参数的高度可编程性,以及使用序列检测或数字峰值检测提供解码数据的能力。 这些特征以及容错同步标记检测以及当同步标记被消除时恢复数据的能力允许各种各样的重试和恢复策略以最大化数据恢复的可能性。 公开了包括在单个集成电路中并入模拟功能以及读取通道的主要数字功能的实施例的各种实施例,以及利用支持大类部分响应通道的降低复杂度的可编程修改维特比检测器的优选实施例。
    • 4. 发明授权
    • Maximum likelihood servo detector for detecting an error correcting servo code recorded on a disc storage medium
    • 用于检测记录在盘存储介质上的纠错伺服码的最大似然伺服检测器
    • US06345074B1
    • 2002-02-05
    • US09045612
    • 1998-03-20
    • Stephen A. TurkDavid E. ReedRichard T. Behrens
    • Stephen A. TurkDavid E. ReedRichard T. Behrens
    • H03D100
    • G11B20/10055G11B20/10009G11B20/10037G11B20/1426G11B20/1866G11B2020/10916H04L1/0054
    • A disc storage system servo code detector is disclosed that provides enhanced error correction capabilities during both tracking and seeking by increasing a minimum distance dmin between valid codewords and by increasing a minimum distance {circumflex over ( )}dmin from the signal space between adjacent codewords to the decision boundaries of all other valid codewords. The signal space with respect to the minimum distances is not a limiting aspect of the invention; however, in the preferred embodiment the codewords are selected to maximize the minimum distances in Euclidean space. Thus, the read signal is sampled and equalized according to a partial response spectrum, and maximum likelihood detection is employed to detect the servo codewords in Euclidean space. The code rate is selected according to certain design criteria such as the amount of error correction desired, the data density, and the cost and complexity of the encoder/decoder circuitry. After selecting the code rate and number of bits per codeword, a computer search is carried out to find a subset of codewords large enough to encode the track addresses while providing large minimum distance values for dmin and {circumflex over ( )}dmin.
    • 公开了一种盘存储系统伺服代码检测器,其通过增加有效代码字之间的最小距离dmin和通过相邻代码字之间的信号空间增加最小距离{circumflex over()} dmin来在跟踪和寻找期间提供增强的纠错能力, 所有其他有效码字的决定边界。 相对于最小距离的信号空间不是本发明的限制性的方面; 然而,在优选实施例中,选择码字以使欧几里德空间中的最小距离最大化。 因此,读取信号根据部分响应频谱进行采样和均衡,并且采用最大似然检测来检测欧几里得空间中的伺服码字。 根据某些设计标准选择码率,例如所需的纠错量,数据密度以及编码器/解码器电路的成本和复杂度。 在选择码率和每个码字的比特数之后,执行计算机搜索以找到足够大的码字的子集,以对轨道地址进行编码,同时为dmin和{circumflex over()} dmin提供较大的最小距离值。
    • 5. 发明授权
    • Disk storage system employing error detection and correction of channel
coded data, interpolated timing recovery, and retroactive/split-segment
symbol synchronization
    • 磁盘存储系统采用通道编码数据的错误检测和校正,内插定时恢复和追溯/分段符号同步
    • US6009549A
    • 1999-12-28
    • US856885
    • 1997-05-15
    • William G. BlissChristopher P. ZookRichard T. Behrens
    • William G. BlissChristopher P. ZookRichard T. Behrens
    • G11B5/012G11B20/10G11B20/14G11B20/18G11B27/30C11C29/00G11B5/09
    • G11B20/10055G11B20/10009G11B20/1426G11B20/1833G11B27/3027G11B2020/1476G11B5/012
    • A disk storage system is disclosed wherein user data received from a host system is first encoded according to a first channel code having a high code rate, and then encoded according to an ECC code, such as a Reed-Solomon code, wherein the ECC redundancy symbols are encoded according to a second channel code having low error propagation. In the preferred embodiment, the first channel code is a RLL (d,k) code having a long k constraint which allows for longer block lengths (and higher code rates). During read back, a synchronous read channel samples the analog read signal a synchronously and interpolates the asynchronous sample values to generate sample values substantially synchronized to the baud rate. In contrast to conventional synchronous-sampling timing recovery, interpolated timing recovery can tolerate a longer RLL k constraint because it is less sensitive to noise in the read signal and not affected by process variations in fabrication. Additionally, a trellis sequence detector detects an estimated binary sequence from the synchronous sample values, wherein a state transition diagram of the trellis detector is configured according to the code constraints of the first and second channel codes. The estimated binary sequence output by the sequence detector is buffered in a data buffer to facilitate the error detection and correction process, and to allow for retroactive and split-segment symbol synchronization using multiple sync marks.
    • 公开了一种磁盘存储系统,其中根据具有高码率的第一信道码首先对从主机系统接收的用户数据进行编码,然后根据诸如Reed-Solomon码的ECC码进行编码,其中ECC冗余 符号根据具有低误差传播的第二信道码进行编码。 在优选实施例中,第一信道码是具有长k约束的RLL(d,k)码,其允许更长的码块长度(和较高码率)。 在读回期间,同步读通道同步地对模拟读取信号进行采样,并内插异步采样值,以生成基本上与波特率同步的采样值。 与传统的同步采样定时恢复相比,内插定时恢复可以容忍较长的RLL k约束,因为它对读取信号中的噪声不太敏感,并且不受制造过程变化的影响。 另外,网格序列检测器根据同步采样值检测估计的二进制序列,其中根据第一和第二信道码的编码约束配置网格检测器的状态转移图。 由序列检测器输出的估计的二进制序列被缓冲在数据缓冲器中,以便于错误检测和校正过程,并允许使用多个同步标记进行追溯和分段符号同步。
    • 6. 发明授权
    • Channel quality circuit in a sampled amplitude read channel
    • 通道质量电路采样振幅读通道
    • US5987634A
    • 1999-11-16
    • US897339
    • 1997-07-21
    • Richard T. BehrensWilliam G. BlissWilliam R. Foland, Jr.
    • Richard T. BehrensWilliam G. BlissWilliam R. Foland, Jr.
    • G11B20/10G11C29/00
    • G11B20/10055G11B20/10009G11B20/10037
    • A channel quality circuit, incorporated within a sampled amplitude read channel utilized in a magnetic storage system, for processing and accumulating performance data from the individual read channel components, wherein the performance data is used to calibrate the read channel to operate in a particular environment, to estimate the bit error rate of the storage system, and to detect defects in the magnetic medium. The channel quality circuit generates a test pattern of digital data which is written to the storage system. Then, as the test pattern is read from the storage system, the channel quality circuit accumulates performance data from the read channel components. The test pattern is used to generate expected samples and expected sample errors relative to the samples read by the read channel. Gating logic is programmed to accumulate only the particular performance data of interest. The channel quality circuit computes auto and cross-correlations, squared errors, and threshold comparisons. A defect detection filter detects particular defects in the media. In order to predict the bit error rate of the storage system, the channel quality circuit accumulates noise auto-correlation data, confidence metrics from a sequence detector, and cross-correlation of expected sample errors with actual sample errors.
    • 一种信道质量电路,其被并入在磁存储系统中使用的采样幅度读取信道中,用于处理和累积来自各个读取信道分量的性能数据,其中,所述性能数据用于校准所述读取信道以在特定环境中操作, 估计存储系统的误码率,并检测磁介质中的缺陷。 信道质量电路产生写入存储系统的数字数据的测试模式。 然后,当从存储系统读取测试图案时,信道质量电路从读取的信道分量累积性能数据。 测试模式用于产生相对于读通道读取的样本的预期样本和预期样本误差。 门控逻辑被编程为仅累积感兴趣的特定性能数据。 信道质量电路计算自动和互相关,平方误差和阈值比较。 缺陷检测滤波器检测介质中的特定缺陷。 为了预测存储系统的误码率,信道质量电路将噪声自相关数据,序列检测器的置信度量度以及预期样本误差与实际样本误差的互相关累积。
    • 8. 发明授权
    • Method and apparatus for calibrating an analog filter in a sampled
amplitude read channel
    • 用于校准采样振幅读通道中的模拟滤波器的方法和装置
    • US5903857A
    • 1999-05-11
    • US751832
    • 1996-11-18
    • Richard T. BehrensTyson TuttleKent D. AndersonTrent O. DudleyWilliam G. Bliss
    • Richard T. BehrensTyson TuttleKent D. AndersonTrent O. DudleyWilliam G. Bliss
    • G11B20/10G06F17/10G11B5/035
    • G11B20/10055G11B20/10009G11B20/10037G11B20/10481
    • A method and apparatus for calibrating an analog equalizer in a sampled amplitude read channel is disclosed wherein the filter's frequency response is measured and calibrated directly. This is accomplished by injecting a known periodic signal into the analog filter and measuring a spectrum value at a predetermined frequency. The filter parameters are adjusted accordingly until the spectrum reaches a predetermined target value. In the preferred embodiment, the analog filter comprises at least one second order low pass filter (referred to as a biquad filter), and the filter's spectrum is adjusted relative to the well known parameters f.sub.o and Q. Specifically, the parameters f.sub.o and Q are optimized relative to a power measurement at predetermined harmonics of the input signal. In this manner, the present invention enables auto-calibration of the analog equalizer without reading any data from the disc. Furthermore, the calibration process can be executed during the storage system's normal operation without significantly degrading its overall performance.
    • 公开了一种用于校准采样振幅读通道中的模拟均衡器的方法和装置,其中滤波器的频率响应被直接测量和校准。 这是通过将已知的周期信号注入模拟滤波器并以预定频率测量频谱值来实现的。 相应地调整滤波器参数,直到频谱达到预定的目标值。 在优选实施例中,模拟滤波器包括至少一个二阶低通滤波器(称为双二阶滤波器),并且相对于众所周知的参数fo和Q调节滤波器的频谱。具体地,参数fo和Q是 相对于输入信号的预定谐波处的功率测量而优化。 以这种方式,本发明能够在不从盘读取任何数据的情况下自动校准模拟均衡器。 此外,可以在存储系统的正常操作期间执行校准过程,而不会显着降低其整体性能。
    • 9. 发明授权
    • Synchronous read channel employing a data randomizer
    • 采用数据随机化器的同步读通道
    • US5844509A
    • 1998-12-01
    • US820926
    • 1997-03-19
    • Richard T. BehrensTrent DudleyNeal Glover
    • Richard T. BehrensTrent DudleyNeal Glover
    • G11B5/012G11B5/09G11B20/10G11B20/12G11B20/14G11B20/18G11B27/30H03M13/31H03M7/46
    • G11B20/10055G11B20/10G11B20/10009G11B20/1403G11B20/1426G11B20/18G11B27/3027G11B5/012G11B5/09H03M13/31G11B20/1258G11B2020/1476
    • A synchronous read channel is disclosed which samples an analog read signal from a magnetic read head positioned over a magnetic disk medium, filters the sample values according to a desired partial response, extracts timing information from the filtered sample values, and detects an estimated data sequence from the filtered sample values using a discrete time sequence detector. The read channel employs a Data Randomizer which processes unencoded user data to insure that the channel bit patterns with worst-case pattern sensitivity occur no more frequently than would be expected from random user data. The Data Randomizer employs two linear feedback shift registers: one generates a 63-bit sequence which is EXLUSIVE-OR-ed against the MSB of each pair of data bits, the other generates a 127-bit sequence which is EXCLUSIVE-OR-ed against the LSB of each pair of data bits. The Data Randomizer does not affect error propagation. When the Data Randomizer is enabled, the probability of encountering any specific pattern of length n channel bits at a randomly selected location within encoded data is approximately 1/2.sup.n.
    • 公开了一种同步读通道,其从位于磁盘介质上的磁读头读取模拟读信号,根据所需的部分响应对采样值进行滤波,从滤波后的采样值中提取定时信息,并检测估计数据序列 使用离散时间序列检测器从滤波后的样本值。 读通道采用数据随机化器,其处理未编码的用户数据,以确保具有最坏情况模式灵敏度的信道位模式不会比从随机用户数据预期的更频繁地发生。 数据随机化器采用两个线性反馈移位寄存器:一个产生一个63位的序列,它与每对数据位的MSB相对而言是EXLUSIVE-OR-,另一个产生一个127位的序列,它是独占 每对数据位的LSB。 Data Randomizer不影响错误传播。 当启用数据随机器时,在编码数据内随机选择的位置遇到长度为n个通道位的任何特定模式的概率大约为+ E,fra 1/2 + EE n。
    • 10. 发明授权
    • Sub-sampled discrete time read channel for computer storage systems
    • 用于计算机存储系统的子采样离散时间读通道
    • US5802118A
    • 1998-09-01
    • US681578
    • 1996-07-29
    • William G. BlissDavid E. ReedRichard T. Behrens
    • William G. BlissDavid E. ReedRichard T. Behrens
    • G11B20/10G11B20/14H04B1/10
    • G11B20/10055G11B20/10009G11B20/10037G11B20/1426
    • A sampled amplitude read channel is disclosed for reading binary data from a computer disk storage system, wherein the read channel sub-samples an analog read signal at a rate lower than the baud rate and detects the binary data from the sub-sampled values using a sequence detector. In one embodiment, the sub-sampled values are interpolated to generate synchronous sample values which are processed by a conventional sequence detector. In another embodiment, the sequence detector is modified to detect the binary data directly from the sub-sampled values. In yet another embodiment, the sequence detector comprises a remodulator and an error pattern detector for detecting and correcting bit errors in the detected binary data. In addition, for the various embodiments a channel code increases the distance property of the sequence detector in order to compensate for the degradation in performance caused by sub-sampling.
    • 公开了一种用于从计算机磁盘存储系统读取二进制数据的采样幅度读取通道,其中读取通道以低于波特率的速率对模拟读取信号进行子采样,并使用以下方式从子采样值检测二进制数据: 序列检测器。 在一个实施例中,子采样值被内插以产生由常规序列检测器处理的同步采样值。 在另一个实施例中,修改序列检测器以直接从子采样值检测二进制数据。 在另一个实施例中,序列检测器包括重调制器和用于检测和校正检测到的二进制数据中的比特错误的错误模式检测器。 此外,对于各种实施例,信道码增加了序列检测器的距离特性,以便补偿由次采样引起的性能下降。