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1. 发明申请

US20090089724A1 Detection Method for Identifying Unintentionally Forward-Biased Diode Devices in an Integrated Circuit Device Design 失效
标题翻译：用于在集成电路器件设计中识别无意的前向偏置二极管器件的检测方法
公开(公告)号：US20090089724A1
公开(公告)日：2009-04-02
申请号：US11862887
申请日：2007-09-27
申请人： Arnold E. Baizley , Joseph A. Iadanza
发明人： Arnold E. Baizley , Joseph A. Iadanza
IPC分类号： G06F17/50
CPC分类号： G06F17/504 , G06F17/5045
摘要： A detection method for identifying unintentionally forward-biased diode devices identifies one or more forward-biased diodes directly from a graphical representation of an integrated circuit (IC) device design. The graphical representation describing one or more IC components as a plurality of geometric shapes that correspond to a set of patterns in at least one semiconductor layer. A detection method may work in conjunction with one or more checks (e.g., electrical rule check (ERC)) to analyze the graphical representation and ensure its manufacturability by reducing the likelihood the forward-biased diodes will be present in the manufactured IC device.
摘要翻译：用于识别无意的正向偏置的二极管器件的检测方法从集成电路（IC）器件设计的图形表示直接识别一个或多个正向偏置二极管。将一个或多个IC组件描述为对应于至少一个半导体层中的一组图案的多个几何形状的图形表示。检测方法可以与一个或多个检查（例如，电气规则检查（ERC））一起工作以分析图形表示，并通过降低正向偏置二极管将存在于制造的IC器件中的可能性来确保其可制造性。

2. 发明申请

US20080029824A1 ESD POWER CLAMP IN TRIPLE WELL 审中-公开
标题翻译：三相ESD ESD钳位
公开(公告)号：US20080029824A1
公开(公告)日：2008-02-07
申请号：US11461831
申请日：2006-08-02
申请人： Arnold E. Baizley , Philippe Hauviller , Steven H. Voldman
发明人： Arnold E. Baizley , Philippe Hauviller , Steven H. Voldman
IPC分类号： H01L29/76
CPC分类号： H01L27/0928 , H01L27/0266 , H01L27/0629 , H01L27/0808 , H01L29/78
摘要： A power clamp in a triple well is disclosed. A metal oxide semiconductor (MOS) varactor is used in a triggering circuit and is positioned in a first N type well. An N-channel field effect transistor is positioned in a P-type well. A P-channel field effect transistor is positioned in a second N-type well. The first N-type well is electrically isolated from the second N-type well, and electrically contacts the substrate of the power clamp.
摘要翻译：公开了三阱中的功率钳。金属氧化物半导体（MOS）变容二极管用于触发电路，并位于第一N型阱中。 N沟道场效应晶体管位于P型阱中。 P沟道场效应晶体管位于第二N型阱中。第一N型阱与第二N型阱电隔离，并与电源夹的基板电接触。

3. 发明授权

US6011423A Virtual voltage power supply 失效
标题翻译：虚拟电压电源
公开(公告)号：US6011423A
公开(公告)日：2000-01-04
申请号：US862896
申请日：1997-05-23
申请人： Arnold E. Baizley , Anthony R. Bonaccio , Charles J. Masenas , Steven J. Tanghe
发明人： Arnold E. Baizley , Anthony R. Bonaccio , Charles J. Masenas , Steven J. Tanghe
IPC分类号： H03K17/0416 , H03K19/013 , H03K17/56
CPC分类号： H03K19/013 , H03K17/04166
摘要： A voltage boosting circuit for an "H-driver," providing for each "pull-up" switch in the H-driver a switching shunt that charges a capacitor from a supply voltage when the "pull-up" switch is open and couples the capacitor directly to the write head when the "pull-up" switch is closed. The side of the capacitor which is not directly coupled to the write head is coupled to the data signal (or its inverse, in the case of the capacitor for the otherwise identical circuit serving the parallel half of the "H-driver") through a buffer which sets the voltage at the signal level (or its inverse), thereby dumping the charge to the write head and elevating the voltage of the write head significantly above the supply voltage. The identical circuit serving the parallel half of the "H-driver" similarly boosts the negative going transition voltage.
摘要翻译：用于“H驱动器”的升压电路为H驱动器中的每个“上拉”开关提供一个开关分流器，当“上拉”开关断开时，电源从电源电压充电，并将当“上拉”开关闭合时，电容器直接连接到写入头。不直接耦合到写头的电容器的一侧耦合到数据信号（或者在与“H驱动器”的平行半部分相同的电路的电容器的情况下，其反相）通过缓冲器将电压设置在信号电平（或其反相），从而将电荷转移到写入头，并将写入头的电压显着地高于电源电压。用于“H驱动器”的并行半部分的相同电路同样提高了负向转变电压。

4. 发明授权

US07685548B2 Detection method for identifying unintentionally forward-biased diode devices in an integrated circuit device design 失效
标题翻译：用于在集成电路器件设计中识别无意的正向偏置二极管器件的检测方法
公开(公告)号：US07685548B2
公开(公告)日：2010-03-23
申请号：US11862887
申请日：2007-09-27
申请人： Arnold E. Baizley , Joseph A. Iadanza
发明人： Arnold E. Baizley , Joseph A. Iadanza
IPC分类号： G06F17/50 , G06F9/45
CPC分类号： G06F17/504 , G06F17/5045
摘要： A detection method for identifying unintentionally forward-biased diode devices identifies one or more forward-biased diodes directly from a graphical representation of an integrated circuit (IC) device design. The graphical representation describing one or more IC components as a plurality of geometric shapes that correspond to a set of patterns in at least one semiconductor layer. A detection method may work in conjunction with one or more checks (e.g., electrical rule check (ERC)) to analyze the graphical representation and ensure its manufacturability by reducing the likelihood the forward-biased diodes will be present in the manufactured IC device.
摘要翻译：用于识别无意的正向偏置的二极管器件的检测方法从集成电路（IC）器件设计的图形表示直接识别一个或多个正向偏置二极管。将一个或多个IC组件描述为对应于至少一个半导体层中的一组图案的多个几何形状的图形表示。检测方法可以与一个或多个检查（例如，电气规则检查（ERC））一起工作以分析图形表示，并通过降低正向偏置二极管将存在于制造的IC器件中的可能性来确保其可制造性。

5. 发明授权

US5907250A Transition detector with timer 失效
标题翻译：定时器转换检测器
公开(公告)号：US5907250A
公开(公告)日：1999-05-25
申请号：US857259
申请日：1997-05-16
申请人： Arnold E. Baizley , Gregg R. Castellucei , Steven J. Tanghe
发明人： Arnold E. Baizley , Gregg R. Castellucei , Steven J. Tanghe
IPC分类号： H03K5/1534 , H03K5/19
CPC分类号： H03K5/19 , H03K5/1534
摘要： A circuit for detecting delay of more than a set period of time from a last signal transition for any of a plurality of data signals, comprising a differential comparator, and integrator pairs for each signal, one integrator of the pair being triggered by transition of the signal from low to high and the other triggered by transition of the inverse of the signal from low to high, each integrator having a voltage measured by the differential comparator against a reference voltage, each integrator being reset by the trigger for the other integrator.
摘要翻译：一种电路，用于从包括差分比较器的多个数据信号中的任何一个数据信号的最后一个信号转换的超过一个设定的时间周期中检测延迟，并且对于每个信号的积分器对，该对的一个积分器由信号从低电平变为高电平，另一个通过信号的反相从低电平转变为高电平，每个积分器具有由差分比较器测得的电压与参考电压的差值，每个积分器由另一个积分器的触发器复位。

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