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1. 发明申请

US20110268266A1 CRYPTOGRAPHIC PROCESSING APPARATUS AND OPERATION METHOD 有权
标题翻译：图形处理装置和操作方法
公开(公告)号：US20110268266A1
公开(公告)日：2011-11-03
申请号：US13155889
申请日：2011-06-08
申请人： Koichi Fujisaki , Atsushi Shimbo
发明人： Koichi Fujisaki , Atsushi Shimbo
IPC分类号： H04L9/28
CPC分类号： H04L9/003 , H04L2209/046
摘要： According to one embodiment, a cryptographic processing apparatus is provided with first to fifth units. The first unit mask-converts input data from first temporary mask into first fixed mask (an invariable value in a first linear operation). In an encryption, the third unit performs a nonlinear operation on the mask-converted data and outputs a first result masked with second fixed mask data (an invariable value in a second linear operation). The fourth unit performs the second linear operation and outputs a encryption result masked with second fixed mask data. In a decryption, the second unit performs the first linear operation on the mask-converted data and outputs a second result masked with the first fixed mask. The third unit performs the nonlinear operation and outputs a decryption result masked with the second fixed mask. In encryption/decryptions, the fifth unit converts the mask of the encryption/decryption results into second temporary mask.
摘要翻译：根据一个实施例，密码处理装置设置有第一至第五单元。第一单元将输入数据从第一临时掩码转换为第一固定掩码（第一线性操作中的不变值）。在加密中，第三单元对掩码转换数据执行非线性运算，并输出用第二固定掩码数据（第二线性运算中的不变值）屏蔽的第一结果。第四单元执行第二线性操作并输出用第二固定掩码数据屏蔽的加密结果。在解密中，第二单元对掩码转换数据执行第一线性操作，并输出用第一固定掩码屏蔽的第二结果。第三单元执行非线性操作并输出用第二固定掩码屏蔽的解密结果。在加密/解密中，第五单元将加密/解密结果的掩码转换为第二临时掩码。

2. 发明授权

US07869592B2 Calculation apparatus and encrypt and decrypt processing apparatus 有权
标题翻译：计算装置和加密和解密处理装置
公开(公告)号：US07869592B2
公开(公告)日：2011-01-11
申请号：US12285077
申请日：2008-09-29
申请人： Koichi Fujisaki , Atsushi Shimbo
发明人： Koichi Fujisaki , Atsushi Shimbo
IPC分类号： H04K1/00
CPC分类号： H04L9/0631 , H04L2209/122 , H04L2209/125
摘要： A calculation apparatus capable of executing any of a first calculating process operation including a first matrix calculation, and a second calculating process operation including a second matrix calculation, includes: a first calculation unit for executing the second matrix calculation; at least one calculation unit other than the first calculation unit, for executing a matrix calculation in parallel to the first calculation unit so as to execute the first matrix calculation; and a logic circuit for performing a logic calculation with respect to a calculation result of the first calculation unit and a calculation result of the other calculation unit. Then, when a calculation result of the first matrix calculation is requested, the calculation apparatus acquires the calculation result from the logic circuit. As a result, the calculation apparatus and an encrypt/decrypt processing apparatus can commonly perform portions of the plural calculating process operations which contain the matrix calculations, and can realize high speed operation by executing portions of the matrix calculations in parallel.
摘要翻译：一种能够执行包括第一矩阵计算的第一计算处理操作和包括第二矩阵计算的第二计算处理操作中的任一者的计算装置，包括：第一计算单元，用于执行第二矩阵计算; 至少一个除第一计算单元之外的计算单元，用于与第一计算单元并行地执行矩阵计算，以便执行第一矩阵计算; 以及用于对第一计算单元的计算结果执行逻辑运算的逻辑电路和另一个计算单元的计算结果。然后，当请求第一矩阵计算的计算结果时，计算装置从逻辑电路获取计算结果。结果，计算装置和加密/解密处理装置可以共同执行包含矩阵计算的多个计算处理操作的部分，并且可以通过并行执行矩阵计算的部分来实现高速操作。

3. 发明申请

US20100063986A1 COMPUTING DEVICE, METHOD, AND COMPUTER PROGRAM PRODUCT 有权
标题翻译：计算设备，方法和计算机程序产品
公开(公告)号：US20100063986A1
公开(公告)日：2010-03-11
申请号：US12393558
申请日：2009-02-26
申请人： Tomoko YONEMURA , Hirofumi MURATANI , Atsushi SHIMBO , Kenji OHKUMA , Taichi ISOGAI , Yuichi KOMANO , Kenichiro FURUTA , Yoshikazu HANATANI
发明人： Tomoko YONEMURA , Hirofumi MURATANI , Atsushi SHIMBO , Kenji OHKUMA , Taichi ISOGAI , Yuichi KOMANO , Kenichiro FURUTA , Yoshikazu HANATANI
IPC分类号： G06F17/10 , G06F7/38 , G06F7/52 , G06F7/50 , H04L9/28
CPC分类号： G06F17/10 , G06F7/724
摘要： In a computing device that calculates a square of an element in a finite field, a vector representation of the element in the finite field is accepted. The vector representation includes a plurality of elements. The computing device performs a multiplication operation on a base field using the accepted elements, and obtains a multiplication value. The multiplication operation is determined by a condition under which the element in the finite field is placed in an algebraic torus. The computing device performs an addition and subtraction operation using the obtained multiplication value and the accepted elements, and obtains a calculation result of the square of the element. The addition and subtraction operation is determined by the condition. The computing device then outputs the calculation result.
摘要翻译：在计算有限域中的元素的平方的计算设备中，接受有限域中元素的向量表示。向量表示包括多个元素。计算装置使用接受的元素对基地区进行乘法运算，得到乘法值。乘法运算由有限域内的元素置于代数圆环中的条件决定。计算装置使用所获得的乘法值和可接受的元素进行加减运算，并获得元素的平方的计算结果。加法和减法操作由条件确定。计算装置然后输出计算结果。

4. 发明授权

US07251485B2 Wireless LAN terminal device, portable data terminal system, mobile phone, wireless LAN communication method, method for providing service, and method for transferring incoming call 失效
标题翻译：无线LAN终端装置，便携式数据终端系统，移动电话，无线LAN通信方法，提供服务的方法以及用于传送来电的方法
公开(公告)号：US07251485B2
公开(公告)日：2007-07-31
申请号：US10941008
申请日：2004-09-15
申请人： Akira Ikeda , Yoshihito Shimazaki , Atsushi Shimbo
发明人： Akira Ikeda , Yoshihito Shimazaki , Atsushi Shimbo
IPC分类号： H04Q7/20
CPC分类号： H04W88/02 , H04W4/16 , H04W52/0212 , H04W84/12 , Y02D70/142 , Y02D70/23 , Y02D70/26
摘要： A portable wireless LAN terminal device attachable to an external connecting terminal installed in a portable external connection device, such as a portable data terminal device, includes a device body (2); means for transmitting and receiving (6-9) a signal through a wireless LAN circuit, the means for transmitting and receiving being installed the device body (2); means for supplying power (11) to each portion from means for accumulating power installed in the device body (2) or means for accumulating power attachable to the device body (2); a connecting terminal (13) installed in the device body (2) and attachable to the external connecting terminal; and first sound producing means (12, 15), which is installed in the device body, for producing sound based on the signal received by the means for transmitting and receiving (6-9).
摘要翻译：可附接到安装在便携式外部连接装置（例如便携式数据终端装置）中的外部连接终端的便携式无线LAN终端装置包括装置本体（2）; 用于通过无线LAN电路发送和接收（6-9）信号的装置，用于发送和接收的装置被安装在装置主体（2）上; 用于为安装在装置主体（2）中的蓄电装置的每个部分供电（11）的装置或用于累积可附装到装置本体（2）的电力的装置; 连接端子（13），其安装在所述装置主体（2）中并可附接到所述外部连接端子; 和第一声音产生装置（12,15），其安装在装置主体中，用于基于由发送和接收装置接收的信号产生声音（6-9）。

5. 发明授权

US06678660B1 Receiving buffer controlling method and voice packet decoder 有权
标题翻译：接收缓冲器控制方法和语音包解码器
公开(公告)号：US06678660B1
公开(公告)日：2004-01-13
申请号：US09557212
申请日：2000-04-25
申请人： Hiromi Aoyagi , Atsushi Shimbo
发明人： Hiromi Aoyagi , Atsushi Shimbo
IPC分类号： G10L2100
CPC分类号： H04Q11/04 , H04L12/6418
摘要： A voice packet decoder has following operations. A receiving buffer stores receiving packets and outputs the oldest packet in every fixed period. When in every the fixed period, if the receiving buffer stores no packets, then a complement packet insert circuit inserts a predetermined complement packet and a counter adds one. Furthermore, a voice decoder generates a synthetic voice signal. A speech/non-speech detection circuit detects whether the synthetic voice signal is speech signal or non-speech signal. When a result of the detecting is non-speech, the counter's value is more than zero, and a number of the stored receiving packets in the receiving buffer is more than one, then a receiving buffer controller discards the oldest packet and subtracts one from the counter's value.
摘要翻译：语音分组解码器具有以下操作。接收缓冲器存储接收分组，并在每个固定周期中输出最早的分组。当在每个固定周期中，如果接收缓冲器不存储分组，则补码分组插入电路插入预定的补码分组，计数器加1。此外，语音解码器产生合成语音信号。语音/非语音检测电路检测合成语音信号是语音信号还是非语音信号。当检测结果为非语音时，计数器的值大于零，并且接收缓冲器中存储的接收数据包的数量大于1，则接收缓冲器控制器丢弃最旧的数据包，并从柜台的价值

6. 发明授权

US06415139B1 Detection circuit of tone signal 有权
标题翻译：音调信号检测电路
公开(公告)号：US06415139B1
公开(公告)日：2002-07-02
申请号：US09198379
申请日：1998-11-24
申请人： Atsushi Shimbo
发明人： Atsushi Shimbo
IPC分类号： H04B116
CPC分类号： H04Q1/44
摘要： This invention intends to provide a tone signal detection circuit that accurately detects a tone signal regardless of a reception electric field strength. To accomplish this object, the tone signal detection circuit according to the invention is comprised of a first filter that extracts a signal of a specific frequency from an input signal, a second filter that excludes the signal of the specific frequency from the input signal and extracts signals of frequencies near the specific frequency, a subtractor that subtracts an output of the second filter from an output of the first filter, and a judgment circuit to judge whether the tone signal is present or not in the input signal on the basis of an output from the subtractor.
摘要翻译：本发明旨在提供一种音调信号检测电路，其与接收电场强度无关地准确地检测音调信号。为了实现该目的，根据本发明的音调信号检测电路包括从输入信号中提取特定频率的信号的第一滤波器，从输入信号中排除特定频率的信号的第二滤波器，并且提取在特定频率附近的频率的信号，从第一滤波器的输出中减去第二滤波器的输出的减法器，以及判断电路，用于基于输出来判断输入信号中是否存在音调信号从减法器。

7. 发明授权

US6088798A Digital signature method using an elliptic curve, a digital signature system, and a program storage medium having the digital signature method stored therein 失效
标题翻译：使用椭圆曲线的数字签名方法，数字签名系统和存储有数字签名方法的程序存储介质
公开(公告)号：US6088798A
公开(公告)日：2000-07-11
申请号：US938958
申请日：1997-09-26
申请人： Atsushi Shimbo
发明人： Atsushi Shimbo
IPC分类号： H04L9/32
CPC分类号： H04L9/3066 , H04L9/3247
摘要： A digital signature method comprises the signature data generating step of, by the use of system information including an elliptic curve E/Fq over a finite field and a base point G on the elliptic curve E/Fq, a signer's public key Y defined by a point on the elliptic curve E/Fq, and the signer's secret key x generated so as to fulfill the public key Y=x.multidot.G, generating signature data including not only at least part of data on a point R on the elliptic curve E/Fq dependent on an arbitrarily generated random number k and the base point G on the elliptic curve E/Fq but also an integer s dependent on the plaintext data M, secret key x, and random number k, and the signature checking step of, by the use of an integer m dependent only on the plaintext data M, an integer r dependent on at least the point R of the point R on the elliptic curve E/Fq and the plaintext data M, at least part of data on the point R and the integer s that constitute the signature data, and the system information, and the signer's public key Y, checking a signature by using a relational equation defined as .+-.s.multidot.G=.+-.m.multidot.Y.+-.r.multidot.R over E/Fq (where the + and - signs are determined by a specific condition) or a relational equation equivalent to the above relational equation as a signature checking equation.
摘要翻译：数字签名方法包括签名数据生成步骤，通过使用包括有限域上的椭圆曲线E / Fq和椭圆曲线E / Fq上的基点G的系统信息，由a 指向椭圆曲线E / Fq，以及签署人的秘密密钥x，以便满足公钥Y = xxG，生成签名数据，不仅包括椭圆曲线E / Fq依赖的点R上的至少部分数据在任意生成的随机数k和椭圆曲线E / Fq上的基点G上，还包括取决于明文数据M，秘密密钥x和随机数k的整数s，以及通过使用的签名检查步骤仅依赖于明文数据M的整数m，至少取决于椭圆曲线E / Fq上的点R的点R和明文数据M的整数r，点R上的至少部分数据和构成签名数据的整数，以及系统信息签名者的公钥Y，通过使用在E / Fq（其中+和 - 符号由特定条件确定）定义为+/- sxG = + / - mxY +/- rxR的关系方程或关系方程式来检查签名相当于上述关系式作为签名检验方程。

8. 发明授权

US6088453A Scheme for computing Montgomery division and Montgomery inverse realizing fast implementation 失效
标题翻译：计算蒙哥马利部门和蒙哥马利逆计算实现快速实施
公开(公告)号：US6088453A
公开(公告)日：2000-07-11
申请号：US13209
申请日：1998-01-26
申请人： Atsushi Shimbo
发明人： Atsushi Shimbo
IPC分类号： G06F7/72 , H04L9/28 , G06F7/52 , G06F15/00
CPC分类号： G06F7/728 , G06F7/721
摘要： A scheme for performing high speed Montgomery division within the Montgomery space. Montgomery division Y=B.multidot.A.sup.-1 .multidot.2.sup.n mod N for a positive integer N, a positive integer A which is relatively prime with respect to N and satisfying 0.ltoreq.A.ltoreq.N, a positive integer B, and an integer n which is satisfying n.gtoreq.L where L is a bit length of N in binary expression, is performed by obtaining a Montgomery inverse X=A.sup.-1 .multidot.2.sup.2n mod N from inputs A and N, and obtaining the Montgomery division Y=B.multidot.X.multidot.2.sup.-n mod N from the Montgomery inverse X and inputs B and N. Montgomery inverse X=A.sup.-1 .multidot.2.sup.2n mod N for a positive integer N, a positive integer A which is relatively prime with respect to N and satisfying 0.ltoreq.A
摘要翻译：在Montgomery空间内执行高速Montgomery部门的方案。蒙哥马利部分Y = BxA-1x2n mod N为正整数N，正整数A相对于N相对于素数，满足0 / = L，其中L是二进制表达式中的N的位长度蒙哥马利逆X和输入B和N.对于正整数N，蒙哥马利逆X = A-1x22n mod N，相对于N相对于N并且满足0 / = L的整数n，其中L是二进制表达式中的N的位长度，输入A和N，并从中间结果C和参数k和输入N获得蒙哥马利逆X = Cx22n-k mod N。

9. 发明授权

US5944794A User identification data management scheme for networking computer systems using wide area network 失效
标题翻译：使用广域网的网络计算机系统的用户识别数据管理方案
公开(公告)号：US5944794A
公开(公告)日：1999-08-31
申请号：US537594
申请日：1995-10-02
申请人： Toshio Okamoto , Atsushi Shimbo , Masahiro Ishiyama
发明人： Toshio Okamoto , Atsushi Shimbo , Masahiro Ishiyama
IPC分类号： G06F13/00
CPC分类号： H04L63/10 , G06F21/6218 , H04L63/107 , G06F2221/2111 , G06F2221/2137 , H04L63/0846
摘要： A user identification data management scheme for a networking computer systems formed by a plurality of computers which are mutually connected through a network. In this scheme, at each computer, whether an access request from a user at another computer to each computer is to be permitted or not is judged, and access permission data necessary in checking whether a communication to each computer is from one user at one computer from which an access to each computer by that one user is permitted is generated. The generated access permission data are then stored in a memory. Then, whether an access to each computer is directly made at each computer or indirectly made from another computer through the network is detected, whether that access is proper or not is judged in a case that access is indirectly made, and that access is permitted in a case that access is judged as proper, according to the access permission data stored in the memory.
摘要翻译：一种由通过网络相互连接的多台计算机组成的网络计算机系统的用户识别数据管理方案。在该方案中，在每个计算机中，判断是否允许来自每个计算机的来自另一计算机的用户的访问请求，以及在检查与每个计算机的通信是否来自一台计算机的一个用户所需的访问许可数据生成允许一个用户访问每个计算机的访问。然后将生成的访问许可数据存储在存储器中。然后，检测在每个计算机上是否直接进行对每个计算机的访问或者通过网络间接地由另一计算机进行的访问，在间接访问的情况下判断该访问是否适当，并且允许访问被允许根据存储在存储器中的访问许可数据来判断访问被判定为正确的情况。

10. 发明授权

US08924448B2 Arithmetic device, method, and program product 有权
标题翻译：算术设备，方法和程序产品
公开(公告)号：US08924448B2
公开(公告)日：2014-12-30
申请号：US13422018
申请日：2012-03-16
申请人： Taichi Isogai , Kenichiro Furuta , Hirofumi Muratani , Kenji Ohkuma , Tomoko Yonemura , Yoshikazu Hanatani , Atsushi Shimbo , Hanae Ikeda , Yuichi Komano
发明人： Taichi Isogai , Kenichiro Furuta , Hirofumi Muratani , Kenji Ohkuma , Tomoko Yonemura , Yoshikazu Hanatani , Atsushi Shimbo , Hanae Ikeda , Yuichi Komano
IPC分类号： G06F7/58 , G06F7/00 , H04L9/28 , H04L9/00 , G06F7/72 , H04L9/30
CPC分类号： H04L9/003 , G06F7/725 , H04L9/3013
摘要： An arithmetic device includes an input unit inputting data that are elements of a group; a converting unit is configured, when the input data are in a second representation, to convert the input data into a first representation and to perform arithmetic operation on the converted first representation using an operand in the first representation in which at least one subcomponent is a zero element to convert the converted first representation into first converted data expressed in the first representation, and when the input data are in the first representation, to perform arithmetic operation on the input data using the operand in the first representation in which at least one subcomponent is a zero element to convert the input data into second converted data expressed in the first representation; and an operating unit that performs arithmetic processing on the first or the second converted data using secret information.
摘要翻译：运算装置包括输入单元，输入作为组的要素的数据; 配置转换单元，当输入数据处于第二表示时，将输入数据转换为第一表示，并且使用第一表示中的操作数对转换的第一表示执行算术运算，其中至少一个子组件是零元素以将转换后的第一表示转换为以第一表示表示的第一转换数据，以及当输入数据处于第一表示时，使用第一表示中的操作数对输入数据执行算术运算，其中至少一个子组件是将输入数据转换成以第一表示表示的第二转换数据的零元素; 以及操作单元，其使用秘密信息对所述第一或第二转换数据执行算术处理。

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